82b4ab7576
The include of HAL headers should come after the HAL configuration defines, so that the headers can see whether the defines were made or not, to provide defaults and configure various things. Signed-off-by: Damien George <damien@micropython.org>
121 lines
4.3 KiB
C
121 lines
4.3 KiB
C
/*
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* This file is part of the MicroPython project, http://micropython.org/
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*
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* The MIT License (MIT)
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*
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* Copyright (c) 2019 Damien P. George
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#ifndef MICROPY_INCLUDED_STM32WBXX_HAL_CONF_BASE_H
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#define MICROPY_INCLUDED_STM32WBXX_HAL_CONF_BASE_H
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// Enable various HAL modules
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#define HAL_MODULE_ENABLED
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#define HAL_ADC_MODULE_ENABLED
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#define HAL_CORTEX_MODULE_ENABLED
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#define HAL_DMA_MODULE_ENABLED
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#define HAL_FLASH_MODULE_ENABLED
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#define HAL_GPIO_MODULE_ENABLED
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#define HAL_I2C_MODULE_ENABLED
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#define HAL_PCD_MODULE_ENABLED
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#define HAL_PWR_MODULE_ENABLED
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#define HAL_RCC_MODULE_ENABLED
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#define HAL_RTC_MODULE_ENABLED
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#define HAL_SPI_MODULE_ENABLED
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#define HAL_TIM_MODULE_ENABLED
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#define HAL_UART_MODULE_ENABLED
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#define HAL_USART_MODULE_ENABLED
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// Oscillator values in Hz
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#define MSI_VALUE (4000000)
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// SysTick has the highest priority
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#define TICK_INT_PRIORITY (0x00)
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// Miscellaneous HAL settings
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#define DATA_CACHE_ENABLE 1
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#define INSTRUCTION_CACHE_ENABLE 1
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#define PREFETCH_ENABLE 0
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#define USE_SPI_CRC 0
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#define USE_RTOS 0
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// Include various HAL modules for convenience
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#include "stm32wbxx_hal_dma.h"
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#include "stm32wbxx_hal_adc.h"
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#include "stm32wbxx_hal_cortex.h"
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#include "stm32wbxx_hal_flash.h"
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#include "stm32wbxx_hal_gpio.h"
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#include "stm32wbxx_hal_i2c.h"
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#include "stm32wbxx_hal_pcd.h"
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#include "stm32wbxx_hal_pwr.h"
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#include "stm32wbxx_hal_rcc.h"
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#include "stm32wbxx_hal_rtc.h"
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#include "stm32wbxx_hal_spi.h"
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#include "stm32wbxx_hal_tim.h"
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#include "stm32wbxx_hal_uart.h"
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#include "stm32wbxx_hal_usart.h"
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#include "stm32wbxx_ll_adc.h"
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#include "stm32wbxx_ll_hsem.h"
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#include "stm32wbxx_ll_lpuart.h"
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#include "stm32wbxx_ll_rtc.h"
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#include "stm32wbxx_ll_usart.h"
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// HAL parameter assertions are disabled
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#define assert_param(expr) ((void)0)
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// Hardware Semaphores - ref: AN5289
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// Used to prevent conflicts after standby / sleep.
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// Each CPUs takes this semaphore at standby wakeup until conflicting elements are restored.
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// Note: this is used in WB55 reference examples, but not listed in AN5289 Rev 6
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#define CFG_HW_PWR_STANDBY_SEMID 10
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// Ensures that CPU2 does not update the BLE persistent data in SRAM2 when CPU1 is reading them
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#define CFG_HW_THREAD_NVM_SRAM_SEMID 9
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// Ensures that CPU2 does not update the Thread persistent data in SRAM2 when CPU1 is reading them
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#define CFG_HW_BLE_NVM_SRAM_SEMID 8
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// Used by CPU2 to prevent CPU1 from writing/erasing data in Flash memory
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#define CFG_HW_BLOCK_FLASH_REQ_BY_CPU2_SEMID 7
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// Used by CPU1 to prevent CPU2 from writing/erasing data in Flash memory
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#define CFG_HW_BLOCK_FLASH_REQ_BY_CPU1_SEMID 6
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// Used to manage the CLK48 clock configuration (RCC_CRRCR, RCC_CCIPR)
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#define CFG_HW_CLK48_CONFIG_SEMID 5
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// Used to manage the entry Stop Mode procedure
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#define CFG_HW_ENTRY_STOP_MODE_SEMID 4
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// Used to access the RCC (RCC_CR, RCC_EXTCFGR, RCC_CFGR, RCC_SMPSCR)
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#define CFG_HW_RCC_SEMID 3
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// Used to access the FLASH (all registers)
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#define CFG_HW_FLASH_SEMID 2
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// Used to access the PKA (all registers)
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#define CFG_HW_PKA_SEMID 1
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// Used to access the RNG (all registers)
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#define CFG_HW_RNG_SEMID 0
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#endif // MICROPY_INCLUDED_STM32WBXX_HAL_CONF_BASE_H
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