a0432ed9cb
The nxp_driver v2.10 allows for/requires some changes to the code: - Remove some part of pwm_backlog.*, which is provided by the lib now. - Change eth.c: the newer versions have additional parameters of the library versions. - Change sdcard.c: use TransferBlocking instead of TransferNonblocking. - Add some support for the MIMXRT1176 device. - Set the clocks for UART, I2C, Timer. - Integrate the I2S module and fix a rebase error. - Use blocking transfer only for SPI. It's faster and interferes less with other modules. - Use the clock_config.c files of library v2.8.5. The mimxrt files keeps the clock_config.c files from Verson 2.8.5. With clock_config.c from v2.10, the boards do not work. Refactoring of the clock set-up is on the to-do list. - Enable expiry timers for UART, I2C and SPI, avoiding a stall in library code. - The clock_config.* files are moved from the board-specific directories to the boards directory and given a MCU related name.
469 lines
16 KiB
C
469 lines
16 KiB
C
/*
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* This file is part of the MicroPython project, http://micropython.org/
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*
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* The MIT License (MIT)
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*
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* Copyright (c) 2019 Damien P. George
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* Copyright (c) 2021 Robert Hammelrath
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#include <string.h>
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#include "py/runtime.h"
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#include "py/mphal.h"
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#include "py/mperrno.h"
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#include "ticks.h"
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#if defined(MICROPY_HW_ETH_MDC)
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#include "pin.h"
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#include "shared/netutils/netutils.h"
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#include "extmod/modnetwork.h"
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#include "fsl_iomuxc.h"
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#include "fsl_enet.h"
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#include "fsl_phy.h"
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#include "hal/phy/mdio/enet/fsl_enet_mdio.h"
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#include "hal/phy/device/phyksz8081/fsl_phyksz8081.h"
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#include "hal/phy/device/phydp83825/fsl_phydp83825.h"
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#include "hal/phy/device/phylan8720/fsl_phylan8720.h"
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#include "eth.h"
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#include "lwip/etharp.h"
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#include "lwip/dns.h"
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#include "lwip/dhcp.h"
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#include "netif/ethernet.h"
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#include "ticks.h"
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// Configuration values
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enet_config_t enet_config;
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phy_config_t phyConfig = {0};
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// Prepare the buffer configuration.
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#define ENET_RXBD_NUM (5)
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#define ENET_TXBD_NUM (5)
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AT_NONCACHEABLE_SECTION_ALIGN(enet_rx_bd_struct_t g_rxBuffDescrip[ENET_RXBD_NUM], ENET_BUFF_ALIGNMENT);
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AT_NONCACHEABLE_SECTION_ALIGN(enet_tx_bd_struct_t g_txBuffDescrip[ENET_TXBD_NUM], ENET_BUFF_ALIGNMENT);
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SDK_ALIGN(uint8_t g_rxDataBuff[ENET_RXBD_NUM][SDK_SIZEALIGN(ENET_FRAME_MAX_FRAMELEN, ENET_BUFF_ALIGNMENT)],
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ENET_BUFF_ALIGNMENT);
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SDK_ALIGN(uint8_t g_txDataBuff[ENET_TXBD_NUM][SDK_SIZEALIGN(ENET_FRAME_MAX_FRAMELEN, ENET_BUFF_ALIGNMENT)],
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ENET_BUFF_ALIGNMENT);
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// ENET Handles & Buffers
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enet_handle_t g_handle;
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static mdio_handle_t mdioHandle = {.ops = &enet_ops};
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static phy_handle_t phyHandle = {.phyAddr = ENET_PHY_ADDRESS, .mdioHandle = &mdioHandle, .ops = &ENET_PHY_OPS};
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enet_buffer_config_t buffConfig[] = {{
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ENET_RXBD_NUM,
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ENET_TXBD_NUM,
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SDK_SIZEALIGN(ENET_FRAME_MAX_FRAMELEN, ENET_BUFF_ALIGNMENT),
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SDK_SIZEALIGN(ENET_FRAME_MAX_FRAMELEN, ENET_BUFF_ALIGNMENT),
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&g_rxBuffDescrip[0],
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&g_txBuffDescrip[0],
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&g_rxDataBuff[0][0],
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&g_txDataBuff[0][0],
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#if FSL_ENET_DRIVER_VERSION >= 0x020300
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0,
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0,
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NULL
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#endif
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}};
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static uint8_t hw_addr[6]; // The MAC address field
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eth_t eth_instance;
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#define PHY_INIT_TIMEOUT_MS (10000)
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#define PHY_AUTONEGO_TIMEOUT_US (5000000)
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typedef struct _eth_t {
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uint32_t trace_flags;
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struct netif netif;
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struct dhcp dhcp_struct;
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} eth_t;
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typedef struct _iomux_table_t {
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uint32_t muxRegister;
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uint32_t muxMode;
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uint32_t inputRegister;
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uint32_t inputDaisy;
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uint32_t configRegister;
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uint32_t inputOnfield;
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uint32_t configValue;
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} iomux_table_t;
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static const iomux_table_t iomux_table_enet[] = {
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IOMUX_TABLE_ENET
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};
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#define IOTE (iomux_table_enet[i])
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#define TRACE_ASYNC_EV (0x0001)
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#define TRACE_ETH_TX (0x0002)
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#define TRACE_ETH_RX (0x0004)
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#define TRACE_ETH_FULL (0x0008)
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STATIC void eth_trace(eth_t *self, size_t len, const void *data, unsigned int flags) {
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if (((flags & NETUTILS_TRACE_IS_TX) && (self->trace_flags & TRACE_ETH_TX))
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|| (!(flags & NETUTILS_TRACE_IS_TX) && (self->trace_flags & TRACE_ETH_RX))) {
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const uint8_t *buf;
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if (len == (size_t)-1) {
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// data is a pbuf
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const struct pbuf *pbuf = data;
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buf = pbuf->payload;
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len = pbuf->len; // restricted to print only the first chunk of the pbuf
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} else {
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// data is actual data buffer
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buf = data;
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}
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if (self->trace_flags & TRACE_ETH_FULL) {
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flags |= NETUTILS_TRACE_PAYLOAD;
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}
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netutils_ethernet_trace(MP_PYTHON_PRINTER, len, buf, flags);
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}
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}
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STATIC void eth_process_frame(eth_t *self, uint8_t *buf, size_t length) {
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struct netif *netif = &self->netif;
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if (netif->flags & NETIF_FLAG_LINK_UP) {
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struct pbuf *p = pbuf_alloc(PBUF_RAW, length, PBUF_POOL);
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if (p != NULL) {
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// Need to create a local copy first, since ENET_ReadFrame does not
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// provide a pointer to the buffer.
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pbuf_take(p, buf, length);
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if (netif->input(p, netif) != ERR_OK) {
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pbuf_free(p);
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}
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}
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}
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}
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void eth_irq_handler(ENET_Type *base, enet_handle_t *handle,
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#if FSL_FEATURE_ENET_QUEUE > 1
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uint32_t ringId,
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#endif /* FSL_FEATURE_ENET_QUEUE > 1 */
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enet_event_t event, enet_frame_info_t *frameInfo, void *userData) {
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eth_t *self = (eth_t *)userData;
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uint8_t g_rx_frame[ENET_FRAME_MAX_FRAMELEN + 14];
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uint32_t length = 0;
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status_t status;
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if (event == kENET_RxEvent) {
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do {
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status = ENET_GetRxFrameSize(handle, &length, 0);
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if (status == kStatus_Success) {
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// Get the data
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ENET_ReadFrame(base, handle, g_rx_frame, length, 0, NULL);
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eth_process_frame(self, g_rx_frame, length);
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} else if (status == kStatus_ENET_RxFrameError) {
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ENET_ReadFrame(base, handle, NULL, 0, 0, NULL);
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}
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} while (status != kStatus_ENET_RxFrameEmpty);
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} else {
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ENET_ClearInterruptStatus(base, ENET_TX_INTERRUPT | ENET_ERR_INTERRUPT);
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}
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}
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// eth_init: Set up GPIO and the transceiver
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void eth_init(eth_t *self, int mac_idx, const phy_operations_t *phy_ops, int phy_addr, bool phy_clock) {
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self->netif.num = mac_idx; // Set the interface number
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CLOCK_EnableClock(kCLOCK_Iomuxc);
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gpio_pin_config_t gpio_config = {kGPIO_DigitalOutput, 0, kGPIO_NoIntmode};
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(void)gpio_config;
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#ifdef ENET_RESET_PIN
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// Configure the Reset Pin
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const machine_pin_obj_t *reset_pin = &ENET_RESET_PIN;
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const machine_pin_af_obj_t *af_obj = pin_find_af(reset_pin, PIN_AF_MODE_ALT5);
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IOMUXC_SetPinMux(reset_pin->muxRegister, af_obj->af_mode, 0, 0, reset_pin->configRegister, 0U);
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IOMUXC_SetPinConfig(reset_pin->muxRegister, af_obj->af_mode, 0, 0, reset_pin->configRegister,
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pin_generate_config(PIN_PULL_DISABLED, PIN_MODE_OUT, PIN_DRIVE_5, reset_pin->configRegister));
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GPIO_PinInit(reset_pin->gpio, reset_pin->pin, &gpio_config);
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#endif
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#ifdef ENET_INT_PIN
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// Configure the Int Pin
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const machine_pin_obj_t *int_pin = &ENET_INT_PIN;
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af_obj = pin_find_af(int_pin, PIN_AF_MODE_ALT5);
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IOMUXC_SetPinMux(int_pin->muxRegister, af_obj->af_mode, 0, 0, int_pin->configRegister, 0U);
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IOMUXC_SetPinConfig(int_pin->muxRegister, af_obj->af_mode, 0, 0, int_pin->configRegister,
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pin_generate_config(PIN_PULL_UP_47K, PIN_MODE_IN, PIN_DRIVE_5, int_pin->configRegister));
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GPIO_PinInit(int_pin->gpio, int_pin->pin, &gpio_config);
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#endif
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// Configure the Transceiver Pins, Settings except for CLK:
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// Slew Rate Field: Fast Slew Rate, Drive Strength, R0/5, Speed max(200MHz)
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// Open Drain Disabled, Pull Enabled, Pull 100K Ohm Pull Up
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// Hysteresis Disabled
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for (int i = 0; i < ARRAY_SIZE(iomux_table_enet); i++) {
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IOMUXC_SetPinMux(IOTE.muxRegister, IOTE.muxMode, IOTE.inputRegister, IOTE.inputDaisy, IOTE.configRegister, IOTE.inputOnfield);
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IOMUXC_SetPinConfig(IOTE.muxRegister, IOTE.muxMode, IOTE.inputRegister, IOTE.inputDaisy, IOTE.configRegister, IOTE.configValue);
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}
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const clock_enet_pll_config_t config = {
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.enableClkOutput = phy_clock, .enableClkOutput25M = false, .loopDivider = 1
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};
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CLOCK_InitEnetPll(&config);
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IOMUXC_EnableMode(IOMUXC_GPR, kIOMUXC_GPR_ENET1RefClkMode, false); // Do not use the 25 MHz MII clock
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IOMUXC_EnableMode(IOMUXC_GPR, kIOMUXC_GPR_ENET1TxClkOutputDir, phy_clock); // Set the clock pad direction
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// Reset transceiver
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// pull up the ENET_INT before RESET.
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#ifdef ENET_INT_PIN
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GPIO_WritePinOutput(int_pin->gpio, int_pin->pin, 1);
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#endif
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#ifdef ENET_RESET_PIN
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GPIO_WritePinOutput(reset_pin->gpio, reset_pin->pin, 0);
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mp_hal_delay_us(1000);
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GPIO_WritePinOutput(reset_pin->gpio, reset_pin->pin, 1);
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mp_hal_delay_us(1000);
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#endif
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mp_hal_get_mac(0, hw_addr);
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phyHandle.ops = phy_ops;
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phyConfig.phyAddr = phy_addr;
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phyConfig.autoNeg = true;
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mdioHandle.resource.base = ENET;
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mdioHandle.resource.csrClock_Hz = CLOCK_GetFreq(kCLOCK_IpgClk);
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// Init the PHY interface & negotiate the speed
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bool link = false;
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bool autonego = false;
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phy_speed_t speed = kENET_MiiSpeed100M;
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phy_duplex_t duplex = kENET_MiiFullDuplex;
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status_t status = PHY_Init(&phyHandle, &phyConfig);
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if (status == kStatus_Success) {
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if (phyConfig.autoNeg) {
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uint64_t t = ticks_us64() + PHY_AUTONEGO_TIMEOUT_US;
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// Wait for auto-negotiation success and link up
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do {
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PHY_GetAutoNegotiationStatus(&phyHandle, &autonego);
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PHY_GetLinkStatus(&phyHandle, &link);
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if (autonego && link) {
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break;
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}
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} while (ticks_us64() < t);
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if (!autonego) {
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mp_raise_msg(&mp_type_OSError, MP_ERROR_TEXT("PHY Auto-negotiation failed."));
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}
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PHY_GetLinkSpeedDuplex(&phyHandle, &speed, &duplex);
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} else {
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PHY_SetLinkSpeedDuplex(&phyHandle, speed, duplex);
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}
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} else {
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mp_raise_msg(&mp_type_OSError, MP_ERROR_TEXT("PHY Init failed."));
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}
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ENET_Reset(ENET);
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ENET_GetDefaultConfig(&enet_config);
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enet_config.miiSpeed = (enet_mii_speed_t)speed;
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enet_config.miiDuplex = (enet_mii_duplex_t)duplex;
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enet_config.miiMode = kENET_RmiiMode;
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// Enable checksum generation by the ENET controller
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enet_config.txAccelerConfig = kENET_TxAccelIpCheckEnabled | kENET_TxAccelProtoCheckEnabled;
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// Set interrupt
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enet_config.interrupt |= ENET_TX_INTERRUPT | ENET_RX_INTERRUPT;
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ENET_Init(ENET, &g_handle, &enet_config, &buffConfig[0], hw_addr, CLOCK_GetFreq(kCLOCK_IpgClk));
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ENET_SetCallback(&g_handle, eth_irq_handler, (void *)self);
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NVIC_SetPriority(ENET_IRQn, IRQ_PRI_PENDSV);
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ENET_EnableInterrupts(ENET, ENET_RX_INTERRUPT);
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ENET_ClearInterruptStatus(ENET, ENET_TX_INTERRUPT | ENET_RX_INTERRUPT | ENET_ERR_INTERRUPT);
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ENET_ActiveRead(ENET);
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}
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// Initialize the phy interface
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STATIC int eth_mac_init(eth_t *self) {
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return 0;
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}
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// Deinit the interface
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STATIC void eth_mac_deinit(eth_t *self) {
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}
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void eth_set_trace(eth_t *self, uint32_t value) {
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self->trace_flags = value;
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}
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/*******************************************************************************/
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// ETH-LwIP bindings
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STATIC err_t eth_send_frame_blocking(ENET_Type *base, enet_handle_t *handle, uint8_t *buffer, int len) {
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status_t status;
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int i;
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#define XMIT_LOOP 10
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// Try a few times to send the frame
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for (i = XMIT_LOOP; i > 0; i--) {
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status = ENET_SendFrame(base, handle, buffer, len, 0, false, NULL);
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if (status != kStatus_ENET_TxFrameBusy) {
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break;
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}
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ticks_delay_us64(100);
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}
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return status;
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}
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STATIC err_t eth_netif_output(struct netif *netif, struct pbuf *p) {
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// This function should always be called from a context where PendSV-level IRQs are disabled
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status_t status;
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LINK_STATS_INC(link.xmit);
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eth_trace(netif->state, (size_t)-1, p, NETUTILS_TRACE_IS_TX | NETUTILS_TRACE_NEWLINE);
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if (p->next == NULL) {
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status = eth_send_frame_blocking(ENET, &g_handle, p->payload, p->len);
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} else {
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// frame consists of several parts. Copy them together and send them
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size_t length = 0;
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uint8_t tx_frame[ENET_FRAME_MAX_FRAMELEN + 14];
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while (p) {
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memcpy(&tx_frame[length], p->payload, p->len);
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length += p->len;
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p = p->next;
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}
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status = eth_send_frame_blocking(ENET, &g_handle, tx_frame, length);
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}
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return status == kStatus_Success ? ERR_OK : ERR_BUF;
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}
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STATIC err_t eth_netif_init(struct netif *netif) {
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netif->linkoutput = eth_netif_output;
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netif->output = etharp_output;
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netif->mtu = 1500;
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netif->flags = NETIF_FLAG_BROADCAST | NETIF_FLAG_ETHARP | NETIF_FLAG_ETHERNET | NETIF_FLAG_IGMP;
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// Checksums only need to be checked on incoming frames, not computed on outgoing frames
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NETIF_SET_CHECKSUM_CTRL(netif,
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NETIF_CHECKSUM_CHECK_IP
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| NETIF_CHECKSUM_CHECK_UDP
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| NETIF_CHECKSUM_CHECK_TCP
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| NETIF_CHECKSUM_CHECK_ICMP
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| NETIF_CHECKSUM_CHECK_ICMP6
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);
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return ERR_OK;
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}
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STATIC void eth_lwip_init(eth_t *self) {
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ip_addr_t ipconfig[4];
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IP4_ADDR(&ipconfig[0], 192, 168, 0, 2);
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IP4_ADDR(&ipconfig[1], 255, 255, 255, 0);
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IP4_ADDR(&ipconfig[2], 192, 168, 0, 1);
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IP4_ADDR(&ipconfig[3], 8, 8, 8, 8);
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self->netif.hwaddr_len = 6;
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memcpy(self->netif.hwaddr, hw_addr, 6);
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MICROPY_PY_LWIP_ENTER
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struct netif *n = &self->netif;
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n->name[0] = 'e';
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n->name[1] = '0';
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netif_add(n, &ipconfig[0], &ipconfig[1], &ipconfig[2], self, eth_netif_init, ethernet_input);
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netif_set_hostname(n, "MPY");
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netif_set_default(n);
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netif_set_up(n);
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dns_setserver(0, &ipconfig[3]);
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dhcp_set_struct(n, &self->dhcp_struct);
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dhcp_start(n);
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netif_set_link_up(n);
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MICROPY_PY_LWIP_EXIT
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}
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STATIC void eth_lwip_deinit(eth_t *self) {
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MICROPY_PY_LWIP_ENTER
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for (struct netif *netif = netif_list; netif != NULL; netif = netif->next) {
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if (netif == &self->netif) {
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netif_remove(netif);
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netif->ip_addr.addr = 0;
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netif->flags = 0;
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}
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}
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MICROPY_PY_LWIP_EXIT
|
|
}
|
|
|
|
struct netif *eth_netif(eth_t *self) {
|
|
return &self->netif;
|
|
}
|
|
|
|
int eth_link_status(eth_t *self) {
|
|
struct netif *netif = &self->netif;
|
|
if ((netif->flags & (NETIF_FLAG_UP | NETIF_FLAG_LINK_UP))
|
|
== (NETIF_FLAG_UP | NETIF_FLAG_LINK_UP)) {
|
|
if (netif->ip_addr.addr != 0) {
|
|
return 3; // link up
|
|
} else {
|
|
return 2; // link no-ip;
|
|
}
|
|
} else {
|
|
bool link;
|
|
PHY_GetLinkStatus(&phyHandle, &link);
|
|
if (link) {
|
|
return 1; // link up
|
|
} else {
|
|
return 0; // link down
|
|
}
|
|
}
|
|
}
|
|
|
|
int eth_start(eth_t *self) {
|
|
eth_lwip_deinit(self);
|
|
|
|
// Make sure Eth is Not in low power mode.
|
|
eth_low_power_mode(self, false);
|
|
|
|
int ret = eth_mac_init(self);
|
|
if (ret < 0) {
|
|
return ret;
|
|
}
|
|
eth_lwip_init(self);
|
|
return 0;
|
|
}
|
|
|
|
int eth_stop(eth_t *self) {
|
|
eth_lwip_deinit(self);
|
|
eth_mac_deinit(self);
|
|
return 0;
|
|
}
|
|
|
|
void eth_low_power_mode(eth_t *self, bool enable) {
|
|
ENET_EnableSleepMode(ENET, enable);
|
|
}
|
|
#endif // defined(MICROPY_HW_ETH_MDC)
|