257 lines
7.1 KiB
C
257 lines
7.1 KiB
C
/*
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* This file is part of the MicroPython project, http://micropython.org/
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*
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* The MIT License (MIT)
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*
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* Copyright (c) 2017 Scott Shawcroft for Adafruit Industries
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* Copyright (c) 2019 Lucian Copeland for Adafruit Industries
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#include <stdint.h>
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#include "supervisor/port.h"
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#include "boards/board.h"
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#include "tick.h"
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#include "common-hal/microcontroller/Pin.h"
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#if CIRCUITPY_BUSIO
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#include "common-hal/busio/I2C.h"
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#include "common-hal/busio/SPI.h"
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#include "common-hal/busio/UART.h"
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#endif
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#if CIRCUITPY_PULSEIO
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#include "common-hal/pulseio/PWMOut.h"
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#include "common-hal/pulseio/PulseOut.h"
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#include "common-hal/pulseio/PulseIn.h"
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#endif
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#include "clocks.h"
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#include "gpio.h"
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//only enable the Reset Handler overwrite for the H7 for now
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#if defined(STM32H7)
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// Device memories must be accessed in order.
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#define DEVICE 2
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// Normal memory can have accesses reorder and prefetched.
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#define NORMAL 0
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// Prevents instruction access.
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#define NO_EXECUTION 1
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#define EXECUTION 0
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// Shareable if the memory system manages coherency.
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#define NOT_SHAREABLE 0
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#define SHAREABLE 1
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#define NOT_CACHEABLE 0
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#define CACHEABLE 1
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#define NOT_BUFFERABLE 0
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#define BUFFERABLE 1
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#define NO_SUBREGIONS 0
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extern uint32_t _ld_stack_top;
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extern uint32_t _ld_d1_ram_bss_start;
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extern uint32_t _ld_d1_ram_bss_size;
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extern uint32_t _ld_d1_ram_data_destination;
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extern uint32_t _ld_d1_ram_data_size;
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extern uint32_t _ld_d1_ram_data_flash_copy;
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extern uint32_t _ld_dtcm_bss_start;
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extern uint32_t _ld_dtcm_bss_size;
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extern uint32_t _ld_dtcm_data_destination;
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extern uint32_t _ld_dtcm_data_size;
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extern uint32_t _ld_dtcm_data_flash_copy;
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extern uint32_t _ld_itcm_destination;
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extern uint32_t _ld_itcm_size;
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extern uint32_t _ld_itcm_flash_copy;
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extern void main(void);
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extern void SystemInit(void);
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// This replaces the Reset_Handler in startup_*.S and SystemInit in system_*.c.
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__attribute__((used, naked)) void Reset_Handler(void) {
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__disable_irq();
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__set_MSP((uint32_t) &_ld_stack_top);
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/* Disable MPU */
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ARM_MPU_Disable();
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// Copy all of the itcm code to run from ITCM. Do this while the MPU is disabled because we write
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// protect it.
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for (uint32_t i = 0; i < ((size_t) &_ld_itcm_size) / 4; i++) {
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(&_ld_itcm_destination)[i] = (&_ld_itcm_flash_copy)[i];
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}
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// The first number in RBAR is the region number. When searching for a policy, the region with
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// the highest number wins. If none match, then the default policy set at enable applies.
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// Mark all the flash the same until instructed otherwise.
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MPU->RBAR = ARM_MPU_RBAR(11, 0x08000000U);
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MPU->RASR = ARM_MPU_RASR(EXECUTION, ARM_MPU_AP_FULL, NORMAL, NOT_SHAREABLE, CACHEABLE, BUFFERABLE, NO_SUBREGIONS, ARM_MPU_REGION_SIZE_2MB);
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// This the ITCM. Set it to read-only because we've loaded everything already and it's easy to
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// accidentally write the wrong value to 0x00000000 (aka NULL).
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MPU->RBAR = ARM_MPU_RBAR(12, 0x00000000U);
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MPU->RASR = ARM_MPU_RASR(EXECUTION, ARM_MPU_AP_RO, NORMAL, NOT_SHAREABLE, CACHEABLE, BUFFERABLE, NO_SUBREGIONS, ARM_MPU_REGION_SIZE_64KB);
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// This the DTCM.
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MPU->RBAR = ARM_MPU_RBAR(14, 0x20000000U);
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MPU->RASR = ARM_MPU_RASR(EXECUTION, ARM_MPU_AP_FULL, NORMAL, NOT_SHAREABLE, CACHEABLE, BUFFERABLE, NO_SUBREGIONS, ARM_MPU_REGION_SIZE_128KB);
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// This is AXI SRAM (D1).
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MPU->RBAR = ARM_MPU_RBAR(15, 0x24000000U);
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MPU->RASR = ARM_MPU_RASR(EXECUTION, ARM_MPU_AP_FULL, NORMAL, NOT_SHAREABLE, CACHEABLE, BUFFERABLE, NO_SUBREGIONS, ARM_MPU_REGION_SIZE_512KB);
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/* Enable MPU */
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ARM_MPU_Enable(MPU_CTRL_PRIVDEFENA_Msk);
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// Copy all of the data to run from DTCM.
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for (uint32_t i = 0; i < ((size_t) &_ld_dtcm_data_size) / 4; i++) {
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(&_ld_dtcm_data_destination)[i] = (&_ld_dtcm_data_flash_copy)[i];
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}
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// Clear DTCM bss.
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for (uint32_t i = 0; i < ((size_t) &_ld_dtcm_bss_size) / 4; i++) {
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(&_ld_dtcm_bss_start)[i] = 0;
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}
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// Copy all of the data to run from D1 RAM.
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for (uint32_t i = 0; i < ((size_t) &_ld_d1_ram_data_size) / 4; i++) {
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(&_ld_d1_ram_data_destination)[i] = (&_ld_d1_ram_data_flash_copy)[i];
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}
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// Clear D1 RAM bss.
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for (uint32_t i = 0; i < ((size_t) &_ld_d1_ram_bss_size) / 4; i++) {
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(&_ld_d1_ram_bss_start)[i] = 0;
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}
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SystemInit();
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__enable_irq();
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main();
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}
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#endif //end H7 specific code
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safe_mode_t port_init(void) {
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HAL_Init();
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__HAL_RCC_SYSCFG_CLK_ENABLE();
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#if defined(STM32F4)
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__HAL_RCC_PWR_CLK_ENABLE();
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#endif
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stm32_peripherals_clocks_init();
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stm32_peripherals_gpio_init();
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tick_init();
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return NO_SAFE_MODE;
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}
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void reset_port(void) {
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reset_all_pins();
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#if CIRCUITPY_BUSIO
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i2c_reset();
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spi_reset();
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uart_reset();
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#endif
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#if CIRCUITPY_PULSEIO
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pwmout_reset();
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pulseout_reset();
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pulsein_reset();
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#endif
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}
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void reset_to_bootloader(void) {
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}
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void reset_cpu(void) {
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NVIC_SystemReset();
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}
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extern uint32_t _ld_heap_start, _ld_heap_end, _ld_stack_top, _ld_stack_bottom;
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uint32_t *port_heap_get_bottom(void) {
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return &_ld_heap_start;
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}
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uint32_t *port_heap_get_top(void) {
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return &_ld_heap_end;
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}
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uint32_t *port_stack_get_limit(void) {
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return &_ld_stack_bottom;
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}
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uint32_t *port_stack_get_top(void) {
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return &_ld_stack_top;
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}
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extern uint32_t _ebss;
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// Place the word to save just after our BSS section that gets blanked.
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void port_set_saved_word(uint32_t value) {
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_ebss = value;
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}
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uint32_t port_get_saved_word(void) {
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return _ebss;
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}
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__attribute__((used)) void MemManage_Handler(void)
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{
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reset_into_safe_mode(MEM_MANAGE);
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while (true) {
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asm("nop;");
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}
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}
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__attribute__((used)) void BusFault_Handler(void)
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{
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reset_into_safe_mode(MEM_MANAGE);
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while (true) {
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asm("nop;");
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}
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}
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__attribute__((used)) void UsageFault_Handler(void)
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{
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reset_into_safe_mode(MEM_MANAGE);
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while (true) {
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asm("nop;");
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}
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}
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__attribute__((used)) void HardFault_Handler(void)
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{
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reset_into_safe_mode(HARD_CRASH);
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while (true) {
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asm("nop;");
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}
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}
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// Required by __libc_init_array in startup code if we are compiling using
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// -nostdlib/-nostartfiles.
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void _init(void)
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{
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}
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