235098efb8
The CSn pin is pin 6 on bank 1, not bank 0. Signed-off-by: Sean Cross <sean@xobs.io>
28 lines
1.1 KiB
C
28 lines
1.1 KiB
C
#include "shared-bindings/board/__init__.h"
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STATIC const mp_rom_map_elem_t board_module_globals_table[] = {
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{ MP_ROM_QSTR(MP_QSTR_SPI_CSN), MP_ROM_PTR(&pin_P1_06) },
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{ MP_ROM_QSTR(MP_QSTR_SPI_MISO), MP_ROM_PTR(&pin_P1_04) },
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{ MP_ROM_QSTR(MP_QSTR_SPI_MOSI), MP_ROM_PTR(&pin_P0_09) },
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{ MP_ROM_QSTR(MP_QSTR_SPI_SCK), MP_ROM_PTR(&pin_P0_10) },
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{ MP_ROM_QSTR(MP_QSTR_NFC1), MP_ROM_PTR(&pin_P0_09) },
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{ MP_ROM_QSTR(MP_QSTR_NFC2), MP_ROM_PTR(&pin_P0_10) },
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{ MP_ROM_QSTR(MP_QSTR_I2S_LRCK), MP_ROM_PTR(&pin_P0_08) },
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{ MP_ROM_QSTR(MP_QSTR_I2S_SDIN), MP_ROM_PTR(&pin_P1_09) },
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{ MP_ROM_QSTR(MP_QSTR_I2S_SCK), MP_ROM_PTR(&pin_P0_12) },
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{ MP_ROM_QSTR(MP_QSTR_LED), MP_ROM_PTR(&pin_P0_06) },
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{ MP_ROM_QSTR(MP_QSTR_CHG), MP_ROM_PTR(&pin_P0_04) },
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{ MP_ROM_QSTR(MP_QSTR_PWM), MP_ROM_PTR(&pin_P0_02) },
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{ MP_ROM_QSTR(MP_QSTR_PWM_N), MP_ROM_PTR(&pin_P0_19) },
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{ MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) },
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{ MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) },
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{ MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) },
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};
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MP_DEFINE_CONST_DICT(board_module_globals, board_module_globals_table);
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