40118bcf57
This changes lots of files to unify `board.h` across ports. It adds `board_deinit` when CIRCUITPY_ALARM is set. `main.c` uses it to deinit the board before deep sleeping (even when pretending.) Deep sleep is now a two step process for the port. First, the port should prepare to deep sleep based on the given alarms. It should set alarms for both deep and pretend sleep. In particular, the pretend versions should be set immediately so that we don't miss an alarm as we shutdown. These alarms should also wake from `port_idle_until_interrupt` which is used when pretending to deep sleep. Second, when real deep sleeping, `alarm_enter_deep_sleep` is called. The port should set any alarms it didn't during prepare based on data it saved internally during prepare. ESP32-S2 sleep is a bit reorganized to locate more logic with TimeAlarm. This will help it scale to more alarm types. Fixes #3786
374 lines
13 KiB
C
374 lines
13 KiB
C
/*
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* This file is part of the MicroPython project, http://micropython.org/
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*
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* The MIT License (MIT)
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*
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* Copyright (c) 2016 Scott Shawcroft
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#include "shared-bindings/busio/SPI.h"
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#include "py/mperrno.h"
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#include "py/runtime.h"
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#include "hpl_sercom_config.h"
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#include "peripheral_clk_config.h"
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#include "supervisor/board.h"
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#include "common-hal/microcontroller/Pin.h"
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#include "hal/include/hal_gpio.h"
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#include "hal/include/hal_spi_m_sync.h"
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#include "hal/include/hpl_spi_m_sync.h"
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#include "supervisor/shared/rgb_led_status.h"
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#include "samd/dma.h"
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#include "samd/sercom.h"
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bool never_reset_sercoms[SERCOM_INST_NUM];
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void never_reset_sercom(Sercom* sercom) {
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// Reset all SERCOMs except the ones being used by on-board devices.
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Sercom *sercom_instances[SERCOM_INST_NUM] = SERCOM_INSTS;
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for (int i = 0; i < SERCOM_INST_NUM; i++) {
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if (sercom_instances[i] == sercom) {
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never_reset_sercoms[i] = true;
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break;
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}
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}
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}
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void allow_reset_sercom(Sercom* sercom) {
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// Reset all SERCOMs except the ones being used by on-board devices.
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Sercom *sercom_instances[SERCOM_INST_NUM] = SERCOM_INSTS;
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for (int i = 0; i < SERCOM_INST_NUM; i++) {
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if (sercom_instances[i] == sercom) {
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never_reset_sercoms[i] = false;
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break;
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}
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}
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}
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void reset_sercoms(void) {
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// Reset all SERCOMs except the ones being used by on-board devices.
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Sercom *sercom_instances[SERCOM_INST_NUM] = SERCOM_INSTS;
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for (int i = 0; i < SERCOM_INST_NUM; i++) {
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if (never_reset_sercoms[i]) {
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continue;
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}
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#ifdef MICROPY_HW_APA102_SERCOM
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if (sercom_instances[i] == MICROPY_HW_APA102_SERCOM) {
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continue;
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}
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#endif
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// SWRST is same for all modes of SERCOMs.
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sercom_instances[i]->SPI.CTRLA.bit.SWRST = 1;
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}
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}
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void common_hal_busio_spi_construct(busio_spi_obj_t *self,
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const mcu_pin_obj_t * clock, const mcu_pin_obj_t * mosi,
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const mcu_pin_obj_t * miso) {
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Sercom* sercom = NULL;
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uint8_t sercom_index;
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uint32_t clock_pinmux = 0;
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bool mosi_none = mosi == NULL;
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bool miso_none = miso == NULL;
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uint32_t mosi_pinmux = 0;
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uint32_t miso_pinmux = 0;
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uint8_t clock_pad = 0;
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uint8_t mosi_pad = 0;
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uint8_t miso_pad = 0;
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uint8_t dopo = 255;
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// Special case for SAMR21 boards. (feather_radiofruit_zigbee)
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#if defined(PIN_PC19F_SERCOM4_PAD0)
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if (miso == &pin_PC19) {
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if (mosi == &pin_PB30 && clock == &pin_PC18) {
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sercom = SERCOM4;
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sercom_index = 4;
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clock_pinmux = MUX_F;
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mosi_pinmux = MUX_F;
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miso_pinmux = MUX_F;
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clock_pad = 3;
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mosi_pad = 2;
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miso_pad = 0;
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dopo = samd_peripherals_get_spi_dopo(clock_pad, mosi_pad);
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}
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// Error, leave SERCOM unset to throw an exception later.
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} else
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#endif
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{
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for (int i = 0; i < NUM_SERCOMS_PER_PIN; i++) {
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sercom_index = clock->sercom[i].index; // 2 for SERCOM2, etc.
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if (sercom_index >= SERCOM_INST_NUM) {
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continue;
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}
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Sercom* potential_sercom = sercom_insts[sercom_index];
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if (
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#if defined(MICROPY_HW_APA102_SCK) && defined(MICROPY_HW_APA102_MOSI) && !CIRCUITPY_BITBANG_APA102
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(potential_sercom->SPI.CTRLA.bit.ENABLE != 0 &&
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potential_sercom != status_apa102.spi_desc.dev.prvt &&
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!apa102_sck_in_use)
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#else
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potential_sercom->SPI.CTRLA.bit.ENABLE != 0
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#endif
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) {
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continue;
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}
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clock_pinmux = PINMUX(clock->number, (i == 0) ? MUX_C : MUX_D);
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clock_pad = clock->sercom[i].pad;
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if (!samd_peripherals_valid_spi_clock_pad(clock_pad)) {
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continue;
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}
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for (int j = 0; j < NUM_SERCOMS_PER_PIN; j++) {
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if (!mosi_none) {
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if (sercom_index == mosi->sercom[j].index) {
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mosi_pinmux = PINMUX(mosi->number, (j == 0) ? MUX_C : MUX_D);
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mosi_pad = mosi->sercom[j].pad;
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dopo = samd_peripherals_get_spi_dopo(clock_pad, mosi_pad);
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if (dopo > 0x3) {
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continue; // pad combination not possible
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}
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if (miso_none) {
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sercom = potential_sercom;
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break;
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}
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} else {
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continue;
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}
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}
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if (!miso_none) {
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for (int k = 0; k < NUM_SERCOMS_PER_PIN; k++) {
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if (sercom_index == miso->sercom[k].index) {
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miso_pinmux = PINMUX(miso->number, (k == 0) ? MUX_C : MUX_D);
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miso_pad = miso->sercom[k].pad;
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sercom = potential_sercom;
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break;
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}
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}
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}
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if (sercom != NULL) {
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break;
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}
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}
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if (sercom != NULL) {
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break;
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}
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}
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}
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if (sercom == NULL) {
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mp_raise_ValueError(translate("Invalid pins"));
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}
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// Set up SPI clocks on SERCOM.
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samd_peripherals_sercom_clock_init(sercom, sercom_index);
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#if defined(MICROPY_HW_APA102_SCK) && defined(MICROPY_HW_APA102_MOSI) && !CIRCUITPY_BITBANG_APA102
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// if we're re-using the dotstar sercom, make sure it is disabled or the init will fail out
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hri_sercomspi_clear_CTRLA_ENABLE_bit(sercom);
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#endif
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if (spi_m_sync_init(&self->spi_desc, sercom) != ERR_NONE) {
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mp_raise_OSError(MP_EIO);
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}
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// Pads must be set after spi_m_sync_init(), which uses default values from
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// the prototypical SERCOM.
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hri_sercomspi_write_CTRLA_DOPO_bf(sercom, dopo);
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hri_sercomspi_write_CTRLA_DIPO_bf(sercom, miso_pad);
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// Always start at 250khz which is what SD cards need. They are sensitive to
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// SPI bus noise before they are put into SPI mode.
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uint8_t baud_value = samd_peripherals_spi_baudrate_to_baud_reg_value(250000);
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if (spi_m_sync_set_baudrate(&self->spi_desc, baud_value) != ERR_NONE) {
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// spi_m_sync_set_baudrate does not check for validity, just whether the device is
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// busy or not
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mp_raise_OSError(MP_EIO);
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}
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gpio_set_pin_direction(clock->number, GPIO_DIRECTION_OUT);
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gpio_set_pin_pull_mode(clock->number, GPIO_PULL_OFF);
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gpio_set_pin_function(clock->number, clock_pinmux);
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claim_pin(clock);
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self->clock_pin = clock->number;
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if (mosi_none) {
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self->MOSI_pin = NO_PIN;
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} else {
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gpio_set_pin_direction(mosi->number, GPIO_DIRECTION_OUT);
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gpio_set_pin_pull_mode(mosi->number, GPIO_PULL_OFF);
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gpio_set_pin_function(mosi->number, mosi_pinmux);
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self->MOSI_pin = mosi->number;
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claim_pin(mosi);
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}
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if (miso_none) {
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self->MISO_pin = NO_PIN;
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} else {
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gpio_set_pin_direction(miso->number, GPIO_DIRECTION_IN);
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gpio_set_pin_pull_mode(miso->number, GPIO_PULL_OFF);
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gpio_set_pin_function(miso->number, miso_pinmux);
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self->MISO_pin = miso->number;
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claim_pin(miso);
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}
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spi_m_sync_enable(&self->spi_desc);
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}
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void common_hal_busio_spi_never_reset(busio_spi_obj_t *self) {
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never_reset_sercom(self->spi_desc.dev.prvt);
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never_reset_pin_number(self->clock_pin);
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never_reset_pin_number(self->MOSI_pin);
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never_reset_pin_number(self->MISO_pin);
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}
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bool common_hal_busio_spi_deinited(busio_spi_obj_t *self) {
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return self->clock_pin == NO_PIN;
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}
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void common_hal_busio_spi_deinit(busio_spi_obj_t *self) {
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if (common_hal_busio_spi_deinited(self)) {
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return;
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}
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allow_reset_sercom(self->spi_desc.dev.prvt);
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spi_m_sync_disable(&self->spi_desc);
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spi_m_sync_deinit(&self->spi_desc);
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reset_pin_number(self->clock_pin);
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reset_pin_number(self->MOSI_pin);
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reset_pin_number(self->MISO_pin);
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self->clock_pin = NO_PIN;
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}
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bool common_hal_busio_spi_configure(busio_spi_obj_t *self,
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uint32_t baudrate, uint8_t polarity, uint8_t phase, uint8_t bits) {
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uint8_t baud_reg_value = samd_peripherals_spi_baudrate_to_baud_reg_value(baudrate);
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void * hw = self->spi_desc.dev.prvt;
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// If the settings are already what we want then don't reset them.
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if (hri_sercomspi_get_CTRLA_CPHA_bit(hw) == phase &&
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hri_sercomspi_get_CTRLA_CPOL_bit(hw) == polarity &&
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hri_sercomspi_read_CTRLB_CHSIZE_bf(hw) == ((uint32_t)bits - 8) &&
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hri_sercomspi_read_BAUD_BAUD_bf(hw) == baud_reg_value) {
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return true;
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}
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// Disable, set values (most or all are enable-protected), and re-enable.
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spi_m_sync_disable(&self->spi_desc);
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hri_sercomspi_wait_for_sync(hw, SERCOM_SPI_SYNCBUSY_MASK);
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hri_sercomspi_write_CTRLA_CPHA_bit(hw, phase);
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hri_sercomspi_write_CTRLA_CPOL_bit(hw, polarity);
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hri_sercomspi_write_CTRLB_CHSIZE_bf(hw, bits - 8);
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hri_sercomspi_write_BAUD_BAUD_bf(hw, baud_reg_value);
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hri_sercomspi_wait_for_sync(hw, SERCOM_SPI_SYNCBUSY_MASK);
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spi_m_sync_enable(&self->spi_desc);
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hri_sercomspi_wait_for_sync(hw, SERCOM_SPI_SYNCBUSY_MASK);
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return true;
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}
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bool common_hal_busio_spi_try_lock(busio_spi_obj_t *self) {
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bool grabbed_lock = false;
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CRITICAL_SECTION_ENTER()
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if (!self->has_lock) {
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grabbed_lock = true;
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self->has_lock = true;
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}
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CRITICAL_SECTION_LEAVE();
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return grabbed_lock;
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}
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bool common_hal_busio_spi_has_lock(busio_spi_obj_t *self) {
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return self->has_lock;
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}
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void common_hal_busio_spi_unlock(busio_spi_obj_t *self) {
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self->has_lock = false;
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}
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bool common_hal_busio_spi_write(busio_spi_obj_t *self,
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const uint8_t *data, size_t len) {
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if (len == 0) {
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return true;
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}
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int32_t status;
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if (len >= 16) {
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status = sercom_dma_write(self->spi_desc.dev.prvt, data, len);
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} else {
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struct io_descriptor *spi_io;
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spi_m_sync_get_io_descriptor(&self->spi_desc, &spi_io);
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status = spi_io->write(spi_io, data, len);
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}
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return status >= 0; // Status is number of chars read or an error code < 0.
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}
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bool common_hal_busio_spi_read(busio_spi_obj_t *self,
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uint8_t *data, size_t len, uint8_t write_value) {
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if (len == 0) {
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return true;
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}
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int32_t status;
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if (len >= 16) {
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status = sercom_dma_read(self->spi_desc.dev.prvt, data, len, write_value);
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} else {
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self->spi_desc.dev.dummy_byte = write_value;
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struct io_descriptor *spi_io;
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spi_m_sync_get_io_descriptor(&self->spi_desc, &spi_io);
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status = spi_io->read(spi_io, data, len);
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}
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return status >= 0; // Status is number of chars read or an error code < 0.
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}
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bool common_hal_busio_spi_transfer(busio_spi_obj_t *self, const uint8_t *data_out, uint8_t *data_in, size_t len) {
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if (len == 0) {
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return true;
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}
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int32_t status;
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if (len >= 16) {
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status = sercom_dma_transfer(self->spi_desc.dev.prvt, data_out, data_in, len);
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} else {
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struct spi_xfer xfer;
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xfer.txbuf = (uint8_t*) data_out;
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xfer.rxbuf = data_in;
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xfer.size = len;
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status = spi_m_sync_transfer(&self->spi_desc, &xfer);
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}
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return status >= 0; // Status is number of chars read or an error code < 0.
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}
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uint32_t common_hal_busio_spi_get_frequency(busio_spi_obj_t* self) {
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return samd_peripherals_spi_baud_reg_value_to_baudrate(hri_sercomspi_read_BAUD_reg(self->spi_desc.dev.prvt));
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}
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uint8_t common_hal_busio_spi_get_phase(busio_spi_obj_t* self) {
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void * hw = self->spi_desc.dev.prvt;
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return hri_sercomspi_get_CTRLA_CPHA_bit(hw);
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}
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uint8_t common_hal_busio_spi_get_polarity(busio_spi_obj_t* self) {
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void * hw = self->spi_desc.dev.prvt;
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return hri_sercomspi_get_CTRLA_CPOL_bit(hw);
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}
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