0d7366c912
- Moves definition of BOARD_FLASH_SIZE and other header files related to flash configuration into the Makefile. - Adds board specific clock_config.h. - Adds board.h, pin_mux.h, and peripherals.h as they are required by NXP MCU SDK in order to use our own clock_config.h. - Renames board specific FlexSPI configuration files. - Updates flash frequency of MIMXRT1020_EVK - Creates separated flash_config files for QSPI NOR and QSPI Hyper flash. - Unifies VFS start address to be @ 1M for 1010 and 1020 boards. - Unifies 1050EVK boards - Adds support to both NOR and HyperFlash on boards with both capabilities. - Adds automatic FlexRAM initialization to start-up code based on linker script and NXP HAL. - Applies code formatting to all files in mimxrt port. With this change the flash configuration is restructured and organized. This simplifies the configuration process and provides a better overview of each board's settings. With the integration of clock_config.h, board.h, pin_mux.h, and peripherals.h we gain better control of the settings and clock configurations. Furthermore the implementation of an explicit FlexRAM setup improves the system performance and allows for performance tuning. Signed-off-by: Philipp Ebensberger
45 lines
1.6 KiB
C
45 lines
1.6 KiB
C
#define MICROPY_HW_BOARD_NAME "i.MX RT1010 EVK"
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#define MICROPY_HW_MCU_NAME "MIMXRT1011DAE5A"
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// i.MX RT1010 EVK has 1 board LED
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#define MICROPY_HW_LED1_PIN (pin_GPIO_11)
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#define MICROPY_HW_LED_ON(pin) (mp_hal_pin_high(pin))
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#define MICROPY_HW_LED_OFF(pin) (mp_hal_pin_low(pin))
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#define MICROPY_HW_NUM_PIN_IRQS (2 * 32)
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// Define mapping logical UART # to hardware UART #
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// LPUART1 on D0/D1 -> 1
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// LPUART3 on A0/D4 -> 3
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// LPUART4 on D6/D7 -> 2
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#define MICROPY_HW_UART_NUM (sizeof(uart_index_table) / sizeof(uart_index_table)[0])
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#define MICROPY_HW_UART_INDEX { 0, 1, 4, 3 }
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#define IOMUX_TABLE_UART \
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{ IOMUXC_GPIO_10_LPUART1_TXD }, { IOMUXC_GPIO_09_LPUART1_RXD }, \
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{ 0 }, { 0 }, \
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{ IOMUXC_GPIO_08_LPUART3_TXD }, { IOMUXC_GPIO_AD_07_LPUART3_RXD }, \
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{ IOMUXC_GPIO_AD_02_LPUART4_TXD }, { IOMUXC_GPIO_AD_01_LPUART4_RXD },
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#define MICROPY_HW_SPI_INDEX { 1 }
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#define IOMUX_TABLE_SPI \
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{ IOMUXC_GPIO_AD_06_LPSPI1_SCK }, { IOMUXC_GPIO_AD_05_LPSPI1_PCS0 }, \
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{ IOMUXC_GPIO_AD_04_LPSPI1_SDO }, { IOMUXC_GPIO_AD_03_LPSPI1_SDI },
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#define DMA_REQ_SRC_RX { 0, kDmaRequestMuxLPSPI1Rx, kDmaRequestMuxLPSPI2Rx }
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#define DMA_REQ_SRC_TX { 0, kDmaRequestMuxLPSPI1Tx, kDmaRequestMuxLPSPI2Tx }
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// Define mapping hardware I2C # to logical I2C #
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// SDA/SCL HW-I2C Logical I2C
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// D14/D15 LPI2C1 -> 0
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// D0/D1 LPI2C2 -> 1
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// D6/D7 LPI2C2 -> 1 Alternatively possible GPIO_AD_01, GPIO_AD_02
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#define MICROPY_HW_I2C_INDEX { 1, 2 }
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#define IOMUX_TABLE_I2C \
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{ IOMUXC_GPIO_02_LPI2C1_SCL }, { IOMUXC_GPIO_01_LPI2C1_SDA }, \
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{ IOMUXC_GPIO_10_LPI2C2_SCL }, { IOMUXC_GPIO_09_LPI2C2_SDA },
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