fcccfc176b
For consistency with other ports.
285 lines
11 KiB
C
285 lines
11 KiB
C
/*
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* This file is part of the MicroPython project, http://micropython.org/
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*
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* The MIT License (MIT)
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*
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* Copyright (c) 2019 Damien P. George
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#include "py/runtime.h"
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#include "extmod/machine_bitstream.h"
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#include "extmod/machine_mem.h"
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#include "extmod/machine_pulse.h"
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#include "extmod/machine_i2c.h"
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#include "extmod/machine_signal.h"
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#include "extmod/machine_spi.h"
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#include "drivers/dht/dht.h"
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#include "shared/runtime/pyexec.h"
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#include "modmachine.h"
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#include "samd_soc.h"
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// ASF 4
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#include "hal_flash.h"
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#include "hal_init.h"
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#include "hpl_gclk_base.h"
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#include "hpl_pm_base.h"
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#if MICROPY_PY_MACHINE
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#if defined(MCU_SAMD21)
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#define DBL_TAP_ADDR ((volatile uint32_t *)(HMCRAMC0_ADDR + HMCRAMC0_SIZE - 4))
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#elif defined(MCU_SAMD51)
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#define DBL_TAP_ADDR ((volatile uint32_t *)(HSRAM_ADDR + HSRAM_SIZE - 4))
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#endif
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// A board may define a DPL_TAP_ADDR_ALT, which will be set as well
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// Needed at the moment for Sparkfun SAMD51 Thing Plus
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#define DBL_TAP_MAGIC_LOADER 0xf01669ef
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#define DBL_TAP_MAGIC_RESET 0xf02669ef
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#define LIGHTSLEEP_CPU_FREQ 200000
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extern bool EIC_occured;
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extern uint32_t _dbl_tap_addr;
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STATIC mp_obj_t machine_soft_reset(void) {
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pyexec_system_exit = PYEXEC_FORCED_EXIT;
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mp_raise_type(&mp_type_SystemExit);
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}
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STATIC MP_DEFINE_CONST_FUN_OBJ_0(machine_soft_reset_obj, machine_soft_reset);
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STATIC mp_obj_t machine_reset(void) {
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*DBL_TAP_ADDR = DBL_TAP_MAGIC_RESET;
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#ifdef DBL_TAP_ADDR_ALT
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*DBL_TAP_ADDR_ALT = DBL_TAP_MAGIC_RESET;
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#endif
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NVIC_SystemReset();
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return mp_const_none;
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}
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MP_DEFINE_CONST_FUN_OBJ_0(machine_reset_obj, machine_reset);
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STATIC mp_obj_t machine_bootloader(void) {
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*DBL_TAP_ADDR = DBL_TAP_MAGIC_LOADER;
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#ifdef DBL_TAP_ADDR_ALT
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*DBL_TAP_ADDR_ALT = DBL_TAP_MAGIC_LOADER;
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#endif
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NVIC_SystemReset();
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return mp_const_none;
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}
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MP_DEFINE_CONST_FUN_OBJ_0(machine_bootloader_obj, machine_bootloader);
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STATIC mp_obj_t machine_freq(size_t n_args, const mp_obj_t *args) {
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if (n_args == 0) {
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return MP_OBJ_NEW_SMALL_INT(get_cpu_freq());
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} else {
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uint32_t freq = mp_obj_get_int(args[0]);
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if (freq >= 1000000 && freq <= MAX_CPU_FREQ) {
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set_cpu_freq(freq);
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}
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return mp_const_none;
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}
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}
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STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(machine_freq_obj, 0, 1, machine_freq);
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STATIC mp_obj_t machine_unique_id(void) {
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// Each device has a unique 128-bit serial number which is a concatenation of four 32-bit
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// words contained at the following addresses. The uniqueness of the serial number is
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// guaranteed only when using all 128 bits.
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// Atmel SAM D21E / SAM D21G / SAM D21J
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// SMART ARM-Based Microcontroller
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// DATASHEET
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// 9.6 (SAMD51) or 9.3.3 (or 10.3.3 depending on which manual)(SAMD21) Serial Number
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//
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// EXAMPLE (SAMD21)
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// ----------------
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// OpenOCD:
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// Word0:
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// > at91samd21g18.cpu mdw 0x0080A00C 1
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// 0x0080a00c: 6e27f15f
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// Words 1-3:
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// > at91samd21g18.cpu mdw 0x0080A040 3
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// 0x0080a040: 50534b54 332e3120 ff091645
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//
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// MicroPython (this code and same order as shown in Arduino IDE)
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// >>> ubinascii.hexlify(machine.unique_id())
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// b'6e27f15f50534b54332e3120ff091645'
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#if defined(MCU_SAMD21)
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uint32_t *id_addresses[4] = {(uint32_t *)0x0080A00C, (uint32_t *)0x0080A040,
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(uint32_t *)0x0080A044, (uint32_t *)0x0080A048};
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#elif defined(MCU_SAMD51)
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uint32_t *id_addresses[4] = {(uint32_t *)0x008061FC, (uint32_t *)0x00806010,
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(uint32_t *)0x00806014, (uint32_t *)0x00806018};
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#endif
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uint8_t raw_id[16];
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for (int i = 0; i < 4; i++) {
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for (int k = 0; k < 4; k++) {
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// 'Reverse' the read bytes into a 32 bit word (Consistent with Arduino)
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raw_id[4 * i + k] = (*(id_addresses[i]) >> (24 - k * 8)) & 0xff;
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}
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}
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return mp_obj_new_bytes((byte *)&raw_id, sizeof(raw_id));
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}
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STATIC MP_DEFINE_CONST_FUN_OBJ_0(machine_unique_id_obj, machine_unique_id);
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STATIC mp_obj_t machine_idle(void) {
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MICROPY_EVENT_POLL_HOOK;
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return mp_const_none;
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}
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STATIC MP_DEFINE_CONST_FUN_OBJ_0(machine_idle_obj, machine_idle);
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STATIC mp_obj_t machine_disable_irq(void) {
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uint32_t state = MICROPY_BEGIN_ATOMIC_SECTION();
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return mp_obj_new_int(state);
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}
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MP_DEFINE_CONST_FUN_OBJ_0(machine_disable_irq_obj, machine_disable_irq);
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STATIC mp_obj_t machine_enable_irq(mp_obj_t state_in) {
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uint32_t state = mp_obj_get_int(state_in);
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MICROPY_END_ATOMIC_SECTION(state);
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return mp_const_none;
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}
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MP_DEFINE_CONST_FUN_OBJ_1(machine_enable_irq_obj, machine_enable_irq);
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STATIC mp_obj_t machine_reset_cause(void) {
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#if defined(MCU_SAMD21)
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return MP_OBJ_NEW_SMALL_INT(PM->RCAUSE.reg);
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#elif defined(MCU_SAMD51)
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return MP_OBJ_NEW_SMALL_INT(RSTC->RCAUSE.reg);
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#else
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return MP_OBJ_NEW_SMALL_INT(0);
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#endif
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}
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MP_DEFINE_CONST_FUN_OBJ_0(machine_reset_cause_obj, machine_reset_cause);
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STATIC mp_obj_t machine_lightsleep(size_t n_args, const mp_obj_t *args) {
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int32_t duration = -1;
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uint32_t freq = get_cpu_freq();
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if (n_args > 0) {
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duration = mp_obj_get_int(args[0]);
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}
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EIC_occured = false;
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// Slow down
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set_cpu_freq(LIGHTSLEEP_CPU_FREQ);
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#if defined(MCU_SAMD21)
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// Switch the peripheral clock off
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GCLK->GENCTRL.reg = GCLK_GENCTRL_ID(2);
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while (GCLK->STATUS.bit.SYNCBUSY) {
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}
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// Switch the EIC temporarily to GCLK3, since GCLK2 is off
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GCLK->CLKCTRL.reg = GCLK_CLKCTRL_CLKEN | GCLK_CLKCTRL_GEN_GCLK3 | EIC_GCLK_ID;
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if (duration > 0) {
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uint32_t t0 = systick_ms;
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while ((systick_ms - t0 < duration) && (EIC_occured == false)) {
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__WFI();
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}
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} else {
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while (EIC_occured == false) {
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__WFI();
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}
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}
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GCLK->CLKCTRL.reg = GCLK_CLKCTRL_CLKEN | GCLK_CLKCTRL_GEN_GCLK2 | EIC_GCLK_ID;
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#elif defined(MCU_SAMD51)
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// Switch the peripheral clock off
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GCLK->GENCTRL[2].reg = 0;
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while (GCLK->SYNCBUSY.bit.GENCTRL2) {
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}
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// Switch the EIC temporarily to GCLK3, since GCLK2 is off
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GCLK->PCHCTRL[EIC_GCLK_ID].reg = GCLK_PCHCTRL_CHEN | GCLK_PCHCTRL_GEN_GCLK3;
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if (duration > 0) {
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uint32_t t0 = systick_ms;
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while ((systick_ms - t0 < duration) && (EIC_occured == false)) {
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__WFI();
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}
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} else {
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while (EIC_occured == false) {
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__WFI();
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}
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}
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GCLK->PCHCTRL[EIC_GCLK_ID].reg = GCLK_PCHCTRL_CHEN | GCLK_PCHCTRL_GEN_GCLK2;
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#endif
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// Speed up again
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set_cpu_freq(freq);
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return mp_const_none;
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}
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STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(machine_lightsleep_obj, 0, 1, machine_lightsleep);
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STATIC const mp_rom_map_elem_t machine_module_globals_table[] = {
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{ MP_ROM_QSTR(MP_QSTR___name__), MP_ROM_QSTR(MP_QSTR_umachine) },
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{ MP_ROM_QSTR(MP_QSTR_soft_reset), MP_ROM_PTR(&machine_soft_reset_obj) },
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{ MP_ROM_QSTR(MP_QSTR_reset), MP_ROM_PTR(&machine_reset_obj) },
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{ MP_ROM_QSTR(MP_QSTR_bootloader), MP_ROM_PTR(&machine_bootloader_obj) },
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{ MP_ROM_QSTR(MP_QSTR_freq), MP_ROM_PTR(&machine_freq_obj) },
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{ MP_ROM_QSTR(MP_QSTR_mem8), MP_ROM_PTR(&machine_mem8_obj) },
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{ MP_ROM_QSTR(MP_QSTR_mem16), MP_ROM_PTR(&machine_mem16_obj) },
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{ MP_ROM_QSTR(MP_QSTR_mem32), MP_ROM_PTR(&machine_mem32_obj) },
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{ MP_ROM_QSTR(MP_QSTR_unique_id), MP_ROM_PTR(&machine_unique_id_obj) },
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{ MP_ROM_QSTR(MP_QSTR_ADC), MP_ROM_PTR(&machine_adc_type) },
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{ MP_ROM_QSTR(MP_QSTR_DAC), MP_ROM_PTR(&machine_dac_type) },
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{ MP_ROM_QSTR(MP_QSTR_Pin), MP_ROM_PTR(&machine_pin_type) },
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{ MP_ROM_QSTR(MP_QSTR_Signal), MP_ROM_PTR(&machine_signal_type) },
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{ MP_ROM_QSTR(MP_QSTR_PWM), MP_ROM_PTR(&machine_pwm_type) },
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{ MP_ROM_QSTR(MP_QSTR_SoftI2C), MP_ROM_PTR(&mp_machine_soft_i2c_type) },
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{ MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&machine_i2c_type) },
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{ MP_ROM_QSTR(MP_QSTR_SoftSPI), MP_ROM_PTR(&mp_machine_soft_spi_type) },
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{ MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&machine_spi_type) },
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{ MP_ROM_QSTR(MP_QSTR_Timer), MP_ROM_PTR(&machine_timer_type) },
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{ MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&machine_uart_type) },
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{ MP_ROM_QSTR(MP_QSTR_WDT), MP_ROM_PTR(&machine_wdt_type) },
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#if MICROPY_PY_MACHINE_RTC
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{ MP_ROM_QSTR(MP_QSTR_RTC), MP_ROM_PTR(&machine_rtc_type) },
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#endif
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{ MP_ROM_QSTR(MP_QSTR_idle), MP_ROM_PTR(&machine_idle_obj) },
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{ MP_ROM_QSTR(MP_QSTR_disable_irq), MP_ROM_PTR(&machine_disable_irq_obj) },
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{ MP_ROM_QSTR(MP_QSTR_enable_irq), MP_ROM_PTR(&machine_enable_irq_obj) },
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{ MP_ROM_QSTR(MP_QSTR_reset_cause), MP_ROM_PTR(&machine_reset_cause_obj) },
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{ MP_ROM_QSTR(MP_QSTR_time_pulse_us), MP_ROM_PTR(&machine_time_pulse_us_obj) },
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{ MP_ROM_QSTR(MP_QSTR_lightsleep), MP_ROM_PTR(&machine_lightsleep_obj) },
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{ MP_ROM_QSTR(MP_QSTR_bitstream), MP_ROM_PTR(&machine_bitstream_obj) },
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#if MICROPY_PY_MACHINE_DHT_READINTO
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{ MP_ROM_QSTR(MP_QSTR_dht_readinto), MP_ROM_PTR(&dht_readinto_obj) },
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#endif
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// Class constants.
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// Use numerical constants instead of the symbolic names,
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// since the names differ between SAMD21 and SAMD51.
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{ MP_ROM_QSTR(MP_QSTR_PWRON_RESET), MP_ROM_INT(0x01) },
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{ MP_ROM_QSTR(MP_QSTR_HARD_RESET), MP_ROM_INT(0x10) },
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{ MP_ROM_QSTR(MP_QSTR_WDT_RESET), MP_ROM_INT(0x20) },
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{ MP_ROM_QSTR(MP_QSTR_SOFT_RESET), MP_ROM_INT(0x40) },
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{ MP_ROM_QSTR(MP_QSTR_DEEPSLEEP_RESET), MP_ROM_INT(0x80) },
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};
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STATIC MP_DEFINE_CONST_DICT(machine_module_globals, machine_module_globals_table);
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const mp_obj_module_t mp_module_machine = {
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.base = { &mp_type_module },
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.globals = (mp_obj_dict_t *)&machine_module_globals,
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};
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MP_REGISTER_MODULE(MP_QSTR_umachine, mp_module_machine);
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#endif // MICROPY_PY_MACHINE
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