57 lines
1.7 KiB
Plaintext
57 lines
1.7 KiB
Plaintext
/*
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GNU linker script for STM32WB55xG
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*/
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/* Specify the memory areas */
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MEMORY
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{
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FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 512K /* sectors 0-127 */
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FLASH_APP (rx) : ORIGIN = 0x08004000, LENGTH = 496K /* sectors 4-127 */
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FLASH_FS (r) : ORIGIN = 0x08080000, LENGTH = 256K /* sectors 128-191 */
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RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 192K /* SRAM1 */
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RAM2A (xrw) : ORIGIN = 0x20030000, LENGTH = 10K /* SRAM2A */
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RAM2B (xrw) : ORIGIN = 0x20038000, LENGTH = 10K /* SRAM2B */
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}
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/* produce a link error if there is not this amount of RAM for these sections */
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_minimum_stack_size = 2K;
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_minimum_heap_size = 16K;
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/* RAM extents for the garbage collector */
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_ram_start = ORIGIN(RAM);
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_ram_end = ORIGIN(RAM) + LENGTH(RAM);
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_ram_fs_cache_end = ORIGIN(RAM) + LENGTH(RAM);
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_ram_fs_cache_start = _ram_fs_cache_end - 4K; /* fs cache = 4K */
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/* Define the stack. The stack is full descending so begins at the bottom of FS cache.
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Note that EABI requires the stack to be 8-byte aligned for a call. */
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_estack = _ram_fs_cache_start - _estack_reserve;
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_sstack = _estack - 16K;
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_heap_start = _ebss; /* heap starts just after statically allocated memory */
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_heap_end = _sstack;
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_flash_fs_start = ORIGIN(FLASH_FS);
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_flash_fs_end = ORIGIN(FLASH_FS) + LENGTH(FLASH_FS);
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SECTIONS
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{
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/* Put all IPCC tables into SRAM2A. */
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.ram2a_bss :
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{
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. = ALIGN(4);
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. = . + 64; /* Leave room for the mb_ref_table_t (assuming IPCCDBA==0). */
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*rfcore.o(.bss.ipcc_mem_*)
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. = ALIGN(4);
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} >RAM2A
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/* Put all IPCC buffers into SRAM2B. */
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.ram2b_bss :
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{
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. = ALIGN(4);
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*rfcore.o(.bss.ipcc_membuf_*)
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. = ALIGN(4);
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} >RAM2B
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}
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