172 lines
7.0 KiB
C
172 lines
7.0 KiB
C
/*
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* This file is part of the MicroPython project, http://micropython.org/
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*
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* The MIT License (MIT)
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*
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* Copyright (c) 2016 Scott Shawcroft
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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// This file contains all of the Python API definitions for the
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// nativeio.SPI class.
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#include <string.h>
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#include "shared-bindings/microcontroller/Pin.h"
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#include "shared-bindings/nativeio/SPI.h"
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#include "py/runtime.h"
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//| .. currentmodule:: nativeio
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//|
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//| :class:`SPI` -- a 3-4 wire serial protocol
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//| -----------------------------------------------
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//|
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//| SPI is a serial protocol that has exclusive pins for data in and out of the
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//| master. It is typically faster than :py:class:`~nativeio.I2C` because a
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//| separate pin is used to control the active slave rather than a transitted
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//| address. This class only manages three of the four SPI lines: `!clock`,
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//| `!MOSI`, `!MISO`. Its up to the client to manage the appropriate slave
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//| select line. (This is common because multiple slaves can share the `!clock`,
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//| `!MOSI` and `!MISO` lines and therefore the hardware.)
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//|
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//| .. class:: SPI(clock, MOSI, MISO, baudrate=1000000)
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//|
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//| Construct an SPI object on the given pins.
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//|
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//| :param ~microcontroller.Pin clock: the pin to use for the clock.
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//| :param ~microcontroller.Pin MOSI: the Master Out Slave In pin.
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//| :param ~microcontroller.Pin MISO: the Master In Slave Out pin.
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//| :param int baudrate: is the SCK clock rate.
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//|
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// TODO(tannewt): Support LSB SPI.
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// TODO(tannewt): Support phase, polarity and bit order.
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STATIC mp_obj_t nativeio_spi_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *pos_args) {
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mp_arg_check_num(n_args, n_kw, 0, MP_OBJ_FUN_ARGS_MAX, true);
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nativeio_spi_obj_t *self = m_new_obj(nativeio_spi_obj_t);
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self->base.type = &nativeio_spi_type;
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mp_map_t kw_args;
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mp_map_init_fixed_table(&kw_args, n_kw, pos_args + n_args);
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enum { ARG_clock, ARG_MOSI, ARG_MISO, ARG_baudrate, ARG_polarity, ARG_phase, ARG_bits, ARG_firstbit };
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static const mp_arg_t allowed_args[] = {
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{ MP_QSTR_clock, MP_ARG_REQUIRED | MP_ARG_OBJ },
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{ MP_QSTR_MOSI, MP_ARG_REQUIRED | MP_ARG_OBJ },
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{ MP_QSTR_MISO, MP_ARG_REQUIRED | MP_ARG_OBJ },
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{ MP_QSTR_baudrate, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 100000} },
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{ MP_QSTR_polarity, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 400000} },
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{ MP_QSTR_phase, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 400000} },
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{ MP_QSTR_bits, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 8} },
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};
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mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)];
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mp_arg_parse_all(n_args, pos_args, &kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args);
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assert_pin(args[ARG_clock].u_obj, false);
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assert_pin(args[ARG_MOSI].u_obj, true);
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assert_pin(args[ARG_MISO].u_obj, true);
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const mcu_pin_obj_t* clock = MP_OBJ_TO_PTR(args[ARG_clock].u_obj);
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const mcu_pin_obj_t* mosi = MP_OBJ_TO_PTR(args[ARG_MOSI].u_obj);
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const mcu_pin_obj_t* miso = MP_OBJ_TO_PTR(args[ARG_MISO].u_obj);
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common_hal_nativeio_spi_construct(self, clock, mosi, miso, args[ARG_baudrate].u_int);
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return (mp_obj_t)self;
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}
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//| .. method:: SPI.deinit()
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//|
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//| Turn off the SPI bus.
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//|
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STATIC mp_obj_t nativeio_spi_obj_deinit(mp_obj_t self_in) {
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nativeio_spi_obj_t *self = MP_OBJ_TO_PTR(self_in);
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common_hal_nativeio_spi_deinit(self);
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return mp_const_none;
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}
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MP_DEFINE_CONST_FUN_OBJ_1(nativeio_spi_deinit_obj, nativeio_spi_obj_deinit);
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//| .. method:: SPI.__enter__()
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//|
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//| No-op used by Context Managers.
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//|
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STATIC mp_obj_t nativeio_spi_obj___enter__(mp_obj_t self_in) {
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return self_in;
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}
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MP_DEFINE_CONST_FUN_OBJ_1(nativeio_spi___enter___obj, nativeio_spi_obj___enter__);
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//| .. method:: SPI.__exit__()
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//|
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//| Automatically deinitializes the hardware when exiting a context.
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//|
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STATIC mp_obj_t nativeio_spi_obj___exit__(size_t n_args, const mp_obj_t *args) {
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(void)n_args;
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common_hal_nativeio_spi_deinit(args[0]);
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return mp_const_none;
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}
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STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(nativeio_spi_obj___exit___obj, 4, 4, nativeio_spi_obj___exit__);
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//| .. method:: SPI.write(buf)
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//|
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//| Write the data contained in `!buf`.
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//| Returns the number of bytes written.
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//|
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STATIC mp_obj_t nativeio_spi_write(mp_obj_t self_in, mp_obj_t wr_buf) {
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mp_buffer_info_t src;
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mp_get_buffer_raise(wr_buf, &src, MP_BUFFER_READ);
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nativeio_spi_obj_t *self = MP_OBJ_TO_PTR(self_in);
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bool ok = common_hal_nativeio_spi_write(self, src.buf, src.len);
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if (!ok) {
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nlr_raise(mp_obj_new_exception_msg(&mp_type_OSError, "SPI bus error"));
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}
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return mp_const_none;
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}
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MP_DEFINE_CONST_FUN_OBJ_2(nativeio_spi_write_obj, nativeio_spi_write);
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//| .. method:: SPI.readinto(buf)
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//|
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//| Read into the buffer specified by `!buf` while writing the data
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//| specified by `!write`.
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//| Return the number of bytes read.
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//|
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STATIC mp_obj_t nativeio_spi_readinto(size_t n_args, const mp_obj_t *args) {
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mp_buffer_info_t bufinfo;
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mp_get_buffer_raise(args[1], &bufinfo, MP_BUFFER_WRITE);
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bool ok = common_hal_nativeio_spi_read(args[0], bufinfo.buf, bufinfo.len);
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if (!ok) {
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nlr_raise(mp_obj_new_exception_msg(&mp_type_OSError, "SPI bus error"));
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}
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return mp_const_none;
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}
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MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(nativeio_spi_readinto_obj, 2, 2, nativeio_spi_readinto);
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STATIC const mp_rom_map_elem_t nativeio_spi_locals_dict_table[] = {
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{ MP_ROM_QSTR(MP_QSTR_deinit), MP_ROM_PTR(&nativeio_spi_deinit_obj) },
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{ MP_ROM_QSTR(MP_QSTR___enter__), MP_ROM_PTR(&nativeio_spi___enter___obj) },
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{ MP_ROM_QSTR(MP_QSTR___exit__), MP_ROM_PTR(&nativeio_spi_obj___exit___obj) },
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{ MP_ROM_QSTR(MP_QSTR_readinto), MP_ROM_PTR(&nativeio_spi_readinto_obj) },
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{ MP_ROM_QSTR(MP_QSTR_write), MP_ROM_PTR(&nativeio_spi_write_obj) },
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};
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STATIC MP_DEFINE_CONST_DICT(nativeio_spi_locals_dict, nativeio_spi_locals_dict_table);
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const mp_obj_type_t nativeio_spi_type = {
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{ &mp_type_type },
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.name = MP_QSTR_SPI,
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.make_new = nativeio_spi_make_new,
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.locals_dict = (mp_obj_dict_t*)&nativeio_spi_locals_dict,
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};
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