8dc8265275
The wifi event_handler runs on the other core so we need to be careful when calling into CP APIs. Fixes #6503
199 lines
7.6 KiB
C
199 lines
7.6 KiB
C
/*
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* This file is part of the MicroPython project, http://micropython.org/
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*
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* The MIT License (MIT)
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*
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* Copyright (c) 2016 Scott Shawcroft for Adafruit Industries
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* Copyright (c) 2019 Lucian Copeland for Adafruit Industries
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#include "py/obj.h"
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#include "py/mphal.h"
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#include "py/runtime.h"
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#include "common-hal/microcontroller/Pin.h"
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#include "common-hal/microcontroller/Processor.h"
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#include "shared-bindings/microcontroller/__init__.h"
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#include "shared-bindings/microcontroller/Pin.h"
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#include "shared-bindings/microcontroller/Processor.h"
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#include "shared-bindings/nvm/ByteArray.h"
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#include "supervisor/filesystem.h"
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#include "supervisor/shared/safe_mode.h"
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#include "freertos/FreeRTOS.h"
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#include "soc/rtc_cntl_reg.h"
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#include "esp_private/system_internal.h"
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#ifdef CONFIG_IDF_TARGET_ESP32C3
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#include "esp32c3/rom/rtc.h"
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#elif defined(CONFIG_IDF_TARGET_ESP32S2)
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#include "esp32s2/rom/rtc.h"
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#include "esp32s2/rom/usb/usb_persist.h"
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#include "esp32s2/rom/usb/chip_usb_dw_wrapper.h"
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#elif defined(CONFIG_IDF_TARGET_ESP32S3)
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#include "esp32s3/rom/rtc.h"
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#include "esp32s3/rom/usb/usb_persist.h"
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#include "esp32s3/rom/usb/chip_usb_dw_wrapper.h"
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#endif
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void common_hal_mcu_delay_us(uint32_t delay) {
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mp_hal_delay_us(delay);
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}
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volatile uint32_t nesting_count = 0;
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static portMUX_TYPE cp_mutex = portMUX_INITIALIZER_UNLOCKED;
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void common_hal_mcu_disable_interrupts(void) {
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assert(xPortGetCoreID() == CONFIG_ESP_MAIN_TASK_AFFINITY);
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if (nesting_count == 0) {
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portENTER_CRITICAL(&cp_mutex);
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}
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nesting_count++;
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}
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void common_hal_mcu_enable_interrupts(void) {
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assert(xPortGetCoreID() == CONFIG_ESP_MAIN_TASK_AFFINITY);
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assert(nesting_count > 0);
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nesting_count--;
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if (nesting_count > 0) {
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return;
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}
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portEXIT_CRITICAL(&cp_mutex);
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}
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void common_hal_mcu_on_next_reset(mcu_runmode_t runmode) {
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switch (runmode) {
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case RUNMODE_UF2:
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#ifndef CONFIG_IDF_TARGET_ESP32C3
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// 0x11F2 is APP_REQUEST_UF2_RESET_HINT & is defined by TinyUF2
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esp_reset_reason_set_hint(0x11F2);
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#endif
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break;
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case RUNMODE_NORMAL:
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// revert back to normal boot
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REG_WRITE(RTC_RESET_CAUSE_REG, 0); // reset uf2
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REG_WRITE(RTC_CNTL_STORE0_REG, 0); // reset safe mode
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REG_WRITE(RTC_CNTL_OPTION1_REG, 0); // reset bootloader
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break;
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case RUNMODE_SAFE_MODE:
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// enter safe mode on next boot
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safe_mode_on_next_reset(PROGRAMMATIC_SAFE_MODE);
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break;
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case RUNMODE_BOOTLOADER:
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// DFU download
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#ifndef CONFIG_IDF_TARGET_ESP32C3
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chip_usb_set_persist_flags(USBDC_BOOT_DFU);
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#endif
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REG_WRITE(RTC_CNTL_OPTION1_REG, RTC_CNTL_FORCE_DOWNLOAD_BOOT);
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break;
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default:
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break;
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}
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}
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void NORETURN common_hal_mcu_reset(void) {
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filesystem_flush(); // TODO: implement as part of flash improvements
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esp_restart();
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}
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// The singleton microcontroller.Processor object, bound to microcontroller.cpu
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// It currently only has properties, and no state.
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const mcu_processor_obj_t common_hal_mcu_processor_obj = {
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.base = {
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.type = &mcu_processor_type,
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},
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};
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#if CIRCUITPY_INTERNAL_NVM_SIZE > 0
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// The singleton nvm.ByteArray object.
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const nvm_bytearray_obj_t common_hal_mcu_nvm_obj = {
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.base = {
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.type = &nvm_bytearray_type,
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},
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.start_address = (uint8_t *)CIRCUITPY_INTERNAL_NVM_START_ADDR,
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.len = CIRCUITPY_INTERNAL_NVM_SIZE,
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};
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#endif
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#if CIRCUITPY_WATCHDOG
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// The singleton watchdog.WatchDogTimer object.
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watchdog_watchdogtimer_obj_t common_hal_mcu_watchdogtimer_obj = {
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.base = {
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.type = &watchdog_watchdogtimer_type,
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},
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.timeout = 0.0f,
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.mode = WATCHDOGMODE_NONE,
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};
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#endif
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// This maps MCU pin names to pin objects.
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STATIC const mp_rom_map_elem_t mcu_pin_global_dict_table[] = {
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{ MP_ROM_QSTR(MP_QSTR_GPIO0), MP_ROM_PTR(&pin_GPIO0) },
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{ MP_ROM_QSTR(MP_QSTR_GPIO1), MP_ROM_PTR(&pin_GPIO1) },
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{ MP_ROM_QSTR(MP_QSTR_GPIO2), MP_ROM_PTR(&pin_GPIO2) },
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{ MP_ROM_QSTR(MP_QSTR_GPIO3), MP_ROM_PTR(&pin_GPIO3) },
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{ MP_ROM_QSTR(MP_QSTR_GPIO4), MP_ROM_PTR(&pin_GPIO4) },
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{ MP_ROM_QSTR(MP_QSTR_GPIO5), MP_ROM_PTR(&pin_GPIO5) },
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{ MP_ROM_QSTR(MP_QSTR_GPIO6), MP_ROM_PTR(&pin_GPIO6) },
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{ MP_ROM_QSTR(MP_QSTR_GPIO7), MP_ROM_PTR(&pin_GPIO7) },
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{ MP_ROM_QSTR(MP_QSTR_GPIO8), MP_ROM_PTR(&pin_GPIO8) },
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{ MP_ROM_QSTR(MP_QSTR_GPIO9), MP_ROM_PTR(&pin_GPIO9) },
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{ MP_ROM_QSTR(MP_QSTR_GPIO10), MP_ROM_PTR(&pin_GPIO10) },
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{ MP_ROM_QSTR(MP_QSTR_GPIO11), MP_ROM_PTR(&pin_GPIO11) },
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{ MP_ROM_QSTR(MP_QSTR_GPIO12), MP_ROM_PTR(&pin_GPIO12) },
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{ MP_ROM_QSTR(MP_QSTR_GPIO13), MP_ROM_PTR(&pin_GPIO13) },
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{ MP_ROM_QSTR(MP_QSTR_GPIO14), MP_ROM_PTR(&pin_GPIO14) },
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{ MP_ROM_QSTR(MP_QSTR_GPIO15), MP_ROM_PTR(&pin_GPIO15) },
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{ MP_ROM_QSTR(MP_QSTR_GPIO16), MP_ROM_PTR(&pin_GPIO16) },
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{ MP_ROM_QSTR(MP_QSTR_GPIO17), MP_ROM_PTR(&pin_GPIO17) },
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{ MP_ROM_QSTR(MP_QSTR_GPIO18), MP_ROM_PTR(&pin_GPIO18) },
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{ MP_ROM_QSTR(MP_QSTR_GPIO19), MP_ROM_PTR(&pin_GPIO19) },
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{ MP_ROM_QSTR(MP_QSTR_GPIO20), MP_ROM_PTR(&pin_GPIO20) },
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{ MP_ROM_QSTR(MP_QSTR_GPIO21), MP_ROM_PTR(&pin_GPIO21) },
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#ifndef CONFIG_IDF_TARGET_ESP32C3
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{ MP_ROM_QSTR(MP_QSTR_GPIO26), MP_ROM_PTR(&pin_GPIO26) },
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{ MP_ROM_QSTR(MP_QSTR_GPIO27), MP_ROM_PTR(&pin_GPIO27) },
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{ MP_ROM_QSTR(MP_QSTR_GPIO28), MP_ROM_PTR(&pin_GPIO28) },
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{ MP_ROM_QSTR(MP_QSTR_GPIO29), MP_ROM_PTR(&pin_GPIO29) },
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{ MP_ROM_QSTR(MP_QSTR_GPIO30), MP_ROM_PTR(&pin_GPIO30) },
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{ MP_ROM_QSTR(MP_QSTR_GPIO31), MP_ROM_PTR(&pin_GPIO31) },
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{ MP_ROM_QSTR(MP_QSTR_GPIO32), MP_ROM_PTR(&pin_GPIO32) },
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{ MP_ROM_QSTR(MP_QSTR_GPIO33), MP_ROM_PTR(&pin_GPIO33) },
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{ MP_ROM_QSTR(MP_QSTR_GPIO34), MP_ROM_PTR(&pin_GPIO34) },
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{ MP_ROM_QSTR(MP_QSTR_GPIO35), MP_ROM_PTR(&pin_GPIO35) },
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{ MP_ROM_QSTR(MP_QSTR_GPIO36), MP_ROM_PTR(&pin_GPIO36) },
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{ MP_ROM_QSTR(MP_QSTR_GPIO37), MP_ROM_PTR(&pin_GPIO37) },
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{ MP_ROM_QSTR(MP_QSTR_GPIO38), MP_ROM_PTR(&pin_GPIO38) },
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{ MP_ROM_QSTR(MP_QSTR_GPIO39), MP_ROM_PTR(&pin_GPIO39) },
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{ MP_ROM_QSTR(MP_QSTR_GPIO40), MP_ROM_PTR(&pin_GPIO40) },
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{ MP_ROM_QSTR(MP_QSTR_GPIO41), MP_ROM_PTR(&pin_GPIO41) },
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{ MP_ROM_QSTR(MP_QSTR_GPIO42), MP_ROM_PTR(&pin_GPIO42) },
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{ MP_ROM_QSTR(MP_QSTR_GPIO43), MP_ROM_PTR(&pin_GPIO43) },
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{ MP_ROM_QSTR(MP_QSTR_GPIO44), MP_ROM_PTR(&pin_GPIO44) },
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{ MP_ROM_QSTR(MP_QSTR_GPIO45), MP_ROM_PTR(&pin_GPIO45) },
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{ MP_ROM_QSTR(MP_QSTR_GPIO46), MP_ROM_PTR(&pin_GPIO46) },
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#endif
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};
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MP_DEFINE_CONST_DICT(mcu_pin_globals, mcu_pin_global_dict_table);
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