550 lines
18 KiB
C
550 lines
18 KiB
C
/*
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* This file is part of the MicroPython project, http://micropython.org/
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*
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* The MIT License (MIT)
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*
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* Copyright (c) 2017 "Eric Poulsen" <eric@zyxod.com>
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#include <stdio.h>
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#include <stdint.h>
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#include <string.h>
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#include "py/runtime.h"
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#include "py/stream.h"
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#include "py/mphal.h"
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#include "extmod/machine_spi.h"
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#include "modmachine.h"
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#include "driver/spi_master.h"
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#include "soc/gpio_sig_map.h"
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#include "soc/spi_pins.h"
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// SPI mappings by device, naming used by IDF old/new
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// upython | ESP32 | ESP32S2 | ESP32S3 | ESP32C3
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// ----------+-----------+-----------+---------+---------
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// SPI(id=1) | HSPI/SPI2 | FSPI/SPI2 | SPI2 | SPI2
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// SPI(id=2) | VSPI/SPI3 | HSPI/SPI3 | SPI3 | err
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// Default pins for SPI(id=1) aka IDF SPI2, can be overridden by a board
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#ifndef MICROPY_HW_SPI1_SCK
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// Use IO_MUX pins by default.
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// If SPI lines are routed to other pins through GPIO matrix
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// routing adds some delay and lower limit applies to SPI clk freq
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#define MICROPY_HW_SPI1_SCK SPI2_IOMUX_PIN_NUM_CLK
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#define MICROPY_HW_SPI1_MOSI SPI2_IOMUX_PIN_NUM_MOSI
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#define MICROPY_HW_SPI1_MISO SPI2_IOMUX_PIN_NUM_MISO
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#endif
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// Default pins for SPI(id=2) aka IDF SPI3, can be overridden by a board
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#ifndef MICROPY_HW_SPI2_SCK
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#if CONFIG_IDF_TARGET_ESP32
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// ESP32 has IO_MUX pins for VSPI/SPI3 lines, use them as defaults
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#define MICROPY_HW_SPI2_SCK SPI3_IOMUX_PIN_NUM_CLK // pin 18
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#define MICROPY_HW_SPI2_MOSI SPI3_IOMUX_PIN_NUM_MOSI // pin 23
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#define MICROPY_HW_SPI2_MISO SPI3_IOMUX_PIN_NUM_MISO // pin 19
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#elif CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3
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// ESP32S2 and S3 uses GPIO matrix for SPI3 pins, no IO_MUX possible
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// Set defaults to the pins used by SPI2 in Octal mode
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#define MICROPY_HW_SPI2_SCK (36)
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#define MICROPY_HW_SPI2_MOSI (35)
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#define MICROPY_HW_SPI2_MISO (37)
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#endif
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#endif
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#define MP_HW_SPI_MAX_XFER_BYTES (4092)
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#define MP_HW_SPI_MAX_XFER_BITS (MP_HW_SPI_MAX_XFER_BYTES * 8) // Has to be an even multiple of 8
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#if CONFIG_IDF_TARGET_ESP32C3
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#define SPI2_HOST SPI2_HOST
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#elif CONFIG_IDF_TARGET_ESP32S3
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#define SPI2_HOST SPI3_HOST
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#define FSPI_HOST SPI2_HOST
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#endif
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typedef struct _machine_hw_spi_default_pins_t {
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int8_t sck;
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int8_t mosi;
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int8_t miso;
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} machine_hw_spi_default_pins_t;
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typedef struct _machine_hw_spi_obj_t {
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mp_obj_base_t base;
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spi_host_device_t host;
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uint32_t baudrate;
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uint8_t polarity;
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uint8_t phase;
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uint8_t bits;
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uint8_t firstbit;
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int8_t sck;
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int8_t mosi;
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int8_t miso;
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spi_device_handle_t spi;
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enum {
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MACHINE_HW_SPI_STATE_NONE,
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MACHINE_HW_SPI_STATE_INIT,
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MACHINE_HW_SPI_STATE_DEINIT
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} state;
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} machine_hw_spi_obj_t;
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// Default pin mappings for the hardware SPI instances
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STATIC const machine_hw_spi_default_pins_t machine_hw_spi_default_pins[2] = {
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{ .sck = MICROPY_HW_SPI1_SCK, .mosi = MICROPY_HW_SPI1_MOSI, .miso = MICROPY_HW_SPI1_MISO },
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#ifdef MICROPY_HW_SPI2_SCK
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{ .sck = MICROPY_HW_SPI2_SCK, .mosi = MICROPY_HW_SPI2_MOSI, .miso = MICROPY_HW_SPI2_MISO },
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#endif
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};
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// Static objects mapping to SPI2 and SPI3 hardware peripherals
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STATIC machine_hw_spi_obj_t machine_hw_spi_obj[2];
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STATIC void machine_hw_spi_deinit_internal(machine_hw_spi_obj_t *self) {
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switch (spi_bus_remove_device(self->spi)) {
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case ESP_ERR_INVALID_ARG:
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mp_raise_msg(&mp_type_OSError, MP_ERROR_TEXT("invalid configuration"));
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return;
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case ESP_ERR_INVALID_STATE:
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mp_raise_msg(&mp_type_OSError, MP_ERROR_TEXT("SPI device already freed"));
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return;
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}
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switch (spi_bus_free(self->host)) {
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case ESP_ERR_INVALID_ARG:
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mp_raise_msg(&mp_type_OSError, MP_ERROR_TEXT("invalid configuration"));
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return;
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case ESP_ERR_INVALID_STATE:
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mp_raise_msg(&mp_type_OSError, MP_ERROR_TEXT("SPI bus already freed"));
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return;
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}
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int8_t pins[3] = {self->miso, self->mosi, self->sck};
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for (int i = 0; i < 3; i++) {
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if (pins[i] != -1) {
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esp_rom_gpio_pad_select_gpio(pins[i]);
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esp_rom_gpio_connect_out_signal(pins[i], SIG_GPIO_OUT_IDX, false, false);
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gpio_set_direction(pins[i], GPIO_MODE_INPUT);
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}
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}
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}
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STATIC void machine_hw_spi_init_internal(
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machine_hw_spi_obj_t *self,
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int8_t host,
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int32_t baudrate,
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int8_t polarity,
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int8_t phase,
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int8_t bits,
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int8_t firstbit,
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int8_t sck,
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int8_t mosi,
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int8_t miso) {
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// if we're not initialized, then we're
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// implicitly 'changed', since this is the init routine
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bool changed = self->state != MACHINE_HW_SPI_STATE_INIT;
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esp_err_t ret;
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machine_hw_spi_obj_t old_self = *self;
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if (host != -1 && host != self->host) {
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self->host = host;
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changed = true;
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}
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if (baudrate != -1) {
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// calculate the actual clock frequency that the SPI peripheral can produce
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baudrate = spi_get_actual_clock(APB_CLK_FREQ, baudrate, 0);
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if (baudrate != self->baudrate) {
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self->baudrate = baudrate;
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changed = true;
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}
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}
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if (polarity != -1 && polarity != self->polarity) {
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self->polarity = polarity;
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changed = true;
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}
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if (phase != -1 && phase != self->phase) {
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self->phase = phase;
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changed = true;
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}
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if (bits != -1 && bits != self->bits) {
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self->bits = bits;
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changed = true;
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}
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if (firstbit != -1 && firstbit != self->firstbit) {
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self->firstbit = firstbit;
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changed = true;
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}
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if (sck != -2 && sck != self->sck) {
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self->sck = sck;
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changed = true;
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}
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if (mosi != -2 && mosi != self->mosi) {
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self->mosi = mosi;
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changed = true;
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}
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if (miso != -2 && miso != self->miso) {
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self->miso = miso;
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changed = true;
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}
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if (self->host != SPI2_HOST
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#ifdef FSPI_HOST
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&& self->host != FSPI_HOST
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#endif
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#if SOC_SPI_PERIPH_NUM > 2
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&& self->host != SPI3_HOST
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#endif
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) {
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mp_raise_msg_varg(&mp_type_ValueError, MP_ERROR_TEXT("SPI(%d) doesn't exist"), self->host);
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}
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if (changed) {
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if (self->state == MACHINE_HW_SPI_STATE_INIT) {
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self->state = MACHINE_HW_SPI_STATE_DEINIT;
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machine_hw_spi_deinit_internal(&old_self);
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}
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} else {
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return; // no changes
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}
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spi_bus_config_t buscfg = {
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.miso_io_num = self->miso,
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.mosi_io_num = self->mosi,
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.sclk_io_num = self->sck,
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.quadwp_io_num = -1,
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.quadhd_io_num = -1
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};
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spi_device_interface_config_t devcfg = {
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.clock_speed_hz = self->baudrate,
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.mode = self->phase | (self->polarity << 1),
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.spics_io_num = -1, // No CS pin
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.queue_size = 2,
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.flags = self->firstbit == MICROPY_PY_MACHINE_SPI_LSB ? SPI_DEVICE_TXBIT_LSBFIRST | SPI_DEVICE_RXBIT_LSBFIRST : 0,
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.pre_cb = NULL
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};
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// Initialize the SPI bus
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// Select DMA channel based on the hardware SPI host
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int dma_chan = 0;
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#if CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32C3
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dma_chan = SPI_DMA_CH_AUTO;
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#else
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if (self->host == SPI2_HOST) {
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dma_chan = 1;
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} else {
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dma_chan = 2;
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}
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#endif
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ret = spi_bus_initialize(self->host, &buscfg, dma_chan);
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switch (ret) {
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case ESP_ERR_INVALID_ARG:
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mp_raise_msg(&mp_type_OSError, MP_ERROR_TEXT("invalid configuration"));
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return;
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case ESP_ERR_INVALID_STATE:
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mp_raise_msg(&mp_type_OSError, MP_ERROR_TEXT("SPI host already in use"));
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return;
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}
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ret = spi_bus_add_device(self->host, &devcfg, &self->spi);
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switch (ret) {
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case ESP_ERR_INVALID_ARG:
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mp_raise_msg(&mp_type_OSError, MP_ERROR_TEXT("invalid configuration"));
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spi_bus_free(self->host);
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return;
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case ESP_ERR_NO_MEM:
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mp_raise_msg(&mp_type_OSError, MP_ERROR_TEXT("out of memory"));
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spi_bus_free(self->host);
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return;
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case ESP_ERR_NOT_FOUND:
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mp_raise_msg(&mp_type_OSError, MP_ERROR_TEXT("no free slots"));
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spi_bus_free(self->host);
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return;
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}
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self->state = MACHINE_HW_SPI_STATE_INIT;
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}
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STATIC void machine_hw_spi_deinit(mp_obj_base_t *self_in) {
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machine_hw_spi_obj_t *self = (machine_hw_spi_obj_t *)self_in;
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if (self->state == MACHINE_HW_SPI_STATE_INIT) {
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self->state = MACHINE_HW_SPI_STATE_DEINIT;
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machine_hw_spi_deinit_internal(self);
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}
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}
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STATIC mp_uint_t gcd(mp_uint_t x, mp_uint_t y) {
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while (x != y) {
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if (x > y) {
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x -= y;
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} else {
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y -= x;
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}
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}
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return x;
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}
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STATIC void machine_hw_spi_transfer(mp_obj_base_t *self_in, size_t len, const uint8_t *src, uint8_t *dest) {
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machine_hw_spi_obj_t *self = MP_OBJ_TO_PTR(self_in);
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if (self->state == MACHINE_HW_SPI_STATE_DEINIT) {
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mp_raise_msg(&mp_type_OSError, MP_ERROR_TEXT("transfer on deinitialized SPI"));
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return;
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}
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// Round to nearest whole set of bits
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int bits_to_send = len * 8 / self->bits * self->bits;
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if (!bits_to_send) {
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mp_raise_ValueError(MP_ERROR_TEXT("buffer too short"));
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}
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if (len <= 4) {
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spi_transaction_t transaction = { 0 };
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if (src != NULL) {
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memcpy(&transaction.tx_data, src, len);
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}
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transaction.flags = SPI_TRANS_USE_TXDATA | SPI_TRANS_USE_RXDATA;
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transaction.length = bits_to_send;
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spi_device_transmit(self->spi, &transaction);
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if (dest != NULL) {
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memcpy(dest, &transaction.rx_data, len);
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}
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} else {
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int offset = 0;
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int bits_remaining = bits_to_send;
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int optimum_word_size = 8 * self->bits / gcd(8, self->bits);
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int max_transaction_bits = MP_HW_SPI_MAX_XFER_BITS / optimum_word_size * optimum_word_size;
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spi_transaction_t *transaction, *result, transactions[2];
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int i = 0;
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spi_device_acquire_bus(self->spi, portMAX_DELAY);
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while (bits_remaining) {
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transaction = transactions + i++ % 2;
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memset(transaction, 0, sizeof(spi_transaction_t));
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transaction->length =
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bits_remaining > max_transaction_bits ? max_transaction_bits : bits_remaining;
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if (src != NULL) {
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transaction->tx_buffer = src + offset;
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}
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if (dest != NULL) {
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transaction->rx_buffer = dest + offset;
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}
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spi_device_queue_trans(self->spi, transaction, portMAX_DELAY);
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bits_remaining -= transaction->length;
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if (offset > 0) {
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// wait for previously queued transaction
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MP_THREAD_GIL_EXIT();
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spi_device_get_trans_result(self->spi, &result, portMAX_DELAY);
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MP_THREAD_GIL_ENTER();
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}
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// doesn't need ceil(); loop ends when bits_remaining is 0
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offset += transaction->length / 8;
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}
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// wait for last transaction
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MP_THREAD_GIL_EXIT();
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spi_device_get_trans_result(self->spi, &result, portMAX_DELAY);
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MP_THREAD_GIL_ENTER();
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spi_device_release_bus(self->spi);
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}
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}
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/******************************************************************************/
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// MicroPython bindings for hw_spi
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STATIC void machine_hw_spi_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) {
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machine_hw_spi_obj_t *self = MP_OBJ_TO_PTR(self_in);
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mp_printf(print, "SPI(id=%u, baudrate=%u, polarity=%u, phase=%u, bits=%u, firstbit=%u, sck=%d, mosi=%d, miso=%d)",
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self->host, self->baudrate, self->polarity,
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self->phase, self->bits, self->firstbit,
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self->sck, self->mosi, self->miso);
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}
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STATIC void machine_hw_spi_init(mp_obj_base_t *self_in, size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) {
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machine_hw_spi_obj_t *self = (machine_hw_spi_obj_t *)self_in;
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enum { ARG_id, ARG_baudrate, ARG_polarity, ARG_phase, ARG_bits, ARG_firstbit, ARG_sck, ARG_mosi, ARG_miso };
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static const mp_arg_t allowed_args[] = {
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{ MP_QSTR_id, MP_ARG_INT, {.u_int = -1} },
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{ MP_QSTR_baudrate, MP_ARG_INT, {.u_int = -1} },
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{ MP_QSTR_polarity, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = -1} },
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{ MP_QSTR_phase, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = -1} },
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{ MP_QSTR_bits, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = -1} },
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{ MP_QSTR_firstbit, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = -1} },
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{ MP_QSTR_sck, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} },
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{ MP_QSTR_mosi, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} },
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{ MP_QSTR_miso, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} },
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};
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mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)];
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mp_arg_parse_all(n_args, pos_args, kw_args, MP_ARRAY_SIZE(allowed_args),
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allowed_args, args);
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int8_t sck, mosi, miso;
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if (args[ARG_sck].u_obj == MP_OBJ_NULL) {
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sck = -2;
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} else if (args[ARG_sck].u_obj == mp_const_none) {
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sck = -1;
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} else {
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sck = machine_pin_get_id(args[ARG_sck].u_obj);
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}
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if (args[ARG_miso].u_obj == MP_OBJ_NULL) {
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miso = -2;
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} else if (args[ARG_miso].u_obj == mp_const_none) {
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miso = -1;
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} else {
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miso = machine_pin_get_id(args[ARG_miso].u_obj);
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}
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if (args[ARG_mosi].u_obj == MP_OBJ_NULL) {
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mosi = -2;
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} else if (args[ARG_mosi].u_obj == mp_const_none) {
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mosi = -1;
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} else {
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mosi = machine_pin_get_id(args[ARG_mosi].u_obj);
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}
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machine_hw_spi_init_internal(self, args[ARG_id].u_int, args[ARG_baudrate].u_int,
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args[ARG_polarity].u_int, args[ARG_phase].u_int, args[ARG_bits].u_int,
|
|
args[ARG_firstbit].u_int, sck, mosi, miso);
|
|
}
|
|
|
|
mp_obj_t machine_hw_spi_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *all_args) {
|
|
MP_MACHINE_SPI_CHECK_FOR_LEGACY_SOFTSPI_CONSTRUCTION(n_args, n_kw, all_args);
|
|
|
|
enum { ARG_id, ARG_baudrate, ARG_polarity, ARG_phase, ARG_bits, ARG_firstbit, ARG_sck, ARG_mosi, ARG_miso };
|
|
static const mp_arg_t allowed_args[] = {
|
|
{ MP_QSTR_id, MP_ARG_REQUIRED | MP_ARG_INT, {.u_int = -1} },
|
|
{ MP_QSTR_baudrate, MP_ARG_INT, {.u_int = 500000} },
|
|
{ MP_QSTR_polarity, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 0} },
|
|
{ MP_QSTR_phase, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 0} },
|
|
{ MP_QSTR_bits, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 8} },
|
|
{ MP_QSTR_firstbit, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = MICROPY_PY_MACHINE_SPI_MSB} },
|
|
{ MP_QSTR_sck, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} },
|
|
{ MP_QSTR_mosi, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} },
|
|
{ MP_QSTR_miso, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} },
|
|
};
|
|
mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)];
|
|
mp_arg_parse_all_kw_array(n_args, n_kw, all_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args);
|
|
|
|
machine_hw_spi_obj_t *self;
|
|
const machine_hw_spi_default_pins_t *default_pins;
|
|
if (args[ARG_id].u_int == 1) { // SPI2_HOST which is FSPI_HOST on ESP32Sx, SPI2_HOST on others
|
|
self = &machine_hw_spi_obj[0];
|
|
default_pins = &machine_hw_spi_default_pins[0];
|
|
} else {
|
|
self = &machine_hw_spi_obj[1];
|
|
default_pins = &machine_hw_spi_default_pins[1];
|
|
}
|
|
self->base.type = &machine_spi_type;
|
|
|
|
int8_t sck, mosi, miso;
|
|
|
|
if (args[ARG_sck].u_obj == MP_OBJ_NULL) {
|
|
sck = default_pins->sck;
|
|
} else if (args[ARG_sck].u_obj == mp_const_none) {
|
|
sck = -1;
|
|
} else {
|
|
sck = machine_pin_get_id(args[ARG_sck].u_obj);
|
|
}
|
|
|
|
if (args[ARG_mosi].u_obj == MP_OBJ_NULL) {
|
|
mosi = default_pins->mosi;
|
|
} else if (args[ARG_mosi].u_obj == mp_const_none) {
|
|
mosi = -1;
|
|
} else {
|
|
mosi = machine_pin_get_id(args[ARG_mosi].u_obj);
|
|
}
|
|
|
|
if (args[ARG_miso].u_obj == MP_OBJ_NULL) {
|
|
miso = default_pins->miso;
|
|
} else if (args[ARG_miso].u_obj == mp_const_none) {
|
|
miso = -1;
|
|
} else {
|
|
miso = machine_pin_get_id(args[ARG_miso].u_obj);
|
|
}
|
|
|
|
machine_hw_spi_init_internal(
|
|
self,
|
|
args[ARG_id].u_int,
|
|
args[ARG_baudrate].u_int,
|
|
args[ARG_polarity].u_int,
|
|
args[ARG_phase].u_int,
|
|
args[ARG_bits].u_int,
|
|
args[ARG_firstbit].u_int,
|
|
sck,
|
|
mosi,
|
|
miso);
|
|
|
|
return MP_OBJ_FROM_PTR(self);
|
|
}
|
|
|
|
spi_host_device_t machine_hw_spi_get_host(mp_obj_t in) {
|
|
if (mp_obj_get_type(in) != &machine_spi_type) {
|
|
mp_raise_ValueError(MP_ERROR_TEXT("expecting a SPI object"));
|
|
}
|
|
machine_hw_spi_obj_t *self = (machine_hw_spi_obj_t *)in;
|
|
return self->host;
|
|
}
|
|
|
|
STATIC const mp_machine_spi_p_t machine_hw_spi_p = {
|
|
.init = machine_hw_spi_init,
|
|
.deinit = machine_hw_spi_deinit,
|
|
.transfer = machine_hw_spi_transfer,
|
|
};
|
|
|
|
MP_DEFINE_CONST_OBJ_TYPE(
|
|
machine_spi_type,
|
|
MP_QSTR_SPI,
|
|
MP_TYPE_FLAG_NONE,
|
|
make_new, machine_hw_spi_make_new,
|
|
print, machine_hw_spi_print,
|
|
protocol, &machine_hw_spi_p,
|
|
locals_dict, &mp_machine_spi_locals_dict
|
|
);
|