f4942db044
These files come from STM32Cube_FW_L4_V1.3.0, with Windows line endings converted to unix. Only basic HAL files are added. In addition the QSPI support is included to support later external QSPI flash as mass storage.
666 lines
29 KiB
C
666 lines
29 KiB
C
/**
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******************************************************************************
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* @file stm32l4xx_hal_i2c.h
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* @author MCD Application Team
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* @version V1.3.0
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* @date 29-January-2016
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* @brief Header file of I2C HAL module.
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******************************************************************************
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* @attention
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*
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* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
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*
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* Redistribution and use in source and binary forms, with or without modification,
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* are permitted provided that the following conditions are met:
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* 1. Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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* 3. Neither the name of STMicroelectronics nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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******************************************************************************
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*/
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/* Define to prevent recursive inclusion -------------------------------------*/
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#ifndef __STM32L4xx_HAL_I2C_H
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#define __STM32L4xx_HAL_I2C_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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/* Includes ------------------------------------------------------------------*/
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#include "stm32l4xx_hal_def.h"
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/** @addtogroup STM32L4xx_HAL_Driver
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* @{
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*/
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/** @addtogroup I2C
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* @{
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*/
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/* Exported types ------------------------------------------------------------*/
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/** @defgroup I2C_Exported_Types I2C Exported Types
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* @{
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*/
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/** @defgroup I2C_Configuration_Structure_definition I2C Configuration Structure definition
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* @brief I2C Configuration Structure definition
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* @{
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*/
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typedef struct
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{
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uint32_t Timing; /*!< Specifies the I2C_TIMINGR_register value.
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This parameter calculated by referring to I2C initialization
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section in Reference manual */
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uint32_t OwnAddress1; /*!< Specifies the first device own address.
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This parameter can be a 7-bit or 10-bit address. */
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uint32_t AddressingMode; /*!< Specifies if 7-bit or 10-bit addressing mode is selected.
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This parameter can be a value of @ref I2C_addressing_mode */
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uint32_t DualAddressMode; /*!< Specifies if dual addressing mode is selected.
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This parameter can be a value of @ref I2C_dual_addressing_mode */
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uint32_t OwnAddress2; /*!< Specifies the second device own address if dual addressing mode is selected
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This parameter can be a 7-bit address. */
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uint32_t OwnAddress2Masks; /*!< Specifies the acknowledge mask address second device own address if dual addressing mode is selected
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This parameter can be a value of @ref I2C_own_address2_masks */
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uint32_t GeneralCallMode; /*!< Specifies if general call mode is selected.
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This parameter can be a value of @ref I2C_general_call_addressing_mode */
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uint32_t NoStretchMode; /*!< Specifies if nostretch mode is selected.
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This parameter can be a value of @ref I2C_nostretch_mode */
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}I2C_InitTypeDef;
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/**
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* @}
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*/
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/** @defgroup HAL_state_structure_definition HAL state structure definition
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* @brief HAL State structure definition
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* @{
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*/
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typedef enum
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{
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HAL_I2C_STATE_RESET = 0x00, /*!< Peripheral is not yet Initialized */
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HAL_I2C_STATE_READY = 0x20, /*!< Peripheral Initialized and ready for use */
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HAL_I2C_STATE_BUSY = 0x24, /*!< An internal process is ongoing */
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HAL_I2C_STATE_BUSY_TX = 0x21, /*!< Data Transmission process is ongoing */
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HAL_I2C_STATE_BUSY_RX = 0x22, /*!< Data Reception process is ongoing */
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HAL_I2C_STATE_LISTEN = 0x28, /*!< Address Listen Mode is ongoing */
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HAL_I2C_STATE_BUSY_TX_LISTEN = 0x29, /*!< Address Listen Mode and Data Transmission
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process is ongoing */
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HAL_I2C_STATE_BUSY_RX_LISTEN = 0x2A, /*!< Address Listen Mode and Data Reception
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process is ongoing */
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HAL_I2C_STATE_TIMEOUT = 0xA0, /*!< Timeout state */
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HAL_I2C_STATE_ERROR = 0xE0 /*!< Error */
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}HAL_I2C_StateTypeDef;
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/**
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* @}
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*/
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/** @defgroup HAL_mode_structure_definition HAL mode structure definition
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* @brief HAL Mode structure definition
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* @{
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*/
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typedef enum
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{
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HAL_I2C_MODE_NONE = 0x00, /*!< No I2C communication on going */
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HAL_I2C_MODE_MASTER = 0x10, /*!< I2C communication is in Master Mode */
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HAL_I2C_MODE_SLAVE = 0x20, /*!< I2C communication is in Slave Mode */
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HAL_I2C_MODE_MEM = 0x40 /*!< I2C communication is in Memory Mode */
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}HAL_I2C_ModeTypeDef;
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/**
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* @}
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*/
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/** @defgroup I2C_Error_Code_definition I2C Error Code definition
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* @brief I2C Error Code definition
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* @{
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*/
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#define HAL_I2C_ERROR_NONE ((uint32_t)0x00000000) /*!< No error */
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#define HAL_I2C_ERROR_BERR ((uint32_t)0x00000001) /*!< BERR error */
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#define HAL_I2C_ERROR_ARLO ((uint32_t)0x00000002) /*!< ARLO error */
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#define HAL_I2C_ERROR_AF ((uint32_t)0x00000004) /*!< ACKF error */
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#define HAL_I2C_ERROR_OVR ((uint32_t)0x00000008) /*!< OVR error */
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#define HAL_I2C_ERROR_DMA ((uint32_t)0x00000010) /*!< DMA transfer error */
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#define HAL_I2C_ERROR_TIMEOUT ((uint32_t)0x00000020) /*!< Timeout error */
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#define HAL_I2C_ERROR_SIZE ((uint32_t)0x00000040) /*!< Size Management error */
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/**
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* @}
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*/
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/** @defgroup I2C_XferOptions_definition I2C XferOptions definition
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* @{
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*/
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#define I2C_NO_OPTION_FRAME ((uint32_t)0xFFFF0000)
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#define I2C_FIRST_FRAME ((uint32_t)I2C_SOFTEND_MODE)
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#define I2C_NEXT_FRAME ((uint32_t)(I2C_RELOAD_MODE | I2C_SOFTEND_MODE))
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#define I2C_FIRST_AND_LAST_FRAME ((uint32_t)I2C_AUTOEND_MODE)
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#define I2C_LAST_FRAME ((uint32_t)I2C_AUTOEND_MODE)
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/**
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* @}
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*/
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/** @defgroup I2C_handle_Structure_definition I2C handle Structure definition
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* @brief I2C handle Structure definition
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* @{
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*/
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typedef struct
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{
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I2C_TypeDef *Instance; /*!< I2C registers base address */
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I2C_InitTypeDef Init; /*!< I2C communication parameters */
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uint8_t *pBuffPtr; /*!< Pointer to I2C transfer buffer */
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uint16_t XferSize; /*!< I2C transfer size */
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__IO uint16_t XferCount; /*!< I2C transfer counter */
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__IO uint32_t XferOptions; /*!< I2C transfer options */
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__IO uint32_t PreviousState; /*!< I2C communication Previous state */
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DMA_HandleTypeDef *hdmatx; /*!< I2C Tx DMA handle parameters */
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DMA_HandleTypeDef *hdmarx; /*!< I2C Rx DMA handle parameters */
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HAL_LockTypeDef Lock; /*!< I2C locking object */
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__IO HAL_I2C_StateTypeDef State; /*!< I2C communication state */
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__IO HAL_I2C_ModeTypeDef Mode; /*!< I2C communication mode */
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__IO uint32_t ErrorCode; /*!< I2C Error code */
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__IO uint32_t AddrEventCount; /*!< I2C Address Event counter */
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}I2C_HandleTypeDef;
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/**
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* @}
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*/
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/**
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* @}
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*/
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/* Exported constants --------------------------------------------------------*/
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/** @defgroup I2C_Exported_Constants I2C Exported Constants
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* @{
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*/
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/** @defgroup I2C_addressing_mode I2C addressing mode
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* @{
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*/
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#define I2C_ADDRESSINGMODE_7BIT ((uint32_t)0x00000001)
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#define I2C_ADDRESSINGMODE_10BIT ((uint32_t)0x00000002)
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/**
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* @}
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*/
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/** @defgroup I2C_dual_addressing_mode I2C dual addressing mode
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* @{
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*/
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#define I2C_DUALADDRESS_DISABLE ((uint32_t)0x00000000)
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#define I2C_DUALADDRESS_ENABLE I2C_OAR2_OA2EN
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/**
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* @}
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*/
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/** @defgroup I2C_own_address2_masks I2C own address2 masks
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* @{
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*/
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#define I2C_OA2_NOMASK ((uint8_t)0x00)
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#define I2C_OA2_MASK01 ((uint8_t)0x01)
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#define I2C_OA2_MASK02 ((uint8_t)0x02)
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#define I2C_OA2_MASK03 ((uint8_t)0x03)
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#define I2C_OA2_MASK04 ((uint8_t)0x04)
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#define I2C_OA2_MASK05 ((uint8_t)0x05)
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#define I2C_OA2_MASK06 ((uint8_t)0x06)
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#define I2C_OA2_MASK07 ((uint8_t)0x07)
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/**
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* @}
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*/
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/** @defgroup I2C_general_call_addressing_mode I2C general call addressing mode
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* @{
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*/
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#define I2C_GENERALCALL_DISABLE ((uint32_t)0x00000000)
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#define I2C_GENERALCALL_ENABLE I2C_CR1_GCEN
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/**
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* @}
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*/
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/** @defgroup I2C_nostretch_mode I2C nostretch mode
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* @{
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*/
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#define I2C_NOSTRETCH_DISABLE ((uint32_t)0x00000000)
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#define I2C_NOSTRETCH_ENABLE I2C_CR1_NOSTRETCH
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/**
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* @}
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*/
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/** @defgroup I2C_Memory_Address_Size I2C Memory Address Size
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* @{
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*/
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#define I2C_MEMADD_SIZE_8BIT ((uint32_t)0x00000001)
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#define I2C_MEMADD_SIZE_16BIT ((uint32_t)0x00000002)
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/**
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* @}
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*/
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/** @defgroup I2C_XferDirection_definition I2C XferDirection definition
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* @{
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*/
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#define I2C_DIRECTION_TRANSMIT ((uint32_t)0x00000000)
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#define I2C_DIRECTION_RECEIVE ((uint32_t)0x00000001)
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/**
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* @}
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*/
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/** @defgroup I2C_ReloadEndMode_definition I2C ReloadEndMode definition
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* @{
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*/
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#define I2C_RELOAD_MODE I2C_CR2_RELOAD
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#define I2C_AUTOEND_MODE I2C_CR2_AUTOEND
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#define I2C_SOFTEND_MODE ((uint32_t)0x00000000)
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/**
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* @}
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*/
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/** @defgroup I2C_StartStopMode_definition I2C StartStopMode definition
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* @{
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*/
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#define I2C_NO_STARTSTOP ((uint32_t)0x00000000)
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#define I2C_GENERATE_STOP I2C_CR2_STOP
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#define I2C_GENERATE_START_READ (uint32_t)(I2C_CR2_START | I2C_CR2_RD_WRN)
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#define I2C_GENERATE_START_WRITE I2C_CR2_START
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/**
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* @}
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*/
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/** @defgroup I2C_Interrupt_configuration_definition I2C Interrupt configuration definition
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* @brief I2C Interrupt definition
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* Elements values convention: 0xXXXXXXXX
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* - XXXXXXXX : Interrupt control mask
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* @{
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*/
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#define I2C_IT_ERRI I2C_CR1_ERRIE
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#define I2C_IT_TCI I2C_CR1_TCIE
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#define I2C_IT_STOPI I2C_CR1_STOPIE
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#define I2C_IT_NACKI I2C_CR1_NACKIE
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#define I2C_IT_ADDRI I2C_CR1_ADDRIE
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#define I2C_IT_RXI I2C_CR1_RXIE
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#define I2C_IT_TXI I2C_CR1_TXIE
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/**
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* @}
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*/
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/** @defgroup I2C_Flag_definition I2C Flag definition
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* @{
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*/
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#define I2C_FLAG_TXE I2C_ISR_TXE
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#define I2C_FLAG_TXIS I2C_ISR_TXIS
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#define I2C_FLAG_RXNE I2C_ISR_RXNE
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#define I2C_FLAG_ADDR I2C_ISR_ADDR
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#define I2C_FLAG_AF I2C_ISR_NACKF
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#define I2C_FLAG_STOPF I2C_ISR_STOPF
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#define I2C_FLAG_TC I2C_ISR_TC
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#define I2C_FLAG_TCR I2C_ISR_TCR
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#define I2C_FLAG_BERR I2C_ISR_BERR
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#define I2C_FLAG_ARLO I2C_ISR_ARLO
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#define I2C_FLAG_OVR I2C_ISR_OVR
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#define I2C_FLAG_PECERR I2C_ISR_PECERR
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#define I2C_FLAG_TIMEOUT I2C_ISR_TIMEOUT
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#define I2C_FLAG_ALERT I2C_ISR_ALERT
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#define I2C_FLAG_BUSY I2C_ISR_BUSY
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#define I2C_FLAG_DIR I2C_ISR_DIR
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/**
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* @}
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*/
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/**
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* @}
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*/
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/* Exported macros -----------------------------------------------------------*/
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/** @defgroup I2C_Exported_Macros I2C Exported Macros
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* @{
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*/
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/** @brief Reset I2C handle state.
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* @param __HANDLE__ specifies the I2C Handle.
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* @retval None
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*/
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#define __HAL_I2C_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_I2C_STATE_RESET)
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/** @brief Enable the specified I2C interrupt.
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* @param __HANDLE__ specifies the I2C Handle.
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* @param __INTERRUPT__ specifies the interrupt source to enable.
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* This parameter can be one of the following values:
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* @arg @ref I2C_IT_ERRI Errors interrupt enable
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* @arg @ref I2C_IT_TCI Transfer complete interrupt enable
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* @arg @ref I2C_IT_STOPI STOP detection interrupt enable
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* @arg @ref I2C_IT_NACKI NACK received interrupt enable
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* @arg @ref I2C_IT_ADDRI Address match interrupt enable
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* @arg @ref I2C_IT_RXI RX interrupt enable
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* @arg @ref I2C_IT_TXI TX interrupt enable
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*
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* @retval None
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*/
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#define __HAL_I2C_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR1 |= (__INTERRUPT__))
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/** @brief Disable the specified I2C interrupt.
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* @param __HANDLE__ specifies the I2C Handle.
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* @param __INTERRUPT__ specifies the interrupt source to disable.
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* This parameter can be one of the following values:
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* @arg @ref I2C_IT_ERRI Errors interrupt enable
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* @arg @ref I2C_IT_TCI Transfer complete interrupt enable
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* @arg @ref I2C_IT_STOPI STOP detection interrupt enable
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* @arg @ref I2C_IT_NACKI NACK received interrupt enable
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* @arg @ref I2C_IT_ADDRI Address match interrupt enable
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* @arg @ref I2C_IT_RXI RX interrupt enable
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* @arg @ref I2C_IT_TXI TX interrupt enable
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*
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* @retval None
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*/
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#define __HAL_I2C_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR1 &= (~(__INTERRUPT__)))
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/** @brief Check whether the specified I2C interrupt source is enabled or not.
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* @param __HANDLE__ specifies the I2C Handle.
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* @param __INTERRUPT__ specifies the I2C interrupt source to check.
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* This parameter can be one of the following values:
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* @arg @ref I2C_IT_ERRI Errors interrupt enable
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* @arg @ref I2C_IT_TCI Transfer complete interrupt enable
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* @arg @ref I2C_IT_STOPI STOP detection interrupt enable
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* @arg @ref I2C_IT_NACKI NACK received interrupt enable
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* @arg @ref I2C_IT_ADDRI Address match interrupt enable
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* @arg @ref I2C_IT_RXI RX interrupt enable
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* @arg @ref I2C_IT_TXI TX interrupt enable
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*
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* @retval The new state of __INTERRUPT__ (TRUE or FALSE).
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*/
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#define __HAL_I2C_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR1 & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
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/** @brief Check whether the specified I2C flag is set or not.
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* @param __HANDLE__ specifies the I2C Handle.
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* @param __FLAG__ specifies the flag to check.
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* This parameter can be one of the following values:
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* @arg @ref I2C_FLAG_TXE Transmit data register empty
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* @arg @ref I2C_FLAG_TXIS Transmit interrupt status
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* @arg @ref I2C_FLAG_RXNE Receive data register not empty
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* @arg @ref I2C_FLAG_ADDR Address matched (slave mode)
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* @arg @ref I2C_FLAG_AF Acknowledge failure received flag
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* @arg @ref I2C_FLAG_STOPF STOP detection flag
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* @arg @ref I2C_FLAG_TC Transfer complete (master mode)
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* @arg @ref I2C_FLAG_TCR Transfer complete reload
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* @arg @ref I2C_FLAG_BERR Bus error
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* @arg @ref I2C_FLAG_ARLO Arbitration lost
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* @arg @ref I2C_FLAG_OVR Overrun/Underrun
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* @arg @ref I2C_FLAG_PECERR PEC error in reception
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* @arg @ref I2C_FLAG_TIMEOUT Timeout or Tlow detection flag
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* @arg @ref I2C_FLAG_ALERT SMBus alert
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* @arg @ref I2C_FLAG_BUSY Bus busy
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* @arg @ref I2C_FLAG_DIR Transfer direction (slave mode)
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*
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* @retval The new state of __FLAG__ (TRUE or FALSE).
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*/
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#define __HAL_I2C_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->ISR) & (__FLAG__)) == (__FLAG__))
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/** @brief Clear the I2C pending flags which are cleared by writing 1 in a specific bit.
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* @param __HANDLE__ specifies the I2C Handle.
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* @param __FLAG__ specifies the flag to clear.
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* This parameter can be any combination of the following values:
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* @arg @ref I2C_FLAG_TXE Transmit data register empty
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* @arg @ref I2C_FLAG_ADDR Address matched (slave mode)
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* @arg @ref I2C_FLAG_AF Acknowledge failure received flag
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* @arg @ref I2C_FLAG_STOPF STOP detection flag
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* @arg @ref I2C_FLAG_BERR Bus error
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* @arg @ref I2C_FLAG_ARLO Arbitration lost
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* @arg @ref I2C_FLAG_OVR Overrun/Underrun
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* @arg @ref I2C_FLAG_PECERR PEC error in reception
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* @arg @ref I2C_FLAG_TIMEOUT Timeout or Tlow detection flag
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* @arg @ref I2C_FLAG_ALERT SMBus alert
|
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*
|
|
* @retval None
|
|
*/
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|
#define __HAL_I2C_CLEAR_FLAG(__HANDLE__, __FLAG__) (((__FLAG__) == I2C_FLAG_TXE) ? ((__HANDLE__)->Instance->ISR |= (__FLAG__)) \
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|
: ((__HANDLE__)->Instance->ICR = (__FLAG__)))
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/** @brief Enable the specified I2C peripheral.
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* @param __HANDLE__ specifies the I2C Handle.
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* @retval None
|
|
*/
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#define __HAL_I2C_ENABLE(__HANDLE__) (SET_BIT((__HANDLE__)->Instance->CR1, I2C_CR1_PE))
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/** @brief Disable the specified I2C peripheral.
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* @param __HANDLE__ specifies the I2C Handle.
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|
* @retval None
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|
*/
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#define __HAL_I2C_DISABLE(__HANDLE__) (CLEAR_BIT((__HANDLE__)->Instance->CR1, I2C_CR1_PE))
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|
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/**
|
|
* @}
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|
*/
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/* Include I2C HAL Extended module */
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#include "stm32l4xx_hal_i2c_ex.h"
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/* Exported functions --------------------------------------------------------*/
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/** @addtogroup I2C_Exported_Functions
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* @{
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|
*/
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|
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/** @addtogroup I2C_Exported_Functions_Group1 Initialization and de-initialization functions
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* @{
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|
*/
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/* Initialization and de-initialization functions******************************/
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HAL_StatusTypeDef HAL_I2C_Init(I2C_HandleTypeDef *hi2c);
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HAL_StatusTypeDef HAL_I2C_DeInit (I2C_HandleTypeDef *hi2c);
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void HAL_I2C_MspInit(I2C_HandleTypeDef *hi2c);
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void HAL_I2C_MspDeInit(I2C_HandleTypeDef *hi2c);
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/**
|
|
* @}
|
|
*/
|
|
|
|
/** @addtogroup I2C_Exported_Functions_Group2 Input and Output operation functions
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|
* @{
|
|
*/
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|
/* IO operation functions ****************************************************/
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/******* Blocking mode: Polling */
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|
HAL_StatusTypeDef HAL_I2C_Master_Transmit(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout);
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|
HAL_StatusTypeDef HAL_I2C_Master_Receive(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout);
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|
HAL_StatusTypeDef HAL_I2C_Slave_Transmit(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t Timeout);
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|
HAL_StatusTypeDef HAL_I2C_Slave_Receive(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t Timeout);
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|
HAL_StatusTypeDef HAL_I2C_Mem_Write(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout);
|
|
HAL_StatusTypeDef HAL_I2C_Mem_Read(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout);
|
|
HAL_StatusTypeDef HAL_I2C_IsDeviceReady(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Trials, uint32_t Timeout);
|
|
|
|
/******* Non-Blocking mode: Interrupt */
|
|
HAL_StatusTypeDef HAL_I2C_Master_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size);
|
|
HAL_StatusTypeDef HAL_I2C_Master_Receive_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size);
|
|
HAL_StatusTypeDef HAL_I2C_Slave_Transmit_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size);
|
|
HAL_StatusTypeDef HAL_I2C_Slave_Receive_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size);
|
|
HAL_StatusTypeDef HAL_I2C_Mem_Write_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size);
|
|
HAL_StatusTypeDef HAL_I2C_Mem_Read_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size);
|
|
|
|
HAL_StatusTypeDef HAL_I2C_Master_Sequential_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions);
|
|
HAL_StatusTypeDef HAL_I2C_Master_Sequential_Receive_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions);
|
|
HAL_StatusTypeDef HAL_I2C_Slave_Sequential_Transmit_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t XferOptions);
|
|
HAL_StatusTypeDef HAL_I2C_Slave_Sequential_Receive_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t XferOptions);
|
|
HAL_StatusTypeDef HAL_I2C_EnableListen_IT(I2C_HandleTypeDef *hi2c);
|
|
HAL_StatusTypeDef HAL_I2C_DisableListen_IT(I2C_HandleTypeDef *hi2c);
|
|
HAL_StatusTypeDef HAL_I2C_Master_Abort_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress);
|
|
|
|
/******* Non-Blocking mode: DMA */
|
|
HAL_StatusTypeDef HAL_I2C_Master_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size);
|
|
HAL_StatusTypeDef HAL_I2C_Master_Receive_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size);
|
|
HAL_StatusTypeDef HAL_I2C_Slave_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size);
|
|
HAL_StatusTypeDef HAL_I2C_Slave_Receive_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size);
|
|
HAL_StatusTypeDef HAL_I2C_Mem_Write_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size);
|
|
HAL_StatusTypeDef HAL_I2C_Mem_Read_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size);
|
|
/**
|
|
* @}
|
|
*/
|
|
|
|
/** @addtogroup I2C_IRQ_Handler_and_Callbacks IRQ Handler and Callbacks
|
|
* @{
|
|
*/
|
|
/******* I2C IRQHandler and Callbacks used in non blocking modes (Interrupt and DMA) */
|
|
void HAL_I2C_EV_IRQHandler(I2C_HandleTypeDef *hi2c);
|
|
void HAL_I2C_ER_IRQHandler(I2C_HandleTypeDef *hi2c);
|
|
void HAL_I2C_MasterTxCpltCallback(I2C_HandleTypeDef *hi2c);
|
|
void HAL_I2C_MasterRxCpltCallback(I2C_HandleTypeDef *hi2c);
|
|
void HAL_I2C_SlaveTxCpltCallback(I2C_HandleTypeDef *hi2c);
|
|
void HAL_I2C_SlaveRxCpltCallback(I2C_HandleTypeDef *hi2c);
|
|
void HAL_I2C_AddrCallback(I2C_HandleTypeDef *hi2c, uint8_t TransferDirection, uint16_t AddrMatchCode);
|
|
void HAL_I2C_ListenCpltCallback(I2C_HandleTypeDef *hi2c);
|
|
void HAL_I2C_MemTxCpltCallback(I2C_HandleTypeDef *hi2c);
|
|
void HAL_I2C_MemRxCpltCallback(I2C_HandleTypeDef *hi2c);
|
|
void HAL_I2C_ErrorCallback(I2C_HandleTypeDef *hi2c);
|
|
/**
|
|
* @}
|
|
*/
|
|
|
|
/** @addtogroup I2C_Exported_Functions_Group3 Peripheral State, Mode and Error functions
|
|
* @{
|
|
*/
|
|
/* Peripheral State, Mode and Error functions *********************************/
|
|
HAL_I2C_StateTypeDef HAL_I2C_GetState(I2C_HandleTypeDef *hi2c);
|
|
HAL_I2C_ModeTypeDef HAL_I2C_GetMode(I2C_HandleTypeDef *hi2c);
|
|
uint32_t HAL_I2C_GetError(I2C_HandleTypeDef *hi2c);
|
|
|
|
/**
|
|
* @}
|
|
*/
|
|
|
|
/**
|
|
* @}
|
|
*/
|
|
|
|
/* Private constants ---------------------------------------------------------*/
|
|
/** @defgroup I2C_Private_Constants I2C Private Constants
|
|
* @{
|
|
*/
|
|
|
|
/**
|
|
* @}
|
|
*/
|
|
|
|
/* Private macros ------------------------------------------------------------*/
|
|
/** @defgroup I2C_Private_Macro I2C Private Macros
|
|
* @{
|
|
*/
|
|
|
|
#define IS_I2C_ADDRESSING_MODE(MODE) (((MODE) == I2C_ADDRESSINGMODE_7BIT) || \
|
|
((MODE) == I2C_ADDRESSINGMODE_10BIT))
|
|
|
|
#define IS_I2C_DUAL_ADDRESS(ADDRESS) (((ADDRESS) == I2C_DUALADDRESS_DISABLE) || \
|
|
((ADDRESS) == I2C_DUALADDRESS_ENABLE))
|
|
|
|
#define IS_I2C_OWN_ADDRESS2_MASK(MASK) (((MASK) == I2C_OA2_NOMASK) || \
|
|
((MASK) == I2C_OA2_MASK01) || \
|
|
((MASK) == I2C_OA2_MASK02) || \
|
|
((MASK) == I2C_OA2_MASK03) || \
|
|
((MASK) == I2C_OA2_MASK04) || \
|
|
((MASK) == I2C_OA2_MASK05) || \
|
|
((MASK) == I2C_OA2_MASK06) || \
|
|
((MASK) == I2C_OA2_MASK07))
|
|
|
|
#define IS_I2C_GENERAL_CALL(CALL) (((CALL) == I2C_GENERALCALL_DISABLE) || \
|
|
((CALL) == I2C_GENERALCALL_ENABLE))
|
|
|
|
#define IS_I2C_NO_STRETCH(STRETCH) (((STRETCH) == I2C_NOSTRETCH_DISABLE) || \
|
|
((STRETCH) == I2C_NOSTRETCH_ENABLE))
|
|
|
|
#define IS_I2C_MEMADD_SIZE(SIZE) (((SIZE) == I2C_MEMADD_SIZE_8BIT) || \
|
|
((SIZE) == I2C_MEMADD_SIZE_16BIT))
|
|
|
|
#define IS_TRANSFER_MODE(MODE) (((MODE) == I2C_RELOAD_MODE) || \
|
|
((MODE) == I2C_AUTOEND_MODE) || \
|
|
((MODE) == I2C_SOFTEND_MODE))
|
|
|
|
#define IS_TRANSFER_REQUEST(REQUEST) (((REQUEST) == I2C_GENERATE_STOP) || \
|
|
((REQUEST) == I2C_GENERATE_START_READ) || \
|
|
((REQUEST) == I2C_GENERATE_START_WRITE) || \
|
|
((REQUEST) == I2C_NO_STARTSTOP))
|
|
|
|
#define IS_I2C_TRANSFER_OPTIONS_REQUEST(REQUEST) (((REQUEST) == I2C_FIRST_FRAME) || \
|
|
((REQUEST) == I2C_NEXT_FRAME) || \
|
|
((REQUEST) == I2C_FIRST_AND_LAST_FRAME) || \
|
|
((REQUEST) == I2C_LAST_FRAME))
|
|
|
|
#define I2C_RESET_CR2(__HANDLE__) ((__HANDLE__)->Instance->CR2 &= (uint32_t)~((uint32_t)(I2C_CR2_SADD | I2C_CR2_HEAD10R | I2C_CR2_NBYTES | I2C_CR2_RELOAD | I2C_CR2_RD_WRN)))
|
|
|
|
#define I2C_GET_ADDR_MATCH(__HANDLE__) (((__HANDLE__)->Instance->ISR & I2C_ISR_ADDCODE) >> 16)
|
|
#define I2C_GET_DIR(__HANDLE__) (((__HANDLE__)->Instance->ISR & I2C_ISR_DIR) >> 16)
|
|
#define I2C_GET_STOP_MODE(__HANDLE__) ((__HANDLE__)->Instance->CR2 & I2C_CR2_AUTOEND)
|
|
#define I2C_GET_ISR_REG(__HANDLE__) ((__HANDLE__)->Instance->ISR)
|
|
#define I2C_CHECK_FLAG(__ISR__, __FLAG__) (((__ISR__) & (__FLAG__)) == (__FLAG__))
|
|
#define I2C_GET_OWN_ADDRESS1(__HANDLE__) ((__HANDLE__)->Instance->OAR1 & I2C_OAR1_OA1)
|
|
#define I2C_GET_OWN_ADDRESS2(__HANDLE__) ((__HANDLE__)->Instance->OAR2 & I2C_OAR2_OA2)
|
|
|
|
#define IS_I2C_OWN_ADDRESS1(ADDRESS1) ((ADDRESS1) <= (uint32_t)0x000003FF)
|
|
#define IS_I2C_OWN_ADDRESS2(ADDRESS2) ((ADDRESS2) <= (uint16_t)0x00FF)
|
|
|
|
#define I2C_MEM_ADD_MSB(__ADDRESS__) ((uint8_t)((uint16_t)(((uint16_t)((__ADDRESS__) & (uint16_t)(0xFF00))) >> 8)))
|
|
#define I2C_MEM_ADD_LSB(__ADDRESS__) ((uint8_t)((uint16_t)((__ADDRESS__) & (uint16_t)(0x00FF))))
|
|
|
|
#define I2C_GENERATE_START(__ADDMODE__,__ADDRESS__) (((__ADDMODE__) == I2C_ADDRESSINGMODE_7BIT) ? (uint32_t)((((uint32_t)(__ADDRESS__) & (I2C_CR2_SADD)) | (I2C_CR2_START) | (I2C_CR2_AUTOEND)) & (~I2C_CR2_RD_WRN)) : \
|
|
(uint32_t)((((uint32_t)(__ADDRESS__) & (I2C_CR2_SADD)) | (I2C_CR2_ADD10) | (I2C_CR2_START)) & (~I2C_CR2_RD_WRN)))
|
|
/**
|
|
* @}
|
|
*/
|
|
|
|
/* Private Functions ---------------------------------------------------------*/
|
|
/** @defgroup I2C_Private_Functions I2C Private Functions
|
|
* @{
|
|
*/
|
|
/* Private functions are defined in stm32l4xx_hal_i2c.c file */
|
|
/**
|
|
* @}
|
|
*/
|
|
|
|
/**
|
|
* @}
|
|
*/
|
|
|
|
/**
|
|
* @}
|
|
*/
|
|
|
|
#ifdef __cplusplus
|
|
}
|
|
#endif
|
|
|
|
|
|
#endif /* __STM32L4xx_HAL_I2C_H */
|
|
|
|
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|