6839fff313
* atmel-samd: Remove ASF3. This will break builds. * atmel-samd: Add ASF4 for the SAMD21 and SAMD51. * Introduce the supervisor concept to facilitate porting. The supervisor is the code which runs individual MicroPython VMs. By splitting it out we make it more consistent and easier to find. This also adds very basic SAMD21 and SAMD51 support using the supervisor. Only the REPL currently works. This begins the work for #178.
89 lines
4.4 KiB
C
89 lines
4.4 KiB
C
/**
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* \file
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*
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* \brief Instance description for HMATRIX
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*
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* Copyright (c) 2017 Atmel Corporation,
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* a wholly owned subsidiary of Microchip Technology Inc.
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*
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* \asf_license_start
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*
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* \page License
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the Licence at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*
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* \asf_license_stop
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*
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*/
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#ifndef _SAMD51_HMATRIX_INSTANCE_
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#define _SAMD51_HMATRIX_INSTANCE_
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/* ========== Register definition for HMATRIX peripheral ========== */
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#if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
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#define REG_HMATRIX_PRAS0 (0x4100C080) /**< \brief (HMATRIX) Priority A for Slave 0 */
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#define REG_HMATRIX_PRBS0 (0x4100C084) /**< \brief (HMATRIX) Priority B for Slave 0 */
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#define REG_HMATRIX_PRAS1 (0x4100C088) /**< \brief (HMATRIX) Priority A for Slave 1 */
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#define REG_HMATRIX_PRBS1 (0x4100C08C) /**< \brief (HMATRIX) Priority B for Slave 1 */
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#define REG_HMATRIX_PRAS2 (0x4100C090) /**< \brief (HMATRIX) Priority A for Slave 2 */
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#define REG_HMATRIX_PRBS2 (0x4100C094) /**< \brief (HMATRIX) Priority B for Slave 2 */
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#define REG_HMATRIX_PRAS3 (0x4100C098) /**< \brief (HMATRIX) Priority A for Slave 3 */
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#define REG_HMATRIX_PRBS3 (0x4100C09C) /**< \brief (HMATRIX) Priority B for Slave 3 */
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#define REG_HMATRIX_PRAS4 (0x4100C0A0) /**< \brief (HMATRIX) Priority A for Slave 4 */
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#define REG_HMATRIX_PRBS4 (0x4100C0A4) /**< \brief (HMATRIX) Priority B for Slave 4 */
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#else
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#define REG_HMATRIX_PRAS0 (*(RwReg *)0x4100C080UL) /**< \brief (HMATRIX) Priority A for Slave 0 */
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#define REG_HMATRIX_PRBS0 (*(RwReg *)0x4100C084UL) /**< \brief (HMATRIX) Priority B for Slave 0 */
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#define REG_HMATRIX_PRAS1 (*(RwReg *)0x4100C088UL) /**< \brief (HMATRIX) Priority A for Slave 1 */
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#define REG_HMATRIX_PRBS1 (*(RwReg *)0x4100C08CUL) /**< \brief (HMATRIX) Priority B for Slave 1 */
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#define REG_HMATRIX_PRAS2 (*(RwReg *)0x4100C090UL) /**< \brief (HMATRIX) Priority A for Slave 2 */
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#define REG_HMATRIX_PRBS2 (*(RwReg *)0x4100C094UL) /**< \brief (HMATRIX) Priority B for Slave 2 */
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#define REG_HMATRIX_PRAS3 (*(RwReg *)0x4100C098UL) /**< \brief (HMATRIX) Priority A for Slave 3 */
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#define REG_HMATRIX_PRBS3 (*(RwReg *)0x4100C09CUL) /**< \brief (HMATRIX) Priority B for Slave 3 */
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#define REG_HMATRIX_PRAS4 (*(RwReg *)0x4100C0A0UL) /**< \brief (HMATRIX) Priority A for Slave 4 */
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#define REG_HMATRIX_PRBS4 (*(RwReg *)0x4100C0A4UL) /**< \brief (HMATRIX) Priority B for Slave 4 */
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#endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
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/* ========== Instance parameters for HMATRIX peripheral ========== */
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#define HMATRIX_CLK_AHB_ID 5 // Index of AHB Clock in MCLK.AHBMASK register (MASK may be tied to 1 depending on chip integration)
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#define HMATRIX_DEFINED
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/* ========== Instance parameters for HMATRIX ========== */
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#define HMATRIX_SLAVE_FLASH 0
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#define HMATRIX_SLAVE_FLASH_ALT 1
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#define HMATRIX_SLAVE_SEEPROM 2
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#define HMATRIX_SLAVE_RAMCM4S 3
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#define HMATRIX_SLAVE_RAMPPPDSU 4
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#define HMATRIX_SLAVE_RAMDMAWR 5
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#define HMATRIX_SLAVE_RAMDMACICM 6
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#define HMATRIX_SLAVE_HPB0 7
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#define HMATRIX_SLAVE_HPB1 8
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#define HMATRIX_SLAVE_HPB2 9
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#define HMATRIX_SLAVE_HPB3 10
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#define HMATRIX_SLAVE_SDHC0 12
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#define HMATRIX_SLAVE_SDHC1 13
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#define HMATRIX_SLAVE_QSPI 14
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#define HMATRIX_SLAVE_BKUPRAM 15
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#define HMATRIX_SLAVE_NUM 16
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#define HMATRIX_MASTER_CM4_S 0
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#define HMATRIX_MASTER_CMCC 1
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#define HMATRIX_MASTER_PICOP_MEM 2
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#define HMATRIX_MASTER_PICOP_IO 3
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#define HMATRIX_MASTER_DMAC_DTWR 4
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#define HMATRIX_MASTER_DMAC_DTRD 5
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#define HMATRIX_MASTER_ICM 6
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#define HMATRIX_MASTER_DSU 7
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#define HMATRIX_MASTER_NUM 8
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#endif /* _SAMD51_HMATRIX_INSTANCE_ */
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