371 lines
11 KiB
C
371 lines
11 KiB
C
/*
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* This file is part of the MicroPython project, http://micropython.org/
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*
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* The MIT License (MIT)
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*
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* Copyright (c) 2017 Scott Shawcroft for Adafruit Industries
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#include <string.h>
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#include <stdlib.h>
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#include "boards/board.h"
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#include "supervisor/port.h"
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// ASF 4
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#include "atmel_start_pins.h"
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#include "hal/include/hal_delay.h"
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#include "hal/include/hal_flash.h"
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#include "hal/include/hal_gpio.h"
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#include "hal/include/hal_init.h"
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#include "hpl/gclk/hpl_gclk_base.h"
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#include "hpl/pm/hpl_pm_base.h"
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#ifdef SAMD21
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#include "hri/hri_pm_d21.h"
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#endif
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#ifdef SAMD51
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#include "hri/hri_rstc_d51.h"
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#endif
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#include "common-hal/analogio/AnalogIn.h"
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#include "common-hal/analogio/AnalogOut.h"
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#include "common-hal/audiobusio/PDMIn.h"
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#include "common-hal/audiobusio/I2SOut.h"
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#include "common-hal/audioio/AudioOut.h"
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#include "common-hal/busio/SPI.h"
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#include "common-hal/microcontroller/Pin.h"
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#include "common-hal/pulseio/PulseIn.h"
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#include "common-hal/pulseio/PulseOut.h"
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#include "common-hal/pulseio/PWMOut.h"
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#include "common-hal/ps2io/Ps2.h"
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#include "common-hal/rtc/RTC.h"
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#if CIRCUITPY_TOUCHIO_USE_NATIVE
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#include "common-hal/touchio/TouchIn.h"
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#endif
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#include "samd/cache.h"
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#include "samd/clocks.h"
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#include "samd/events.h"
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#include "samd/external_interrupts.h"
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#include "samd/dma.h"
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#include "shared-bindings/rtc/__init__.h"
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#include "reset.h"
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#include "tick.h"
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#include "supervisor/shared/safe_mode.h"
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#include "supervisor/shared/stack.h"
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#include "tusb.h"
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#if CIRCUITPY_GAMEPAD
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#include "shared-module/gamepad/__init__.h"
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#endif
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#if CIRCUITPY_GAMEPADSHIFT
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#include "shared-module/gamepadshift/__init__.h"
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#endif
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#include "shared-module/_pew/PewPew.h"
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extern volatile bool mp_msc_enabled;
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#if defined(SAMD21) && defined(ENABLE_MICRO_TRACE_BUFFER)
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// Stores 2 ^ TRACE_BUFFER_MAGNITUDE_PACKETS packets.
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// 7 -> 128 packets
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#define TRACE_BUFFER_MAGNITUDE_PACKETS 7
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// Size in uint32_t. Two per packet.
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#define TRACE_BUFFER_SIZE (1 << (TRACE_BUFFER_MAGNITUDE_PACKETS + 1))
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// Size in bytes. 4 bytes per uint32_t.
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#define TRACE_BUFFER_SIZE_BYTES (TRACE_BUFFER_SIZE << 2)
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__attribute__((__aligned__(TRACE_BUFFER_SIZE_BYTES))) uint32_t mtb[TRACE_BUFFER_SIZE] = {0};
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#endif
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#if CALIBRATE_CRYSTALLESS
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static void save_usb_clock_calibration(void) {
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// If we are on USB lets double check our fine calibration for the clock and
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// save the new value if its different enough.
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SYSCTRL->DFLLSYNC.bit.READREQ = 1;
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uint16_t saved_calibration = 0x1ff;
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if (strcmp((char*) CIRCUITPY_INTERNAL_CONFIG_START_ADDR, "CIRCUITPYTHON1") == 0) {
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saved_calibration = ((uint16_t *) CIRCUITPY_INTERNAL_CONFIG_START_ADDR)[8];
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}
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while (SYSCTRL->PCLKSR.bit.DFLLRDY == 0) {
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// TODO(tannewt): Run the mass storage stuff if this takes a while.
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}
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int16_t current_calibration = SYSCTRL->DFLLVAL.bit.FINE;
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if (abs(current_calibration - saved_calibration) > 10) {
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// Copy the full internal config page to memory.
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uint8_t page_buffer[NVMCTRL_ROW_SIZE];
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memcpy(page_buffer, (uint8_t*) CIRCUITPY_INTERNAL_CONFIG_START_ADDR, NVMCTRL_ROW_SIZE);
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// Modify it.
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memcpy(page_buffer, "CIRCUITPYTHON1", 15);
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// First 16 bytes (0-15) are ID. Little endian!
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page_buffer[16] = current_calibration & 0xff;
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page_buffer[17] = current_calibration >> 8;
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// Write it back.
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// We don't use features that use any advanced NVMCTRL features so we can fake the descriptor
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// whenever we need it instead of storing it long term.
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struct flash_descriptor desc;
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desc.dev.hw = NVMCTRL;
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flash_write(&desc, (uint32_t) CIRCUITPY_INTERNAL_CONFIG_START_ADDR, page_buffer, NVMCTRL_ROW_SIZE);
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}
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}
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#endif
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safe_mode_t port_init(void) {
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#if defined(SAMD21)
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// Set brownout detection to ~2.7V. Default from factory is 1.7V,
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// which is too low for proper operation of external SPI flash chips (they are 2.7-3.6V).
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// Disable while changing level.
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SYSCTRL->BOD33.bit.ENABLE = 0;
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SYSCTRL->BOD33.bit.LEVEL = 39; // 2.77V with hysteresis off. Table 37.20 in datasheet.
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SYSCTRL->BOD33.bit.ENABLE = 1;
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#ifdef ENABLE_MICRO_TRACE_BUFFER
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REG_MTB_POSITION = ((uint32_t) (mtb - REG_MTB_BASE)) & 0xFFFFFFF8;
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REG_MTB_FLOW = (((uint32_t) mtb - REG_MTB_BASE) + TRACE_BUFFER_SIZE_BYTES) & 0xFFFFFFF8;
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REG_MTB_MASTER = 0x80000000 + (TRACE_BUFFER_MAGNITUDE_PACKETS - 1);
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#else
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// Triple check that the MTB is off. Switching between debug and non-debug
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// builds can leave it set over reset and wreak havok as a result.
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REG_MTB_MASTER = 0x00000000 + 6;
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#endif
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#endif
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#if defined(SAMD51)
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// Set brownout detection to ~2.7V. Default from factory is 1.7V,
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// which is too low for proper operation of external SPI flash chips (they are 2.7-3.6V).
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// Disable while changing level.
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SUPC->BOD33.bit.ENABLE = 0;
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SUPC->BOD33.bit.LEVEL = 200; // 2.7V: 1.5V + LEVEL * 6mV.
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SUPC->BOD33.bit.ENABLE = 1;
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// MPU (Memory Protection Unit) setup.
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// We hoped we could make the QSPI region be non-cachable with the MPU,
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// but the CMCC doesn't seem to pay attention to the MPU settings.
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// Leaving this code here disabled,
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// because it was hard enough to figure out, and maybe there's
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// a mistake that could make it work in the future.
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#if 0
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// Designate QSPI memory mapped region as not cachable.
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// Turn off MPU in case it is on.
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MPU->CTRL = 0;
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// Configure region 0.
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MPU->RNR = 0;
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// Region base: start of QSPI mapping area.
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// QSPI region runs from 0x04000000 up to and not including 0x05000000: 16 megabytes
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MPU->RBAR = QSPI_AHB;
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MPU->RASR =
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0b011 << MPU_RASR_AP_Pos | // full read/write access for privileged and user mode
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0b000 << MPU_RASR_TEX_Pos | // caching not allowed, strongly ordered
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1 << MPU_RASR_S_Pos | // sharable
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0 << MPU_RASR_C_Pos | // not cachable
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0 << MPU_RASR_B_Pos | // not bufferable
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0b10111 << MPU_RASR_SIZE_Pos | // 16MB region size
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1 << MPU_RASR_ENABLE_Pos // enable this region
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;
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// Turn off regions 1-7.
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for (uint32_t i = 1; i < 8; i ++) {
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MPU->RNR = i;
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MPU->RBAR = 0;
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MPU->RASR = 0;
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}
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// Turn on MPU. Turn on PRIVDEFENA, which defines a default memory
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// map for all privileged access, so we don't have to set up other regions
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// besides QSPI.
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MPU->CTRL = MPU_CTRL_PRIVDEFENA_Msk | MPU_CTRL_ENABLE_Msk;
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#endif
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samd_peripherals_enable_cache();
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#endif
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#ifdef SAMD21
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hri_nvmctrl_set_CTRLB_RWS_bf(NVMCTRL, 2);
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_pm_init();
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#endif
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#if CALIBRATE_CRYSTALLESS
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uint32_t fine = DEFAULT_DFLL48M_FINE_CALIBRATION;
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// The fine calibration data is stored in an NVM page after the text and data storage but before
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// the optional file system. The first 16 bytes are the identifier for the section.
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if (strcmp((char*) CIRCUITPY_INTERNAL_CONFIG_START_ADDR, "CIRCUITPYTHON1") == 0) {
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fine = ((uint16_t *) CIRCUITPY_INTERNAL_CONFIG_START_ADDR)[8];
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}
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clock_init(BOARD_HAS_CRYSTAL, fine);
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#else
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// Use a default fine value
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clock_init(BOARD_HAS_CRYSTAL, DEFAULT_DFLL48M_FINE_CALIBRATION);
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#endif
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// Configure millisecond timer initialization.
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tick_init();
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#if CIRCUITPY_RTC
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rtc_init();
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#endif
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init_shared_dma();
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// Reset everything into a known state before board_init.
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reset_port();
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#ifdef SAMD21
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if (PM->RCAUSE.bit.BOD33 == 1 || PM->RCAUSE.bit.BOD12 == 1) {
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return BROWNOUT;
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}
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#endif
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#ifdef SAMD51
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if (RSTC->RCAUSE.bit.BODVDD == 1 || RSTC->RCAUSE.bit.BODCORE == 1) {
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return BROWNOUT;
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}
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#endif
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if (board_requests_safe_mode()) {
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return USER_SAFE_MODE;
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}
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return NO_SAFE_MODE;
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}
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void reset_port(void) {
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reset_sercoms();
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#if CIRCUITPY_AUDIOIO
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audio_dma_reset();
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audioout_reset();
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#endif
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#if CIRCUITPY_AUDIOBUSIO
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i2sout_reset();
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//pdmin_reset();
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#endif
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#if CIRCUITPY_TOUCHIO && CIRCUITPY_TOUCHIO_USE_NATIVE
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touchin_reset();
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#endif
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eic_reset();
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#if CIRCUITPY_PULSEIO
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pulseout_reset();
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pwmout_reset();
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#endif
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#if CIRCUITPY_ANALOGIO
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analogin_reset();
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analogout_reset();
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#endif
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#if CIRCUITPY_RTC
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rtc_reset();
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#endif
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reset_gclks();
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#if CIRCUITPY_GAMEPAD
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gamepad_reset();
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#endif
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#if CIRCUITPY_GAMEPADSHIFT
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gamepadshift_reset();
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#endif
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#if CIRCUITPY_PEW
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pew_reset();
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#endif
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reset_event_system();
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reset_all_pins();
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// Output clocks for debugging.
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// not supported by SAMD51G; uncomment for SAMD51J or update for 51G
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// #ifdef SAMD51
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// gpio_set_pin_function(PIN_PA10, GPIO_PIN_FUNCTION_M); // GCLK4, D3
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// gpio_set_pin_function(PIN_PA11, GPIO_PIN_FUNCTION_M); // GCLK5, A4
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// gpio_set_pin_function(PIN_PB14, GPIO_PIN_FUNCTION_M); // GCLK0, D5
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// gpio_set_pin_function(PIN_PB15, GPIO_PIN_FUNCTION_M); // GCLK1, D6
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// #endif
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#if CALIBRATE_CRYSTALLESS
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if (tud_cdc_connected()) {
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save_usb_clock_calibration();
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}
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#endif
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}
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void reset_to_bootloader(void) {
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_bootloader_dbl_tap = DBL_TAP_MAGIC;
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reset();
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}
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void reset_cpu(void) {
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reset();
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}
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uint32_t *port_stack_get_limit(void) {
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return &_ebss;
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}
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uint32_t *port_stack_get_top(void) {
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return &_estack;
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}
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uint32_t *port_heap_get_bottom(void) {
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return port_stack_get_limit();
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}
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uint32_t *port_heap_get_top(void) {
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return port_stack_get_top();
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}
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// Place the word to save 8k from the end of RAM so we and the bootloader don't clobber it.
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#ifdef SAMD21
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uint32_t* safe_word = (uint32_t*) (HMCRAMC0_ADDR + HMCRAMC0_SIZE - 0x2000);
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#endif
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#ifdef SAMD51
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uint32_t* safe_word = (uint32_t*) (HSRAM_ADDR + HSRAM_SIZE - 0x2000);
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#endif
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void port_set_saved_word(uint32_t value) {
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*safe_word = value;
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}
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uint32_t port_get_saved_word(void) {
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return *safe_word;
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}
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/**
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* \brief Default interrupt handler for unused IRQs.
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*/
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__attribute__((used)) void HardFault_Handler(void)
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{
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#ifdef ENABLE_MICRO_TRACE_BUFFER
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// Turn off the micro trace buffer so we don't fill it up in the infinite
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// loop below.
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REG_MTB_MASTER = 0x00000000 + 6;
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#endif
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reset_into_safe_mode(HARD_CRASH);
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while (true) {
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asm("nop;");
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}
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}
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