fae96b17a7
This commit adds support for a new processor RA6M5. It also adds the following classes to the machine module: PWM, DAC, SDCard. Signed-off-by: mbedNoobNinja <novoltage@gmail.com>
103 lines
2.9 KiB
C
103 lines
2.9 KiB
C
/*
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* The MIT License (MIT)
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*
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* Copyright (c) 2021 Renesas Electronics Corporation
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#include "hal_data.h"
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#include "ra_config.h"
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#include "ra_utils.h"
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static R_SYSTEM_Type *system_reg = (R_SYSTEM_Type *)0x4001E000;
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static R_MSTP_Type *mstp_reg = R_MSTP;
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void ra_mstpcra_stop(uint32_t mod_mask) {
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system_reg->PRCR = 0xa502;
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system_reg->MSTPCRA |= mod_mask;
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system_reg->PRCR = 0xa500;
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}
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void ra_mstpcra_start(uint32_t mod_mask) {
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system_reg->PRCR = 0xa502;
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system_reg->MSTPCRA &= ~mod_mask;
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system_reg->PRCR = 0xa500;
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}
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void ra_mstpcrb_stop(uint32_t mod_mask) {
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system_reg->PRCR = 0xa502;
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mstp_reg->MSTPCRB |= mod_mask;
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system_reg->PRCR = 0xa500;
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}
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void ra_mstpcrb_start(uint32_t mod_mask) {
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system_reg->PRCR = 0xa502;
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mstp_reg->MSTPCRB &= ~mod_mask;
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system_reg->PRCR = 0xa500;
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}
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void ra_mstpcrc_stop(uint32_t mod_mask) {
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system_reg->PRCR = 0xa502;
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mstp_reg->MSTPCRC |= mod_mask;
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system_reg->PRCR = 0xa500;
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}
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void ra_mstpcrc_start(uint32_t mod_mask) {
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system_reg->PRCR = 0xa502;
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mstp_reg->MSTPCRC &= ~mod_mask;
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system_reg->PRCR = 0xa500;
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}
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void ra_mstpcrd_stop(uint32_t mod_mask) {
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system_reg->PRCR = 0xa502;
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mstp_reg->MSTPCRD |= mod_mask;
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system_reg->PRCR = 0xa500;
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}
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void ra_mstpcrd_start(uint32_t mod_mask) {
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system_reg->PRCR = 0xa502;
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mstp_reg->MSTPCRD &= ~mod_mask;
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system_reg->PRCR = 0xa500;
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}
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void ra_mstpcre_stop(uint32_t mod_mask) {
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system_reg->PRCR = 0xa502;
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mstp_reg->MSTPCRE |= mod_mask;
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system_reg->PRCR = 0xa500;
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}
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void ra_mstpcre_start(uint32_t mod_mask) {
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system_reg->PRCR = 0xa502;
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mstp_reg->MSTPCRE &= ~mod_mask;
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system_reg->PRCR = 0xa500;
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}
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__WEAK void ctsu_write_isr(void) {
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// dummy
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}
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__WEAK void ctsu_read_isr(void) {
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// dummy
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}
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__WEAK void ctsu_end_isr(void) {
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// dummy
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}
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