circuitpython/ports/esp8266/modules
Damien George cfe1c5abf8 extmod/vfs: Rename BP_IOCTL_xxx constants to MP_BLOCKDEV_IOCTL_xxx.
Also rename SEC_COUNT to BLOCK_COUNT and SEC_SIZE to BLOCK_SIZE.
2019-10-29 14:17:29 +11:00
..
_boot.py ports: Make new ports/ sub-directory and move all ports there. 2017-09-06 13:40:51 +10:00
apa102.py ports: Make new ports/ sub-directory and move all ports there. 2017-09-06 13:40:51 +10:00
flashbdev.py extmod/vfs: Rename BP_IOCTL_xxx constants to MP_BLOCKDEV_IOCTL_xxx. 2019-10-29 14:17:29 +11:00
inisetup.py esp8266/main: Activate UART(0) on dupterm for REPL before boot.py runs. 2019-01-16 17:24:23 +11:00
neopixel.py ports: Make new ports/ sub-directory and move all ports there. 2017-09-06 13:40:51 +10:00
ntptime.py esp8266/modules/ntptime.py: Always close socket, and set day-of-week. 2019-10-10 18:05:56 +11:00
port_diag.py ports: Make new ports/ sub-directory and move all ports there. 2017-09-06 13:40:51 +10:00
webrepl.py extmod/moduwebsocket: Refactor `websocket` to `uwebsocket`. 2019-02-14 00:35:45 +11:00
webrepl_setup.py esp8266/modules/webrepl_setup: Fix first-time enable of WebREPL. 2017-11-30 10:54:33 +11:00
websocket_helper.py ports: Make new ports/ sub-directory and move all ports there. 2017-09-06 13:40:51 +10:00