400 lines
11 KiB
C
400 lines
11 KiB
C
/*
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* This file is part of the MicroPython project, http://micropython.org/
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*
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* The MIT License (MIT)
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*
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* Copyright (c) 2018 Noralf Trønnes
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#include "bindings/samd/Clock.h"
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#include "samd/clocks.h"
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#include "py/obj.h"
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#include "py/objproperty.h"
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#include "py/runtime.h"
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//| class Clock:
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//| """Identifies a clock on the microcontroller.
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//|
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//| They are fixed by the hardware so they cannot be constructed on demand. Instead, use
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//| ``samd.clock`` to reference the desired clock."""
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//|
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STATIC void samd_clock_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) {
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samd_clock_obj_t *self = MP_OBJ_TO_PTR(self_in);
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mp_printf(print, "%q.%q.%q", MP_QSTR_samd, MP_QSTR_clock, self->name);
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}
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//| enabled: bool
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//| """Is the clock enabled? (read-only)"""
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//|
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STATIC mp_obj_t samd_clock_get_enabled(mp_obj_t self_in) {
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samd_clock_obj_t *self = MP_OBJ_TO_PTR(self_in);
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return mp_obj_new_bool(clock_get_enabled(self->type, self->index));
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}
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MP_DEFINE_CONST_FUN_OBJ_1(samd_clock_get_enabled_obj, samd_clock_get_enabled);
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MP_PROPERTY_GETTER(samd_clock_enabled_obj,
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(mp_obj_t)&samd_clock_get_enabled_obj);
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//| parent: Union[Clock, None]
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//| """Clock parent. (read-only)"""
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//|
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STATIC mp_obj_t samd_clock_get_parent(mp_obj_t self_in) {
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samd_clock_obj_t *self = MP_OBJ_TO_PTR(self_in);
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uint8_t p_type, p_index;
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if (!clock_get_parent(self->type, self->index, &p_type, &p_index)) {
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return mp_const_none;
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}
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const mp_map_t *samd_map = &samd_clock_globals.map;
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for (uint8_t i = 0; i < samd_map->alloc; i++) {
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samd_clock_obj_t *iter = samd_map->table[i].value;
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if (iter->type == p_type && iter->index == p_index) {
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return iter;
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}
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}
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return mp_const_none;
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}
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MP_DEFINE_CONST_FUN_OBJ_1(samd_clock_get_parent_obj, samd_clock_get_parent);
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MP_PROPERTY_GETTER(samd_clock_parent_obj,
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(mp_obj_t)&samd_clock_get_parent_obj);
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//| frequency: int
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//| """Clock frequency in Herz. (read-only)"""
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//|
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STATIC mp_obj_t samd_clock_get_frequency(mp_obj_t self_in) {
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samd_clock_obj_t *self = MP_OBJ_TO_PTR(self_in);
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return mp_obj_new_int_from_uint(clock_get_frequency(self->type, self->index));
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}
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MP_DEFINE_CONST_FUN_OBJ_1(samd_clock_get_frequency_obj, samd_clock_get_frequency);
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MP_PROPERTY_GETTER(samd_clock_frequency_obj,
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(mp_obj_t)&samd_clock_get_frequency_obj);
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//| calibration: int
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//| """Clock calibration. Not all clocks can be calibrated."""
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//|
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STATIC mp_obj_t samd_clock_get_calibration(mp_obj_t self_in) {
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samd_clock_obj_t *self = MP_OBJ_TO_PTR(self_in);
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return mp_obj_new_int_from_uint(clock_get_calibration(self->type, self->index));
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}
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MP_DEFINE_CONST_FUN_OBJ_1(samd_clock_get_calibration_obj, samd_clock_get_calibration);
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STATIC mp_obj_t samd_clock_set_calibration(mp_obj_t self_in, mp_obj_t calibration) {
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samd_clock_obj_t *self = MP_OBJ_TO_PTR(self_in);
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int ret = clock_set_calibration(self->type, self->index, mp_obj_get_int(calibration));
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if (ret == -2) {
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mp_raise_AttributeError(translate("calibration is read only"));
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}
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if (ret == -1) {
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mp_raise_ValueError(translate("calibration is out of range"));
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}
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return mp_const_none;
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}
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MP_DEFINE_CONST_FUN_OBJ_2(samd_clock_set_calibration_obj, samd_clock_set_calibration);
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MP_PROPERTY_GETSET(samd_clock_calibration_obj,
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(mp_obj_t)&samd_clock_get_calibration_obj,
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(mp_obj_t)&samd_clock_set_calibration_obj);
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STATIC const mp_rom_map_elem_t samd_clock_locals_dict_table[] = {
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{ MP_ROM_QSTR(MP_QSTR_enabled), MP_ROM_PTR(&samd_clock_enabled_obj) },
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{ MP_ROM_QSTR(MP_QSTR_parent), MP_ROM_PTR(&samd_clock_parent_obj) },
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{ MP_ROM_QSTR(MP_QSTR_frequency), MP_ROM_PTR(&samd_clock_frequency_obj) },
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{ MP_ROM_QSTR(MP_QSTR_calibration), MP_ROM_PTR(&samd_clock_calibration_obj) },
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};
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STATIC MP_DEFINE_CONST_DICT(samd_clock_locals_dict, samd_clock_locals_dict_table);
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const mp_obj_type_t samd_clock_type = {
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{ &mp_type_type },
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.name = MP_QSTR_Clock,
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.print = samd_clock_print,
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.locals_dict = (mp_obj_t)&samd_clock_locals_dict,
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};
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#ifdef SAMD21
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#ifdef SAMD21_EXPOSE_ALL_CLOCKS
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CLOCK_SOURCE(XOSC);
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CLOCK_SOURCE(GCLKIN);
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CLOCK_SOURCE(GCLKGEN1);
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CLOCK_SOURCE(OSCULP32K);
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#endif
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CLOCK_SOURCE(OSC32K);
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CLOCK_SOURCE(XOSC32K);
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#ifdef SAMD21_EXPOSE_ALL_CLOCKS
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CLOCK_SOURCE(OSC8M);
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CLOCK_SOURCE(DFLL48M);
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CLOCK_SOURCE(DPLL96M);
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CLOCK_GCLK_(SYSCTRL, DFLL48);
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CLOCK_GCLK_(SYSCTRL, FDPLL);
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CLOCK_GCLK_(SYSCTRL, FDPLL32K);
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CLOCK_GCLK(WDT);
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#endif
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CLOCK_GCLK(RTC);
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#ifdef SAMD21_EXPOSE_ALL_CLOCKS
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CLOCK_GCLK(EIC);
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CLOCK_GCLK(USB);
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CLOCK_GCLK_(EVSYS, 0);
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CLOCK_GCLK_(EVSYS, 1);
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CLOCK_GCLK_(EVSYS, 2);
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CLOCK_GCLK_(EVSYS, 3);
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CLOCK_GCLK_(EVSYS, 4);
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CLOCK_GCLK_(EVSYS, 5);
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CLOCK_GCLK_(EVSYS, 6);
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CLOCK_GCLK_(EVSYS, 7);
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CLOCK_GCLK_(EVSYS, 8);
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CLOCK_GCLK_(EVSYS, 9);
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CLOCK_GCLK_(EVSYS, 10);
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CLOCK_GCLK_(EVSYS, 11);
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CLOCK(SERCOMx_SLOW, 1, 19);
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CLOCK_GCLK_(SERCOM0, CORE);
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CLOCK_GCLK_(SERCOM1, CORE);
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CLOCK_GCLK_(SERCOM2, CORE);
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CLOCK_GCLK_(SERCOM3, CORE);
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CLOCK_GCLK_(SERCOM4, CORE);
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CLOCK_GCLK_(SERCOM5, CORE);
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CLOCK(TCC0_TCC1, 1, 26);
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CLOCK(TCC2_TCC3, 1, 27);
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CLOCK(TC4_TC5, 1, 28);
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CLOCK(TC6_TC7, 1, 29);
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CLOCK_GCLK(ADC);
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CLOCK_GCLK_(AC, DIG);
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CLOCK_GCLK_(AC, ANA);
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CLOCK_GCLK(DAC);
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CLOCK_GCLK(PTC);
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CLOCK_GCLK_(I2S, 0);
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CLOCK_GCLK_(I2S, 1);
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CLOCK(SYSTICK, 2, 0);
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#endif
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STATIC const mp_rom_map_elem_t samd_clock_global_dict_table[] = {
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#ifdef SAMD21_EXPOSE_ALL_CLOCKS
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CLOCK_ENTRY(XOSC),
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CLOCK_ENTRY(GCLKIN),
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CLOCK_ENTRY(GCLKGEN1),
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CLOCK_ENTRY(OSCULP32K),
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#endif
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CLOCK_ENTRY(OSC32K),
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CLOCK_ENTRY(XOSC32K),
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#ifdef SAMD21_EXPOSE_ALL_CLOCKS
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CLOCK_ENTRY(OSC8M),
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CLOCK_ENTRY(DFLL48M),
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CLOCK_ENTRY(DPLL96M),
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CLOCK_ENTRY_(SYSCTRL, DFLL48),
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CLOCK_ENTRY_(SYSCTRL, FDPLL),
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CLOCK_ENTRY_(SYSCTRL, FDPLL32K),
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CLOCK_ENTRY(WDT),
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#endif
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CLOCK_ENTRY(RTC),
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#ifdef SAMD21_EXPOSE_ALL_CLOCKS
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CLOCK_ENTRY(EIC),
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CLOCK_ENTRY(USB),
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CLOCK_ENTRY_(EVSYS, 0),
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CLOCK_ENTRY_(EVSYS, 1),
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CLOCK_ENTRY_(EVSYS, 2),
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CLOCK_ENTRY_(EVSYS, 3),
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CLOCK_ENTRY_(EVSYS, 4),
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CLOCK_ENTRY_(EVSYS, 5),
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CLOCK_ENTRY_(EVSYS, 6),
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CLOCK_ENTRY_(EVSYS, 7),
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CLOCK_ENTRY_(EVSYS, 8),
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CLOCK_ENTRY_(EVSYS, 9),
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CLOCK_ENTRY_(EVSYS, 10),
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CLOCK_ENTRY_(EVSYS, 11),
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CLOCK_ENTRY(SERCOMx_SLOW),
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CLOCK_ENTRY_(SERCOM0, CORE),
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CLOCK_ENTRY_(SERCOM1, CORE),
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CLOCK_ENTRY_(SERCOM2, CORE),
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CLOCK_ENTRY_(SERCOM3, CORE),
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CLOCK_ENTRY_(SERCOM4, CORE),
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CLOCK_ENTRY_(SERCOM5, CORE),
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CLOCK_ENTRY(TCC0_TCC1),
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CLOCK_ENTRY(TCC2_TCC3),
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CLOCK_ENTRY(TC4_TC5),
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CLOCK_ENTRY(TC6_TC7),
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CLOCK_ENTRY(ADC),
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CLOCK_ENTRY_(AC, DIG),
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CLOCK_ENTRY_(AC, ANA),
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CLOCK_ENTRY(DAC),
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CLOCK_ENTRY(PTC),
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CLOCK_ENTRY_(I2S, 0),
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CLOCK_ENTRY_(I2S, 1),
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CLOCK_ENTRY(SYSTICK),
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#endif
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};
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MP_DEFINE_CONST_DICT(samd_clock_globals, samd_clock_global_dict_table);
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#endif // SAMD21
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#ifdef SAM_D5X_E5X
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#include <instance/can0.h>
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#include <instance/can1.h>
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#include <instance/i2s.h>
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#include <instance/sdhc1.h>
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#include <instance/sercom6.h>
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#include <instance/sercom7.h>
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#include <instance/tcc4.h>
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CLOCK_SOURCE(XOSC0);
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CLOCK_SOURCE(XOSC1);
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CLOCK_SOURCE(GCLKIN);
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CLOCK_SOURCE(GCLKGEN1);
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CLOCK_SOURCE(OSCULP32K);
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CLOCK_SOURCE(XOSC32K);
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CLOCK_SOURCE(DFLL);
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CLOCK_SOURCE(DPLL0);
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CLOCK_SOURCE(DPLL1);
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CLOCK_GCLK_(OSCCTRL, DFLL48);
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CLOCK_GCLK_(OSCCTRL, FDPLL0);
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CLOCK_GCLK_(OSCCTRL, FDPLL1);
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CLOCK_GCLK_(OSCCTRL, FDPLL032K); // GCLK_OSCCTRL_FDPLL1_32K, GCLK_SDHC0_SLOW, GCLK_SDHC1_SLOW, GCLK_SERCOM[0..7]_SLOW
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CLOCK_GCLK(EIC);
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CLOCK_GCLK_(FREQM, MSR);
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// 6: GCLK_FREQM_REF
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CLOCK_GCLK_(SERCOM0, CORE);
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CLOCK_GCLK_(SERCOM1, CORE);
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CLOCK(TC0_TC1, 1, 9);
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CLOCK_GCLK(USB);
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CLOCK_GCLK_(EVSYS, 0);
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CLOCK_GCLK_(EVSYS, 1);
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CLOCK_GCLK_(EVSYS, 2);
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CLOCK_GCLK_(EVSYS, 3);
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CLOCK_GCLK_(EVSYS, 4);
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CLOCK_GCLK_(EVSYS, 5);
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CLOCK_GCLK_(EVSYS, 6);
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CLOCK_GCLK_(EVSYS, 7);
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CLOCK_GCLK_(EVSYS, 8);
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CLOCK_GCLK_(EVSYS, 9);
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CLOCK_GCLK_(EVSYS, 10);
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CLOCK_GCLK_(EVSYS, 11);
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CLOCK_GCLK_(SERCOM2, CORE);
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CLOCK_GCLK_(SERCOM3, CORE);
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CLOCK(TCC0_TCC1, 1, 25);
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CLOCK(TC2_TC3, 1, 26);
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CLOCK_GCLK(CAN0);
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CLOCK_GCLK(CAN1);
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CLOCK(TCC2_TCC3, 1, 29);
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CLOCK(TC4_TC5, 1, 30);
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// CLOCK_GCLK(PDEC);
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// CLOCK_GCLK(AC);
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// CLOCK_GCLK(CCL);
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CLOCK_GCLK_(SERCOM4, CORE);
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CLOCK_GCLK_(SERCOM5, CORE);
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CLOCK_GCLK_(SERCOM6, CORE);
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CLOCK_GCLK_(SERCOM7, CORE);
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CLOCK_GCLK(TCC4);
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CLOCK(TC6_TC7, 1, 39);
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CLOCK_GCLK(ADC0);
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CLOCK_GCLK(ADC1);
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CLOCK_GCLK(DAC);
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CLOCK_GCLK_(I2S, 0);
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CLOCK_GCLK_(I2S, 1);
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// CLOCK_GCLK(SDHC0);
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// CLOCK_GCLK(SDHC1);
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// 47: GCLK_CM4_TRACE
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CLOCK(SYSTICK, 2, 0);
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CLOCK(CPU, 2, 1);
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CLOCK(RTC, 2, 2);
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STATIC const mp_rom_map_elem_t samd_clock_global_dict_table[] = {
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CLOCK_ENTRY(XOSC0),
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CLOCK_ENTRY(XOSC1),
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CLOCK_ENTRY(GCLKIN),
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CLOCK_ENTRY(GCLKGEN1),
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CLOCK_ENTRY(OSCULP32K),
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CLOCK_ENTRY(XOSC32K),
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CLOCK_ENTRY(DFLL),
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CLOCK_ENTRY(DPLL0),
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CLOCK_ENTRY(DPLL1),
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CLOCK_ENTRY_(OSCCTRL, DFLL48),
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CLOCK_ENTRY_(OSCCTRL, FDPLL0),
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CLOCK_ENTRY_(OSCCTRL, FDPLL1),
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CLOCK_ENTRY_(OSCCTRL, FDPLL032K),
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CLOCK_ENTRY(EIC),
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CLOCK_ENTRY_(FREQM, MSR),
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CLOCK_ENTRY_(SERCOM0, CORE),
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CLOCK_ENTRY_(SERCOM1, CORE),
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CLOCK_ENTRY(TC0_TC1),
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CLOCK_ENTRY(USB),
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CLOCK_ENTRY_(EVSYS, 0),
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CLOCK_ENTRY_(EVSYS, 1),
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CLOCK_ENTRY_(EVSYS, 2),
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CLOCK_ENTRY_(EVSYS, 3),
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CLOCK_ENTRY_(EVSYS, 4),
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CLOCK_ENTRY_(EVSYS, 5),
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CLOCK_ENTRY_(EVSYS, 6),
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CLOCK_ENTRY_(EVSYS, 7),
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CLOCK_ENTRY_(EVSYS, 8),
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CLOCK_ENTRY_(EVSYS, 9),
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CLOCK_ENTRY_(EVSYS, 10),
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CLOCK_ENTRY_(EVSYS, 11),
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CLOCK_ENTRY_(SERCOM2, CORE),
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CLOCK_ENTRY_(SERCOM3, CORE),
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CLOCK_ENTRY(TCC0_TCC1),
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CLOCK_ENTRY(TC2_TC3),
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CLOCK_ENTRY(CAN0),
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CLOCK_ENTRY(CAN1),
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CLOCK_ENTRY(TCC2_TCC3),
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CLOCK_ENTRY(TC4_TC5),
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// CLOCK_ENTRY(PDEC),
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// CLOCK_ENTRY(AC),
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// CLOCK_ENTRY(CCL),
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CLOCK_ENTRY_(SERCOM4, CORE),
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CLOCK_ENTRY_(SERCOM5, CORE),
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CLOCK_ENTRY_(SERCOM6, CORE),
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CLOCK_ENTRY_(SERCOM7, CORE),
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CLOCK_ENTRY(TCC4),
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CLOCK_ENTRY(TC6_TC7),
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CLOCK_ENTRY(ADC0),
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CLOCK_ENTRY(ADC1),
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CLOCK_ENTRY(DAC),
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CLOCK_ENTRY_(I2S, 0),
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CLOCK_ENTRY_(I2S, 1),
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// CLOCK_ENTRY(SDHC0),
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// CLOCK_ENTRY(SDHC1),
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CLOCK_ENTRY(SYSTICK),
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CLOCK_ENTRY(CPU),
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CLOCK_ENTRY(RTC),
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};
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MP_DEFINE_CONST_DICT(samd_clock_globals, samd_clock_global_dict_table);
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#endif // SAMD51
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