1610 lines
52 KiB
C
1610 lines
52 KiB
C
/**
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******************************************************************************
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* @file stm32f4xx_hal_hash_ex.c
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* @author MCD Application Team
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* @version V1.1.0
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* @date 19-June-2014
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* @brief HASH HAL Extension module driver.
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* This file provides firmware functions to manage the following
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* functionalities of HASH peripheral:
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* + Extended HASH processing functions based on SHA224 Algorithm
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* + Extended HASH processing functions based on SHA256 Algorithm
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*
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@verbatim
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==============================================================================
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##### How to use this driver #####
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==============================================================================
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[..]
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The HASH HAL driver can be used as follows:
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(#)Initialize the HASH low level resources by implementing the HAL_HASH_MspInit():
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(##) Enable the HASH interface clock using __HASH_CLK_ENABLE()
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(##) In case of using processing APIs based on interrupts (e.g. HAL_HMACEx_SHA224_Start())
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(+++) Configure the HASH interrupt priority using HAL_NVIC_SetPriority()
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(+++) Enable the HASH IRQ handler using HAL_NVIC_EnableIRQ()
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(+++) In HASH IRQ handler, call HAL_HASH_IRQHandler()
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(##) In case of using DMA to control data transfer (e.g. HAL_HMACEx_SH224_Start_DMA())
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(+++) Enable the DMAx interface clock using __DMAx_CLK_ENABLE()
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(+++) Configure and enable one DMA stream one for managing data transfer from
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memory to peripheral (input stream). Managing data transfer from
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peripheral to memory can be performed only using CPU
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(+++) Associate the initialized DMA handle to the HASH DMA handle
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using __HAL_LINKDMA()
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(+++) Configure the priority and enable the NVIC for the transfer complete
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interrupt on the DMA Stream: HAL_NVIC_SetPriority() and HAL_NVIC_EnableIRQ()
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(#)Initialize the HASH HAL using HAL_HASH_Init(). This function configures mainly:
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(##) The data type: 1-bit, 8-bit, 16-bit and 32-bit.
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(##) For HMAC, the encryption key.
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(##) For HMAC, the key size used for encryption.
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(#)Three processing functions are available:
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(##) Polling mode: processing APIs are blocking functions
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i.e. they process the data and wait till the digest computation is finished
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e.g. HAL_HASHEx_SHA224_Start()
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(##) Interrupt mode: encryption and decryption APIs are not blocking functions
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i.e. they process the data under interrupt
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e.g. HAL_HASHEx_SHA224_Start_IT()
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(##) DMA mode: processing APIs are not blocking functions and the CPU is
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not used for data transfer i.e. the data transfer is ensured by DMA
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e.g. HAL_HASHEx_SHA224_Start_DMA()
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(#)When the processing function is called at first time after HAL_HASH_Init()
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the HASH peripheral is initialized and processes the buffer in input.
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After that, the digest computation is started.
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When processing multi-buffer use the accumulate function to write the
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data in the peripheral without starting the digest computation. In last
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buffer use the start function to input the last buffer ans start the digest
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computation.
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(##) e.g. HAL_HASHEx_SHA224_Accumulate() : write 1st data buffer in the peripheral without starting the digest computation
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(##) write (n-1)th data buffer in the peripheral without starting the digest computation
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(##) HAL_HASHEx_SHA224_Start() : write (n)th data buffer in the peripheral and start the digest computation
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(#)In HMAC mode, there is no Accumulate API. Only Start API is available.
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(#)In case of using DMA, call the DMA start processing e.g. HAL_HASHEx_SHA224_Start_DMA().
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After that, call the finish function in order to get the digest value
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e.g. HAL_HASHEx_SHA224_Finish()
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(#)Call HAL_HASH_DeInit() to deinitialize the HASH peripheral.
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@endverbatim
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******************************************************************************
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* @attention
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*
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* <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
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*
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* Redistribution and use in source and binary forms, with or without modification,
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* are permitted provided that the following conditions are met:
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* 1. Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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* 3. Neither the name of STMicroelectronics nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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******************************************************************************
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*/
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/* Includes ------------------------------------------------------------------*/
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#include "stm32f4xx_hal.h"
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/** @addtogroup STM32F4xx_HAL_Driver
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* @{
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*/
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/** @defgroup HASHEx
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* @brief HASH Extension HAL module driver.
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* @{
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*/
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#ifdef HAL_HASH_MODULE_ENABLED
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#if defined(STM32F437xx) || defined(STM32F439xx)
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/* Private typedef -----------------------------------------------------------*/
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/* Private define ------------------------------------------------------------*/
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/* Private macro -------------------------------------------------------------*/
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/* Private variables ---------------------------------------------------------*/
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/* Private function prototypes -----------------------------------------------*/
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static void HASHEx_DMAXferCplt(DMA_HandleTypeDef *hdma);
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static void HASHEx_WriteData(uint8_t *pInBuffer, uint32_t Size);
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static void HASHEx_GetDigest(uint8_t *pMsgDigest, uint8_t Size);
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static void HASHEx_DMAError(DMA_HandleTypeDef *hdma);
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/* Private functions ---------------------------------------------------------*/
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/** @defgroup HASHEx_Private_Functions
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* @{
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*/
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/** @defgroup HASHEx_Group1 HASH processing functions
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* @brief processing functions using polling mode
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*
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@verbatim
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===============================================================================
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##### HASH processing using polling mode functions #####
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===============================================================================
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[..] This section provides functions allowing to calculate in polling mode
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the hash value using one of the following algorithms:
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(+) SHA224
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(+) SHA256
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@endverbatim
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* @{
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*/
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/**
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* @brief Initializes the HASH peripheral in SHA224 mode
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* then processes pInBuffer. The digest is available in pOutBuffer
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* @param hhash: pointer to a HASH_HandleTypeDef structure that contains
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* the configuration information for HASH module
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* @param pInBuffer: Pointer to the input buffer (buffer to be hashed).
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* @param Size: Length of the input buffer in bytes.
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* If the Size is not multiple of 64 bytes, the padding is managed by hardware.
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* @param pOutBuffer: Pointer to the computed digest. Its size must be 28 bytes.
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* @param Timeout: Specify Timeout value
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* @retval HAL status
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*/
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HAL_StatusTypeDef HAL_HASHEx_SHA224_Start(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, uint8_t* pOutBuffer, uint32_t Timeout)
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{
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uint32_t tickstart = 0;
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/* Process Locked */
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__HAL_LOCK(hhash);
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/* Change the HASH state */
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hhash->State = HAL_HASH_STATE_BUSY;
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/* Check if initialization phase has already been performed */
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if(hhash->Phase == HAL_HASH_PHASE_READY)
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{
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/* Select the SHA224 mode and reset the HASH processor core, so that the HASH will be ready to compute
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the message digest of a new message */
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HASH->CR |= HASH_AlgoSelection_SHA224 | HASH_CR_INIT;
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}
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/* Set the phase */
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hhash->Phase = HAL_HASH_PHASE_PROCESS;
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/* Configure the number of valid bits in last word of the message */
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__HAL_HASH_SET_NBVALIDBITS(Size);
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/* Write input buffer in data register */
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HASHEx_WriteData(pInBuffer, Size);
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/* Start the digest calculation */
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__HAL_HASH_START_DIGEST();
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/* Get tick */
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tickstart = HAL_GetTick();
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while((HASH->SR & HASH_FLAG_BUSY) == HASH_FLAG_BUSY)
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{
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/* Check for the Timeout */
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if(Timeout != HAL_MAX_DELAY)
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{
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if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout))
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{
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/* Change state */
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hhash->State = HAL_HASH_STATE_TIMEOUT;
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/* Process Unlocked */
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__HAL_UNLOCK(hhash);
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return HAL_TIMEOUT;
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}
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}
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}
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/* Read the message digest */
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HASHEx_GetDigest(pOutBuffer, 28);
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/* Change the HASH state */
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hhash->State = HAL_HASH_STATE_READY;
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/* Process Unlocked */
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__HAL_UNLOCK(hhash);
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/* Return function status */
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return HAL_OK;
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}
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/**
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* @brief Initializes the HASH peripheral in SHA256 mode then processes pInBuffer.
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The digest is available in pOutBuffer.
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* @param hhash: pointer to a HASH_HandleTypeDef structure that contains
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* the configuration information for HASH module
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* @param pInBuffer: Pointer to the input buffer (buffer to be hashed).
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* @param Size: Length of the input buffer in bytes.
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* If the Size is not multiple of 64 bytes, the padding is managed by hardware.
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* @param pOutBuffer: Pointer to the computed digest. Its size must be 32 bytes.
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* @param Timeout: Specify Timeout value
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* @retval HAL status
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*/
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HAL_StatusTypeDef HAL_HASHEx_SHA256_Start(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, uint8_t* pOutBuffer, uint32_t Timeout)
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{
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uint32_t tickstart = 0;
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/* Process Locked */
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__HAL_LOCK(hhash);
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/* Change the HASH state */
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hhash->State = HAL_HASH_STATE_BUSY;
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/* Check if initialization phase has already been performed */
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if(hhash->Phase == HAL_HASH_PHASE_READY)
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{
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/* Select the SHA256 mode and reset the HASH processor core, so that the HASH will be ready to compute
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the message digest of a new message */
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HASH->CR |= HASH_AlgoSelection_SHA256 | HASH_CR_INIT;
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}
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/* Set the phase */
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hhash->Phase = HAL_HASH_PHASE_PROCESS;
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/* Configure the number of valid bits in last word of the message */
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__HAL_HASH_SET_NBVALIDBITS(Size);
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/* Write input buffer in data register */
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HASHEx_WriteData(pInBuffer, Size);
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/* Start the digest calculation */
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__HAL_HASH_START_DIGEST();
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/* Get tick */
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tickstart = HAL_GetTick();
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while((HASH->SR & HASH_FLAG_BUSY) == HASH_FLAG_BUSY)
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{
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/* Check for the Timeout */
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if(Timeout != HAL_MAX_DELAY)
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{
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if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout))
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{
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/* Change state */
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hhash->State = HAL_HASH_STATE_TIMEOUT;
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/* Process Unlocked */
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__HAL_UNLOCK(hhash);
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return HAL_TIMEOUT;
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}
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}
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}
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/* Read the message digest */
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HASHEx_GetDigest(pOutBuffer, 32);
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/* Change the HASH state */
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hhash->State = HAL_HASH_STATE_READY;
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/* Process Unlocked */
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__HAL_UNLOCK(hhash);
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/* Return function status */
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return HAL_OK;
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}
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/**
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* @brief Initializes the HASH peripheral in SHA224 mode
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* then processes pInBuffer. The digest is available in pOutBuffer
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* @param hhash: pointer to a HASH_HandleTypeDef structure that contains
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* the configuration information for HASH module
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* @param pInBuffer: Pointer to the input buffer (buffer to be hashed).
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* @param Size: Length of the input buffer in bytes.
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* If the Size is not multiple of 64 bytes, the padding is managed by hardware.
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* @retval HAL status
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*/
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HAL_StatusTypeDef HAL_HASHEx_SHA224_Accumulate(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size)
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{
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/* Process Locked */
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__HAL_LOCK(hhash);
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/* Change the HASH state */
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hhash->State = HAL_HASH_STATE_BUSY;
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/* Check if initialization phase has already been performed */
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if(hhash->Phase == HAL_HASH_PHASE_READY)
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{
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/* Select the SHA224 mode and reset the HASH processor core, so that the HASH will be ready to compute
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the message digest of a new message */
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HASH->CR |= HASH_AlgoSelection_SHA224 | HASH_CR_INIT;
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}
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/* Set the phase */
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hhash->Phase = HAL_HASH_PHASE_PROCESS;
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/* Configure the number of valid bits in last word of the message */
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__HAL_HASH_SET_NBVALIDBITS(Size);
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/* Write input buffer in data register */
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HASHEx_WriteData(pInBuffer, Size);
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/* Change the HASH state */
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hhash->State = HAL_HASH_STATE_READY;
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/* Process Unlocked */
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__HAL_UNLOCK(hhash);
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/* Return function status */
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return HAL_OK;
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}
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/**
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* @brief Initializes the HASH peripheral in SHA256 mode then processes pInBuffer.
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The digest is available in pOutBuffer.
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* @param hhash: pointer to a HASH_HandleTypeDef structure that contains
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* the configuration information for HASH module
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* @param pInBuffer: Pointer to the input buffer (buffer to be hashed).
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* @param Size: Length of the input buffer in bytes.
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* If the Size is not multiple of 64 bytes, the padding is managed by hardware.
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* @retval HAL status
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*/
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HAL_StatusTypeDef HAL_HASHEx_SHA256_Accumulate(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size)
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{
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/* Process Locked */
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__HAL_LOCK(hhash);
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/* Change the HASH state */
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hhash->State = HAL_HASH_STATE_BUSY;
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/* Check if initialization phase has already been performed */
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if(hhash->Phase == HAL_HASH_PHASE_READY)
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{
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/* Select the SHA256 mode and reset the HASH processor core, so that the HASH will be ready to compute
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the message digest of a new message */
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HASH->CR |= HASH_AlgoSelection_SHA256 | HASH_CR_INIT;
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}
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/* Set the phase */
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hhash->Phase = HAL_HASH_PHASE_PROCESS;
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/* Configure the number of valid bits in last word of the message */
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__HAL_HASH_SET_NBVALIDBITS(Size);
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/* Write input buffer in data register */
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HASHEx_WriteData(pInBuffer, Size);
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/* Change the HASH state */
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hhash->State = HAL_HASH_STATE_READY;
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/* Process Unlocked */
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__HAL_UNLOCK(hhash);
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/* Return function status */
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return HAL_OK;
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}
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/**
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* @}
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*/
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/** @defgroup HASHEx_Group2 HMAC processing functions using polling mode
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* @brief HMAC processing functions using polling mode .
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*
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@verbatim
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===============================================================================
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##### HMAC processing using polling mode functions #####
|
|
===============================================================================
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[..] This section provides functions allowing to calculate in polling mode
|
|
the HMAC value using one of the following algorithms:
|
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(+) SHA224
|
|
(+) SHA256
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|
|
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@endverbatim
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* @{
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*/
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/**
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* @brief Initializes the HASH peripheral in HMAC SHA224 mode
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* then processes pInBuffer. The digest is available in pOutBuffer.
|
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* @param hhash: pointer to a HASH_HandleTypeDef structure that contains
|
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* the configuration information for HASH module
|
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* @param pInBuffer: Pointer to the input buffer (buffer to be hashed).
|
|
* @param Size: Length of the input buffer in bytes.
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* If the Size is not multiple of 64 bytes, the padding is managed by hardware.
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* @param pOutBuffer: Pointer to the computed digest. Its size must be 20 bytes.
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* @retval HAL status
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*/
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HAL_StatusTypeDef HAL_HMACEx_SHA224_Start(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, uint8_t* pOutBuffer, uint32_t Timeout)
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{
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uint32_t tickstart = 0;
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/* Process Locked */
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__HAL_LOCK(hhash);
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/* Change the HASH state */
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hhash->State = HAL_HASH_STATE_BUSY;
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/* Check if initialization phase has already been performed */
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if(hhash->Phase == HAL_HASH_PHASE_READY)
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{
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/* Check if key size is greater than 64 bytes */
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if(hhash->Init.KeySize > 64)
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{
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/* Select the HMAC SHA224 mode */
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HASH->CR |= (HASH_AlgoSelection_SHA224 | HASH_AlgoMode_HMAC | HASH_HMACKeyType_LongKey | HASH_CR_INIT);
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}
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else
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{
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/* Select the HMAC SHA224 mode */
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HASH->CR |= (HASH_AlgoSelection_SHA224 | HASH_AlgoMode_HMAC | HASH_CR_INIT);
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}
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}
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/* Set the phase */
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hhash->Phase = HAL_HASH_PHASE_PROCESS;
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/************************** STEP 1 ******************************************/
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/* Configure the number of valid bits in last word of the message */
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__HAL_HASH_SET_NBVALIDBITS(hhash->Init.KeySize);
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/* Write input buffer in data register */
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HASHEx_WriteData(hhash->Init.pKey, hhash->Init.KeySize);
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/* Start the digest calculation */
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__HAL_HASH_START_DIGEST();
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/* Get tick */
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tickstart = HAL_GetTick();
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while((HASH->SR & HASH_FLAG_BUSY) == HASH_FLAG_BUSY)
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{
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/* Check for the Timeout */
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if(Timeout != HAL_MAX_DELAY)
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{
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if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout))
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{
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/* Change state */
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hhash->State = HAL_HASH_STATE_TIMEOUT;
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/* Process Unlocked */
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__HAL_UNLOCK(hhash);
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return HAL_TIMEOUT;
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}
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}
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}
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/************************** STEP 2 ******************************************/
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/* Configure the number of valid bits in last word of the message */
|
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__HAL_HASH_SET_NBVALIDBITS(Size);
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/* Write input buffer in data register */
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HASHEx_WriteData(pInBuffer, Size);
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/* Start the digest calculation */
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__HAL_HASH_START_DIGEST();
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/* Get tick */
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tickstart = HAL_GetTick();
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while((HASH->SR & HASH_FLAG_BUSY) == HASH_FLAG_BUSY)
|
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{
|
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/* Check for the Timeout */
|
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if(Timeout != HAL_MAX_DELAY)
|
|
{
|
|
if((HAL_GetTick() - tickstart ) > Timeout)
|
|
{
|
|
/* Change state */
|
|
hhash->State = HAL_HASH_STATE_TIMEOUT;
|
|
|
|
/* Process Unlocked */
|
|
__HAL_UNLOCK(hhash);
|
|
|
|
return HAL_TIMEOUT;
|
|
}
|
|
}
|
|
}
|
|
/************************** STEP 3 ******************************************/
|
|
/* Configure the number of valid bits in last word of the message */
|
|
__HAL_HASH_SET_NBVALIDBITS(hhash->Init.KeySize);
|
|
|
|
/* Write input buffer in data register */
|
|
HASHEx_WriteData(hhash->Init.pKey, hhash->Init.KeySize);
|
|
|
|
/* Start the digest calculation */
|
|
__HAL_HASH_START_DIGEST();
|
|
|
|
/* Get tick */
|
|
tickstart = HAL_GetTick();
|
|
|
|
while((HASH->SR & HASH_FLAG_BUSY) == HASH_FLAG_BUSY)
|
|
{
|
|
/* Check for the Timeout */
|
|
if(Timeout != HAL_MAX_DELAY)
|
|
{
|
|
if((HAL_GetTick() - tickstart ) > Timeout)
|
|
{
|
|
/* Change state */
|
|
hhash->State = HAL_HASH_STATE_TIMEOUT;
|
|
|
|
/* Process Unlocked */
|
|
__HAL_UNLOCK(hhash);
|
|
|
|
return HAL_TIMEOUT;
|
|
}
|
|
}
|
|
}
|
|
/* Read the message digest */
|
|
HASHEx_GetDigest(pOutBuffer, 28);
|
|
|
|
/* Change the HASH state */
|
|
hhash->State = HAL_HASH_STATE_READY;
|
|
|
|
/* Process Unlocked */
|
|
__HAL_UNLOCK(hhash);
|
|
|
|
/* Return function status */
|
|
return HAL_OK;
|
|
}
|
|
|
|
/**
|
|
* @brief Initializes the HASH peripheral in HMAC SHA256 mode
|
|
* then processes pInBuffer. The digest is available in pOutBuffer
|
|
* @param hhash: pointer to a HASH_HandleTypeDef structure that contains
|
|
* the configuration information for HASH module
|
|
* @param pInBuffer: Pointer to the input buffer (buffer to be hashed).
|
|
* @param Size: Length of the input buffer in bytes.
|
|
* If the Size is not multiple of 64 bytes, the padding is managed by hardware.
|
|
* @param pOutBuffer: Pointer to the computed digest. Its size must be 20 bytes.
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef HAL_HMACEx_SHA256_Start(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, uint8_t* pOutBuffer, uint32_t Timeout)
|
|
{
|
|
uint32_t tickstart = 0;
|
|
|
|
/* Process Locked */
|
|
__HAL_LOCK(hhash);
|
|
|
|
/* Change the HASH state */
|
|
hhash->State = HAL_HASH_STATE_BUSY;
|
|
|
|
/* Check if initialization phase has already been performed */
|
|
if(hhash->Phase == HAL_HASH_PHASE_READY)
|
|
{
|
|
/* Check if key size is greater than 64 bytes */
|
|
if(hhash->Init.KeySize > 64)
|
|
{
|
|
/* Select the HMAC SHA256 mode */
|
|
HASH->CR |= (HASH_AlgoSelection_SHA256 | HASH_AlgoMode_HMAC | HASH_HMACKeyType_LongKey);
|
|
}
|
|
else
|
|
{
|
|
/* Select the HMAC SHA256 mode */
|
|
HASH->CR |= (HASH_AlgoSelection_SHA256 | HASH_AlgoMode_HMAC);
|
|
}
|
|
/* Reset the HASH processor core, so that the HASH will be ready to compute
|
|
the message digest of a new message */
|
|
HASH->CR |= HASH_CR_INIT;
|
|
}
|
|
|
|
/* Set the phase */
|
|
hhash->Phase = HAL_HASH_PHASE_PROCESS;
|
|
|
|
/************************** STEP 1 ******************************************/
|
|
/* Configure the number of valid bits in last word of the message */
|
|
__HAL_HASH_SET_NBVALIDBITS(hhash->Init.KeySize);
|
|
|
|
/* Write input buffer in data register */
|
|
HASHEx_WriteData(hhash->Init.pKey, hhash->Init.KeySize);
|
|
|
|
/* Start the digest calculation */
|
|
__HAL_HASH_START_DIGEST();
|
|
|
|
/* Get tick */
|
|
tickstart = HAL_GetTick();
|
|
|
|
while((HASH->SR & HASH_FLAG_BUSY) == HASH_FLAG_BUSY)
|
|
{
|
|
/* Check for the Timeout */
|
|
if(Timeout != HAL_MAX_DELAY)
|
|
{
|
|
if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout))
|
|
{
|
|
/* Change state */
|
|
hhash->State = HAL_HASH_STATE_TIMEOUT;
|
|
|
|
/* Process Unlocked */
|
|
__HAL_UNLOCK(hhash);
|
|
|
|
return HAL_TIMEOUT;
|
|
}
|
|
}
|
|
}
|
|
/************************** STEP 2 ******************************************/
|
|
/* Configure the number of valid bits in last word of the message */
|
|
__HAL_HASH_SET_NBVALIDBITS(Size);
|
|
|
|
/* Write input buffer in data register */
|
|
HASHEx_WriteData(pInBuffer, Size);
|
|
|
|
/* Start the digest calculation */
|
|
__HAL_HASH_START_DIGEST();
|
|
|
|
/* Get tick */
|
|
tickstart = HAL_GetTick();
|
|
|
|
while((HASH->SR & HASH_FLAG_BUSY) == HASH_FLAG_BUSY)
|
|
{
|
|
/* Check for the Timeout */
|
|
if(Timeout != HAL_MAX_DELAY)
|
|
{
|
|
if((HAL_GetTick() - tickstart ) > Timeout)
|
|
{
|
|
/* Change state */
|
|
hhash->State = HAL_HASH_STATE_TIMEOUT;
|
|
|
|
/* Process Unlocked */
|
|
__HAL_UNLOCK(hhash);
|
|
|
|
return HAL_TIMEOUT;
|
|
}
|
|
}
|
|
}
|
|
/************************** STEP 3 ******************************************/
|
|
/* Configure the number of valid bits in last word of the message */
|
|
__HAL_HASH_SET_NBVALIDBITS(hhash->Init.KeySize);
|
|
|
|
/* Write input buffer in data register */
|
|
HASHEx_WriteData(hhash->Init.pKey, hhash->Init.KeySize);
|
|
|
|
/* Start the digest calculation */
|
|
__HAL_HASH_START_DIGEST();
|
|
|
|
/* Get tick */
|
|
tickstart = HAL_GetTick();
|
|
|
|
while((HASH->SR & HASH_FLAG_BUSY) == HASH_FLAG_BUSY)
|
|
{
|
|
/* Check for the Timeout */
|
|
if(Timeout != HAL_MAX_DELAY)
|
|
{
|
|
if((HAL_GetTick() - tickstart ) > Timeout)
|
|
{
|
|
/* Change state */
|
|
hhash->State = HAL_HASH_STATE_TIMEOUT;
|
|
|
|
/* Process Unlocked */
|
|
__HAL_UNLOCK(hhash);
|
|
|
|
return HAL_TIMEOUT;
|
|
}
|
|
}
|
|
}
|
|
/* Read the message digest */
|
|
HASHEx_GetDigest(pOutBuffer, 32);
|
|
|
|
/* Change the HASH state */
|
|
hhash->State = HAL_HASH_STATE_READY;
|
|
|
|
/* Process Unlocked */
|
|
__HAL_UNLOCK(hhash);
|
|
|
|
/* Return function status */
|
|
return HAL_OK;
|
|
}
|
|
|
|
/**
|
|
* @}
|
|
*/
|
|
|
|
/** @defgroup HASHEx_Group3 HASH processing functions using interrupt mode
|
|
* @brief processing functions using interrupt mode.
|
|
*
|
|
@verbatim
|
|
===============================================================================
|
|
##### HASH processing using interrupt functions #####
|
|
===============================================================================
|
|
[..] This section provides functions allowing to calculate in interrupt mode
|
|
the hash value using one of the following algorithms:
|
|
(+) SHA224
|
|
(+) SHA256
|
|
|
|
@endverbatim
|
|
* @{
|
|
*/
|
|
|
|
/**
|
|
* @brief Initializes the HASH peripheral in SHA224 mode then processes pInBuffer.
|
|
* The digest is available in pOutBuffer.
|
|
* @param hhash: pointer to a HASH_HandleTypeDef structure that contains
|
|
* the configuration information for HASH module
|
|
* @param pInBuffer: Pointer to the input buffer (buffer to be hashed).
|
|
* @param Size: Length of the input buffer in bytes.
|
|
* If the Size is not multiple of 64 bytes, the padding is managed by hardware.
|
|
* @param pOutBuffer: Pointer to the computed digest. Its size must be 20 bytes.
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef HAL_HASHEx_SHA224_Start_IT(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, uint8_t* pOutBuffer)
|
|
{
|
|
uint32_t inputaddr;
|
|
uint32_t buffercounter;
|
|
uint32_t inputcounter;
|
|
|
|
/* Process Locked */
|
|
__HAL_LOCK(hhash);
|
|
|
|
if(hhash->HashITCounter == 0)
|
|
{
|
|
hhash->HashITCounter = 1;
|
|
}
|
|
else
|
|
{
|
|
hhash->HashITCounter = 0;
|
|
}
|
|
if(hhash->State == HAL_HASH_STATE_READY)
|
|
{
|
|
/* Change the HASH state */
|
|
hhash->State = HAL_HASH_STATE_BUSY;
|
|
|
|
hhash->HashInCount = Size;
|
|
hhash->pHashInBuffPtr = pInBuffer;
|
|
hhash->pHashOutBuffPtr = pOutBuffer;
|
|
|
|
/* Check if initialization phase has already been performed */
|
|
if(hhash->Phase == HAL_HASH_PHASE_READY)
|
|
{
|
|
/* Select the SHA224 mode */
|
|
HASH->CR |= HASH_AlgoSelection_SHA224;
|
|
/* Reset the HASH processor core, so that the HASH will be ready to compute
|
|
the message digest of a new message */
|
|
HASH->CR |= HASH_CR_INIT;
|
|
}
|
|
|
|
/* Set the phase */
|
|
hhash->Phase = HAL_HASH_PHASE_PROCESS;
|
|
|
|
/* Process Unlocked */
|
|
__HAL_UNLOCK(hhash);
|
|
|
|
/* Enable Interrupts */
|
|
HASH->IMR = (HASH_IT_DINI | HASH_IT_DCI);
|
|
|
|
/* Return function status */
|
|
return HAL_OK;
|
|
}
|
|
if(__HAL_HASH_GET_FLAG(HASH_FLAG_DCIS))
|
|
{
|
|
/* Read the message digest */
|
|
HASHEx_GetDigest(hhash->pHashOutBuffPtr, 28);
|
|
if(hhash->HashInCount == 0)
|
|
{
|
|
/* Disable Interrupts */
|
|
HASH->IMR = 0;
|
|
/* Change the HASH state */
|
|
hhash->State = HAL_HASH_STATE_READY;
|
|
/* Call digest computation complete callback */
|
|
HAL_HASH_DgstCpltCallback(hhash);
|
|
}
|
|
}
|
|
if(__HAL_HASH_GET_FLAG(HASH_FLAG_DINIS))
|
|
{
|
|
if(hhash->HashInCount > 64)
|
|
{
|
|
inputaddr = (uint32_t)hhash->pHashInBuffPtr;
|
|
/* Write the Input block in the Data IN register */
|
|
for(buffercounter = 0; buffercounter < 64; buffercounter+=4)
|
|
{
|
|
HASH->DIN = *(uint32_t*)inputaddr;
|
|
inputaddr+=4;
|
|
}
|
|
if(hhash->HashITCounter == 0)
|
|
{
|
|
HASH->DIN = *(uint32_t*)inputaddr;
|
|
if(hhash->HashInCount >= 68)
|
|
{
|
|
/* Decrement buffer counter */
|
|
hhash->HashInCount -= 68;
|
|
hhash->pHashInBuffPtr+= 68;
|
|
}
|
|
else
|
|
{
|
|
hhash->HashInCount -= 64;
|
|
}
|
|
}
|
|
else
|
|
{
|
|
/* Decrement buffer counter */
|
|
hhash->HashInCount -= 64;
|
|
hhash->pHashInBuffPtr+= 64;
|
|
}
|
|
}
|
|
else
|
|
{
|
|
/* Get the buffer address */
|
|
inputaddr = (uint32_t)hhash->pHashInBuffPtr;
|
|
/* Get the buffer counter */
|
|
inputcounter = hhash->HashInCount;
|
|
/* Disable Interrupts */
|
|
HASH->IMR &= ~(HASH_IT_DINI);
|
|
/* Configure the number of valid bits in last word of the message */
|
|
__HAL_HASH_SET_NBVALIDBITS(inputcounter);
|
|
|
|
if((inputcounter > 4) && (inputcounter%4))
|
|
{
|
|
inputcounter = (inputcounter+4-inputcounter%4);
|
|
}
|
|
|
|
/* Write the Input block in the Data IN register */
|
|
for(buffercounter = 0; buffercounter < inputcounter/4; buffercounter++)
|
|
{
|
|
HASH->DIN = *(uint32_t*)inputaddr;
|
|
inputaddr+=4;
|
|
}
|
|
/* Start the digest calculation */
|
|
__HAL_HASH_START_DIGEST();
|
|
/* Reset buffer counter */
|
|
hhash->HashInCount = 0;
|
|
}
|
|
/* Call Input data transfer complete callback */
|
|
HAL_HASH_InCpltCallback(hhash);
|
|
}
|
|
|
|
/* Process Unlocked */
|
|
__HAL_UNLOCK(hhash);
|
|
|
|
/* Return function status */
|
|
return HAL_OK;
|
|
}
|
|
|
|
|
|
/**
|
|
* @brief Initializes the HASH peripheral in SHA256 mode then processes pInBuffer.
|
|
* The digest is available in pOutBuffer.
|
|
* @param hhash: pointer to a HASH_HandleTypeDef structure that contains
|
|
* the configuration information for HASH module
|
|
* @param pInBuffer: Pointer to the input buffer (buffer to be hashed).
|
|
* @param Size: Length of the input buffer in bytes.
|
|
* If the Size is not multiple of 64 bytes, the padding is managed by hardware.
|
|
* @param pOutBuffer: Pointer to the computed digest. Its size must be 20 bytes.
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef HAL_HASHEx_SHA256_Start_IT(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, uint8_t* pOutBuffer)
|
|
{
|
|
uint32_t inputaddr;
|
|
uint32_t buffercounter;
|
|
uint32_t inputcounter;
|
|
|
|
/* Process Locked */
|
|
__HAL_LOCK(hhash);
|
|
|
|
if(hhash->HashITCounter == 0)
|
|
{
|
|
hhash->HashITCounter = 1;
|
|
}
|
|
else
|
|
{
|
|
hhash->HashITCounter = 0;
|
|
}
|
|
if(hhash->State == HAL_HASH_STATE_READY)
|
|
{
|
|
/* Change the HASH state */
|
|
hhash->State = HAL_HASH_STATE_BUSY;
|
|
|
|
hhash->HashInCount = Size;
|
|
hhash->pHashInBuffPtr = pInBuffer;
|
|
hhash->pHashOutBuffPtr = pOutBuffer;
|
|
|
|
/* Check if initialization phase has already been performed */
|
|
if(hhash->Phase == HAL_HASH_PHASE_READY)
|
|
{
|
|
/* Select the SHA256 mode */
|
|
HASH->CR |= HASH_AlgoSelection_SHA256;
|
|
/* Reset the HASH processor core, so that the HASH will be ready to compute
|
|
the message digest of a new message */
|
|
HASH->CR |= HASH_CR_INIT;
|
|
}
|
|
|
|
/* Set the phase */
|
|
hhash->Phase = HAL_HASH_PHASE_PROCESS;
|
|
|
|
/* Process Unlocked */
|
|
__HAL_UNLOCK(hhash);
|
|
|
|
/* Enable Interrupts */
|
|
HASH->IMR = (HASH_IT_DINI | HASH_IT_DCI);
|
|
|
|
/* Return function status */
|
|
return HAL_OK;
|
|
}
|
|
if(__HAL_HASH_GET_FLAG(HASH_FLAG_DCIS))
|
|
{
|
|
/* Read the message digest */
|
|
HASHEx_GetDigest(hhash->pHashOutBuffPtr, 32);
|
|
if(hhash->HashInCount == 0)
|
|
{
|
|
/* Disable Interrupts */
|
|
HASH->IMR = 0;
|
|
/* Change the HASH state */
|
|
hhash->State = HAL_HASH_STATE_READY;
|
|
/* Call digest computation complete callback */
|
|
HAL_HASH_DgstCpltCallback(hhash);
|
|
}
|
|
}
|
|
if(__HAL_HASH_GET_FLAG(HASH_FLAG_DINIS))
|
|
{
|
|
if(hhash->HashInCount > 64)
|
|
{
|
|
inputaddr = (uint32_t)hhash->pHashInBuffPtr;
|
|
/* Write the Input block in the Data IN register */
|
|
for(buffercounter = 0; buffercounter < 64; buffercounter+=4)
|
|
{
|
|
HASH->DIN = *(uint32_t*)inputaddr;
|
|
inputaddr+=4;
|
|
}
|
|
if(hhash->HashITCounter == 0)
|
|
{
|
|
HASH->DIN = *(uint32_t*)inputaddr;
|
|
|
|
if(hhash->HashInCount >= 68)
|
|
{
|
|
/* Decrement buffer counter */
|
|
hhash->HashInCount -= 68;
|
|
hhash->pHashInBuffPtr+= 68;
|
|
}
|
|
else
|
|
{
|
|
hhash->HashInCount -= 64;
|
|
}
|
|
}
|
|
else
|
|
{
|
|
/* Decrement buffer counter */
|
|
hhash->HashInCount -= 64;
|
|
hhash->pHashInBuffPtr+= 64;
|
|
}
|
|
}
|
|
else
|
|
{
|
|
/* Get the buffer address */
|
|
inputaddr = (uint32_t)hhash->pHashInBuffPtr;
|
|
/* Get the buffer counter */
|
|
inputcounter = hhash->HashInCount;
|
|
/* Disable Interrupts */
|
|
HASH->IMR &= ~(HASH_IT_DINI);
|
|
/* Configure the number of valid bits in last word of the message */
|
|
__HAL_HASH_SET_NBVALIDBITS(inputcounter);
|
|
|
|
if((inputcounter > 4) && (inputcounter%4))
|
|
{
|
|
inputcounter = (inputcounter+4-inputcounter%4);
|
|
}
|
|
|
|
/* Write the Input block in the Data IN register */
|
|
for(buffercounter = 0; buffercounter < inputcounter/4; buffercounter++)
|
|
{
|
|
HASH->DIN = *(uint32_t*)inputaddr;
|
|
inputaddr+=4;
|
|
}
|
|
/* Start the digest calculation */
|
|
__HAL_HASH_START_DIGEST();
|
|
/* Reset buffer counter */
|
|
hhash->HashInCount = 0;
|
|
}
|
|
/* Call Input data transfer complete callback */
|
|
HAL_HASH_InCpltCallback(hhash);
|
|
}
|
|
|
|
/* Process Unlocked */
|
|
__HAL_UNLOCK(hhash);
|
|
|
|
/* Return function status */
|
|
return HAL_OK;
|
|
}
|
|
|
|
/**
|
|
* @brief This function handles HASH interrupt request.
|
|
* @param hhash: pointer to a HASH_HandleTypeDef structure that contains
|
|
* the configuration information for HASH module
|
|
* @retval None
|
|
*/
|
|
void HAL_HASHEx_IRQHandler(HASH_HandleTypeDef *hhash)
|
|
{
|
|
switch(HASH->CR & HASH_CR_ALGO)
|
|
{
|
|
|
|
case HASH_AlgoSelection_SHA224:
|
|
HAL_HASHEx_SHA224_Start_IT(hhash, NULL, 0, NULL);
|
|
break;
|
|
|
|
case HASH_AlgoSelection_SHA256:
|
|
HAL_HASHEx_SHA256_Start_IT(hhash, NULL, 0, NULL);
|
|
break;
|
|
|
|
default:
|
|
break;
|
|
}
|
|
}
|
|
|
|
/**
|
|
* @}
|
|
*/
|
|
|
|
/** @defgroup HASHEx_Group4 HASH processing functions using DMA mode
|
|
* @brief processing functions using DMA mode.
|
|
*
|
|
@verbatim
|
|
===============================================================================
|
|
##### HASH processing using DMA functions #####
|
|
===============================================================================
|
|
[..] This section provides functions allowing to calculate in DMA mode
|
|
the hash value using one of the following algorithms:
|
|
(+) SHA224
|
|
(+) SHA256
|
|
|
|
@endverbatim
|
|
* @{
|
|
*/
|
|
|
|
|
|
/**
|
|
* @brief Initializes the HASH peripheral in SHA224 mode then enables DMA to
|
|
control data transfer. Use HAL_HASH_SHA224_Finish() to get the digest.
|
|
* @param hhash: pointer to a HASH_HandleTypeDef structure that contains
|
|
* the configuration information for HASH module
|
|
* @param pInBuffer: Pointer to the input buffer (buffer to be hashed).
|
|
* @param Size: Length of the input buffer in bytes.
|
|
* If the Size is not multiple of 64 bytes, the padding is managed by hardware.
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef HAL_HASHEx_SHA224_Start_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size)
|
|
{
|
|
uint32_t inputaddr = (uint32_t)pInBuffer;
|
|
|
|
/* Process Locked */
|
|
__HAL_LOCK(hhash);
|
|
|
|
/* Change the HASH state */
|
|
hhash->State = HAL_HASH_STATE_BUSY;
|
|
|
|
/* Check if initialization phase has already been performed */
|
|
if(hhash->Phase == HAL_HASH_PHASE_READY)
|
|
{
|
|
/* Select the SHA224 mode and reset the HASH processor core, so that the HASH will be ready to compute
|
|
the message digest of a new message */
|
|
HASH->CR |= HASH_AlgoSelection_SHA224 | HASH_CR_INIT;
|
|
}
|
|
|
|
/* Configure the number of valid bits in last word of the message */
|
|
__HAL_HASH_SET_NBVALIDBITS(Size);
|
|
|
|
/* Set the phase */
|
|
hhash->Phase = HAL_HASH_PHASE_PROCESS;
|
|
|
|
/* Set the HASH DMA transfer complete callback */
|
|
hhash->hdmain->XferCpltCallback = HASHEx_DMAXferCplt;
|
|
/* Set the DMA error callback */
|
|
hhash->hdmain->XferErrorCallback = HASHEx_DMAError;
|
|
|
|
/* Enable the DMA In DMA Stream */
|
|
HAL_DMA_Start_IT(hhash->hdmain, inputaddr, (uint32_t)&HASH->DIN, (Size%4 ? (Size+3)/4:Size/4));
|
|
|
|
/* Enable DMA requests */
|
|
HASH->CR |= (HASH_CR_DMAE);
|
|
|
|
/* Process Unlocked */
|
|
__HAL_UNLOCK(hhash);
|
|
|
|
/* Return function status */
|
|
return HAL_OK;
|
|
}
|
|
|
|
/**
|
|
* @brief Returns the computed digest in SHA224
|
|
* @param hhash: pointer to a HASH_HandleTypeDef structure that contains
|
|
* the configuration information for HASH module
|
|
* @param pOutBuffer: Pointer to the computed digest. Its size must be 28 bytes.
|
|
* @param Timeout: Timeout value
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef HAL_HASHEx_SHA224_Finish(HASH_HandleTypeDef *hhash, uint8_t* pOutBuffer, uint32_t Timeout)
|
|
{
|
|
uint32_t tickstart = 0;
|
|
|
|
/* Process Locked */
|
|
__HAL_LOCK(hhash);
|
|
|
|
/* Change HASH peripheral state */
|
|
hhash->State = HAL_HASH_STATE_BUSY;
|
|
|
|
/* Get tick */
|
|
tickstart = HAL_GetTick();
|
|
|
|
while(HAL_IS_BIT_CLR(HASH->SR, HASH_FLAG_DCIS))
|
|
{
|
|
/* Check for the Timeout */
|
|
if(Timeout != HAL_MAX_DELAY)
|
|
{
|
|
if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout))
|
|
{
|
|
/* Change state */
|
|
hhash->State = HAL_HASH_STATE_TIMEOUT;
|
|
|
|
/* Process Unlocked */
|
|
__HAL_UNLOCK(hhash);
|
|
|
|
return HAL_TIMEOUT;
|
|
}
|
|
}
|
|
}
|
|
|
|
/* Read the message digest */
|
|
HASHEx_GetDigest(pOutBuffer, 28);
|
|
|
|
/* Change HASH peripheral state */
|
|
hhash->State = HAL_HASH_STATE_READY;
|
|
|
|
/* Process Unlocked */
|
|
__HAL_UNLOCK(hhash);
|
|
|
|
/* Return function status */
|
|
return HAL_OK;
|
|
}
|
|
|
|
/**
|
|
* @brief Initializes the HASH peripheral in SHA256 mode then enables DMA to
|
|
control data transfer. Use HAL_HASH_SHA256_Finish() to get the digest.
|
|
* @param hhash: pointer to a HASH_HandleTypeDef structure that contains
|
|
* the configuration information for HASH module
|
|
* @param pInBuffer: Pointer to the input buffer (buffer to be hashed).
|
|
* @param Size: Length of the input buffer in bytes.
|
|
* If the Size is not multiple of 64 bytes, the padding is managed by hardware.
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef HAL_HASHEx_SHA256_Start_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size)
|
|
{
|
|
uint32_t inputaddr = (uint32_t)pInBuffer;
|
|
|
|
/* Process Locked */
|
|
__HAL_LOCK(hhash);
|
|
|
|
/* Change the HASH state */
|
|
hhash->State = HAL_HASH_STATE_BUSY;
|
|
|
|
/* Check if initialization phase has already been performed */
|
|
if(hhash->Phase == HAL_HASH_PHASE_READY)
|
|
{
|
|
/* Select the SHA256 mode and reset the HASH processor core, so that the HASH will be ready to compute
|
|
the message digest of a new message */
|
|
HASH->CR |= HASH_AlgoSelection_SHA256 | HASH_CR_INIT;
|
|
}
|
|
|
|
/* Configure the number of valid bits in last word of the message */
|
|
__HAL_HASH_SET_NBVALIDBITS(Size);
|
|
|
|
/* Set the phase */
|
|
hhash->Phase = HAL_HASH_PHASE_PROCESS;
|
|
|
|
/* Set the HASH DMA transfer complete callback */
|
|
hhash->hdmain->XferCpltCallback = HASHEx_DMAXferCplt;
|
|
/* Set the DMA error callback */
|
|
hhash->hdmain->XferErrorCallback = HASHEx_DMAError;
|
|
|
|
/* Enable the DMA In DMA Stream */
|
|
HAL_DMA_Start_IT(hhash->hdmain, inputaddr, (uint32_t)&HASH->DIN, (Size%4 ? (Size+3)/4:Size/4));
|
|
|
|
/* Enable DMA requests */
|
|
HASH->CR |= (HASH_CR_DMAE);
|
|
|
|
/* Process UnLock */
|
|
__HAL_UNLOCK(hhash);
|
|
|
|
/* Return function status */
|
|
return HAL_OK;
|
|
}
|
|
|
|
/**
|
|
* @brief Returns the computed digest in SHA256.
|
|
* @param hhash: pointer to a HASH_HandleTypeDef structure that contains
|
|
* the configuration information for HASH module
|
|
* @param pOutBuffer: Pointer to the computed digest. Its size must be 32 bytes.
|
|
* @param Timeout: Timeout value
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef HAL_HASHEx_SHA256_Finish(HASH_HandleTypeDef *hhash, uint8_t* pOutBuffer, uint32_t Timeout)
|
|
{
|
|
uint32_t tickstart = 0;
|
|
|
|
/* Process Locked */
|
|
__HAL_LOCK(hhash);
|
|
|
|
/* Change HASH peripheral state */
|
|
hhash->State = HAL_HASH_STATE_BUSY;
|
|
|
|
/* Get tick */
|
|
tickstart = HAL_GetTick();
|
|
|
|
while(HAL_IS_BIT_CLR(HASH->SR, HASH_FLAG_DCIS))
|
|
{
|
|
/* Check for the Timeout */
|
|
if(Timeout != HAL_MAX_DELAY)
|
|
{
|
|
if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout))
|
|
{
|
|
/* Change state */
|
|
hhash->State = HAL_HASH_STATE_TIMEOUT;
|
|
|
|
/* Process Unlocked */
|
|
__HAL_UNLOCK(hhash);
|
|
|
|
return HAL_TIMEOUT;
|
|
}
|
|
}
|
|
}
|
|
|
|
/* Read the message digest */
|
|
HASHEx_GetDigest(pOutBuffer, 32);
|
|
|
|
/* Change HASH peripheral state */
|
|
hhash->State = HAL_HASH_STATE_READY;
|
|
|
|
/* Process Unlocked */
|
|
__HAL_UNLOCK(hhash);
|
|
|
|
/* Return function status */
|
|
return HAL_OK;
|
|
}
|
|
|
|
|
|
/**
|
|
* @}
|
|
*/
|
|
/** @defgroup HASHEx_Group5 HMAC processing functions using DMA mode
|
|
* @brief HMAC processing functions using DMA mode .
|
|
*
|
|
@verbatim
|
|
===============================================================================
|
|
##### HMAC processing using DMA functions #####
|
|
===============================================================================
|
|
[..] This section provides functions allowing to calculate in DMA mode
|
|
the HMAC value using one of the following algorithms:
|
|
(+) SHA224
|
|
(+) SHA256
|
|
|
|
@endverbatim
|
|
* @{
|
|
*/
|
|
|
|
/**
|
|
* @brief Initializes the HASH peripheral in HMAC SHA224 mode
|
|
* then enables DMA to control data transfer.
|
|
* @param hhash: pointer to a HASH_HandleTypeDef structure that contains
|
|
* the configuration information for HASH module
|
|
* @param pInBuffer: Pointer to the input buffer (buffer to be hashed).
|
|
* @param Size: Length of the input buffer in bytes.
|
|
* If the Size is not multiple of 64 bytes, the padding is managed by hardware.
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef HAL_HMACEx_SHA224_Start_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size)
|
|
{
|
|
uint32_t inputaddr;
|
|
|
|
/* Process Locked */
|
|
__HAL_LOCK(hhash);
|
|
|
|
/* Change the HASH state */
|
|
hhash->State = HAL_HASH_STATE_BUSY;
|
|
|
|
/* Save buffer pointer and size in handle */
|
|
hhash->pHashInBuffPtr = pInBuffer;
|
|
hhash->HashBuffSize = Size;
|
|
hhash->HashInCount = 0;
|
|
|
|
/* Check if initialization phase has already been performed */
|
|
if(hhash->Phase == HAL_HASH_PHASE_READY)
|
|
{
|
|
/* Check if key size is greater than 64 bytes */
|
|
if(hhash->Init.KeySize > 64)
|
|
{
|
|
/* Select the HMAC SHA224 mode */
|
|
HASH->CR |= (HASH_AlgoSelection_SHA224 | HASH_AlgoMode_HMAC | HASH_HMACKeyType_LongKey | HASH_CR_INIT);
|
|
}
|
|
else
|
|
{
|
|
/* Select the HMAC SHA224 mode */
|
|
HASH->CR |= (HASH_AlgoSelection_SHA224 | HASH_AlgoMode_HMAC | HASH_CR_INIT);
|
|
}
|
|
}
|
|
|
|
/* Set the phase */
|
|
hhash->Phase = HAL_HASH_PHASE_PROCESS;
|
|
|
|
/* Configure the number of valid bits in last word of the message */
|
|
__HAL_HASH_SET_NBVALIDBITS(hhash->Init.KeySize);
|
|
|
|
/* Get the key address */
|
|
inputaddr = (uint32_t)(hhash->Init.pKey);
|
|
|
|
/* Set the HASH DMA transfer complete callback */
|
|
hhash->hdmain->XferCpltCallback = HASHEx_DMAXferCplt;
|
|
/* Set the DMA error callback */
|
|
hhash->hdmain->XferErrorCallback = HASHEx_DMAError;
|
|
|
|
/* Enable the DMA In DMA Stream */
|
|
HAL_DMA_Start_IT(hhash->hdmain, inputaddr, (uint32_t)&HASH->DIN, (hhash->Init.KeySize%4 ? (hhash->Init.KeySize+3)/4:hhash->Init.KeySize/4));
|
|
/* Enable DMA requests */
|
|
HASH->CR |= (HASH_CR_DMAE);
|
|
|
|
/* Process Unlocked */
|
|
__HAL_UNLOCK(hhash);
|
|
|
|
/* Return function status */
|
|
return HAL_OK;
|
|
}
|
|
|
|
/**
|
|
* @brief Initializes the HASH peripheral in HMAC SHA256 mode
|
|
* then enables DMA to control data transfer.
|
|
* @param hhash: pointer to a HASH_HandleTypeDef structure that contains
|
|
* the configuration information for HASH module
|
|
* @param pInBuffer: Pointer to the input buffer (buffer to be hashed).
|
|
* @param Size: Length of the input buffer in bytes.
|
|
* If the Size is not multiple of 64 bytes, the padding is managed by hardware.
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef HAL_HMACEx_SHA256_Start_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size)
|
|
{
|
|
uint32_t inputaddr;
|
|
|
|
/* Process Locked */
|
|
__HAL_LOCK(hhash);
|
|
|
|
/* Change the HASH state */
|
|
hhash->State = HAL_HASH_STATE_BUSY;
|
|
|
|
/* Save buffer pointer and size in handle */
|
|
hhash->pHashInBuffPtr = pInBuffer;
|
|
hhash->HashBuffSize = Size;
|
|
hhash->HashInCount = 0;
|
|
|
|
/* Check if initialization phase has already been performed */
|
|
if(hhash->Phase == HAL_HASH_PHASE_READY)
|
|
{
|
|
/* Check if key size is greater than 64 bytes */
|
|
if(hhash->Init.KeySize > 64)
|
|
{
|
|
/* Select the HMAC SHA256 mode */
|
|
HASH->CR |= (HASH_AlgoSelection_SHA256 | HASH_AlgoMode_HMAC | HASH_HMACKeyType_LongKey);
|
|
}
|
|
else
|
|
{
|
|
/* Select the HMAC SHA256 mode */
|
|
HASH->CR |= (HASH_AlgoSelection_SHA256 | HASH_AlgoMode_HMAC);
|
|
}
|
|
/* Reset the HASH processor core, so that the HASH will be ready to compute
|
|
the message digest of a new message */
|
|
HASH->CR |= HASH_CR_INIT;
|
|
}
|
|
|
|
/* Set the phase */
|
|
hhash->Phase = HAL_HASH_PHASE_PROCESS;
|
|
|
|
/* Configure the number of valid bits in last word of the message */
|
|
__HAL_HASH_SET_NBVALIDBITS(hhash->Init.KeySize);
|
|
|
|
/* Get the key address */
|
|
inputaddr = (uint32_t)(hhash->Init.pKey);
|
|
|
|
/* Set the HASH DMA transfer complete callback */
|
|
hhash->hdmain->XferCpltCallback = HASHEx_DMAXferCplt;
|
|
/* Set the DMA error callback */
|
|
hhash->hdmain->XferErrorCallback = HASHEx_DMAError;
|
|
|
|
/* Enable the DMA In DMA Stream */
|
|
HAL_DMA_Start_IT(hhash->hdmain, inputaddr, (uint32_t)&HASH->DIN, (hhash->Init.KeySize%4 ? (hhash->Init.KeySize+3)/4:hhash->Init.KeySize/4));
|
|
/* Enable DMA requests */
|
|
HASH->CR |= (HASH_CR_DMAE);
|
|
|
|
/* Process Unlocked */
|
|
__HAL_UNLOCK(hhash);
|
|
|
|
/* Return function status */
|
|
return HAL_OK;
|
|
}
|
|
|
|
/**
|
|
* @}
|
|
*/
|
|
|
|
/**
|
|
* @brief Writes the input buffer in data register.
|
|
* @param pInBuffer: Pointer to input buffer
|
|
* @param Size: The size of input buffer
|
|
* @retval None
|
|
*/
|
|
static void HASHEx_WriteData(uint8_t *pInBuffer, uint32_t Size)
|
|
{
|
|
uint32_t buffercounter;
|
|
uint32_t inputaddr = (uint32_t) pInBuffer;
|
|
|
|
for(buffercounter = 0; buffercounter < Size; buffercounter+=4)
|
|
{
|
|
HASH->DIN = *(uint32_t*)inputaddr;
|
|
inputaddr+=4;
|
|
}
|
|
}
|
|
|
|
/**
|
|
* @brief Provides the message digest result.
|
|
* @param pMsgDigest: Pointer to the message digest
|
|
* @param Size: The size of the message digest in bytes
|
|
* @retval None
|
|
*/
|
|
static void HASHEx_GetDigest(uint8_t *pMsgDigest, uint8_t Size)
|
|
{
|
|
uint32_t msgdigest = (uint32_t)pMsgDigest;
|
|
|
|
switch(Size)
|
|
{
|
|
case 16:
|
|
/* Read the message digest */
|
|
*(uint32_t*)(msgdigest) = __REV(HASH->HR[0]);
|
|
msgdigest+=4;
|
|
*(uint32_t*)(msgdigest) = __REV(HASH->HR[1]);
|
|
msgdigest+=4;
|
|
*(uint32_t*)(msgdigest) = __REV(HASH->HR[2]);
|
|
msgdigest+=4;
|
|
*(uint32_t*)(msgdigest) = __REV(HASH->HR[3]);
|
|
break;
|
|
case 20:
|
|
/* Read the message digest */
|
|
*(uint32_t*)(msgdigest) = __REV(HASH->HR[0]);
|
|
msgdigest+=4;
|
|
*(uint32_t*)(msgdigest) = __REV(HASH->HR[1]);
|
|
msgdigest+=4;
|
|
*(uint32_t*)(msgdigest) = __REV(HASH->HR[2]);
|
|
msgdigest+=4;
|
|
*(uint32_t*)(msgdigest) = __REV(HASH->HR[3]);
|
|
msgdigest+=4;
|
|
*(uint32_t*)(msgdigest) = __REV(HASH->HR[4]);
|
|
break;
|
|
case 28:
|
|
/* Read the message digest */
|
|
*(uint32_t*)(msgdigest) = __REV(HASH->HR[0]);
|
|
msgdigest+=4;
|
|
*(uint32_t*)(msgdigest) = __REV(HASH->HR[1]);
|
|
msgdigest+=4;
|
|
*(uint32_t*)(msgdigest) = __REV(HASH->HR[2]);
|
|
msgdigest+=4;
|
|
*(uint32_t*)(msgdigest) = __REV(HASH->HR[3]);
|
|
msgdigest+=4;
|
|
*(uint32_t*)(msgdigest) = __REV(HASH->HR[4]);
|
|
msgdigest+=4;
|
|
*(uint32_t*)(msgdigest) = __REV(HASH_DIGEST->HR[5]);
|
|
msgdigest+=4;
|
|
*(uint32_t*)(msgdigest) = __REV(HASH_DIGEST->HR[6]);
|
|
break;
|
|
case 32:
|
|
/* Read the message digest */
|
|
*(uint32_t*)(msgdigest) = __REV(HASH->HR[0]);
|
|
msgdigest+=4;
|
|
*(uint32_t*)(msgdigest) = __REV(HASH->HR[1]);
|
|
msgdigest+=4;
|
|
*(uint32_t*)(msgdigest) = __REV(HASH->HR[2]);
|
|
msgdigest+=4;
|
|
*(uint32_t*)(msgdigest) = __REV(HASH->HR[3]);
|
|
msgdigest+=4;
|
|
*(uint32_t*)(msgdigest) = __REV(HASH->HR[4]);
|
|
msgdigest+=4;
|
|
*(uint32_t*)(msgdigest) = __REV(HASH_DIGEST->HR[5]);
|
|
msgdigest+=4;
|
|
*(uint32_t*)(msgdigest) = __REV(HASH_DIGEST->HR[6]);
|
|
msgdigest+=4;
|
|
*(uint32_t*)(msgdigest) = __REV(HASH_DIGEST->HR[7]);
|
|
break;
|
|
default:
|
|
break;
|
|
}
|
|
}
|
|
|
|
/**
|
|
* @brief DMA HASH Input Data complete callback.
|
|
* @param hdma: DMA handle
|
|
* @retval None
|
|
*/
|
|
static void HASHEx_DMAXferCplt(DMA_HandleTypeDef *hdma)
|
|
{
|
|
HASH_HandleTypeDef* hhash = ( HASH_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
|
|
uint32_t inputaddr = 0;
|
|
uint32_t buffersize = 0;
|
|
|
|
if((HASH->CR & HASH_CR_MODE) != HASH_CR_MODE)
|
|
{
|
|
/* Disable the DMA transfer */
|
|
HASH->CR &= (uint32_t)(~HASH_CR_DMAE);
|
|
|
|
/* Change HASH peripheral state */
|
|
hhash->State = HAL_HASH_STATE_READY;
|
|
|
|
/* Call Input data transfer complete callback */
|
|
HAL_HASH_InCpltCallback(hhash);
|
|
}
|
|
else
|
|
{
|
|
/* Increment Interrupt counter */
|
|
hhash->HashInCount++;
|
|
/* Disable the DMA transfer before starting the next transfer */
|
|
HASH->CR &= (uint32_t)(~HASH_CR_DMAE);
|
|
|
|
if(hhash->HashInCount <= 2)
|
|
{
|
|
/* In case HashInCount = 1, set the DMA to transfer data to HASH DIN register */
|
|
if(hhash->HashInCount == 1)
|
|
{
|
|
inputaddr = (uint32_t)hhash->pHashInBuffPtr;
|
|
buffersize = hhash->HashBuffSize;
|
|
}
|
|
/* In case HashInCount = 2, set the DMA to transfer key to HASH DIN register */
|
|
else if(hhash->HashInCount == 2)
|
|
{
|
|
inputaddr = (uint32_t)hhash->Init.pKey;
|
|
buffersize = hhash->Init.KeySize;
|
|
}
|
|
/* Configure the number of valid bits in last word of the message */
|
|
HASH->STR |= 8 * (buffersize % 4);
|
|
|
|
/* Set the HASH DMA transfer complete */
|
|
hhash->hdmain->XferCpltCallback = HASHEx_DMAXferCplt;
|
|
|
|
/* Enable the DMA In DMA Stream */
|
|
HAL_DMA_Start_IT(hhash->hdmain, inputaddr, (uint32_t)&HASH->DIN, (buffersize%4 ? (buffersize+3)/4:buffersize/4));
|
|
|
|
/* Enable DMA requests */
|
|
HASH->CR |= (HASH_CR_DMAE);
|
|
}
|
|
else
|
|
{
|
|
/* Disable the DMA transfer */
|
|
HASH->CR &= (uint32_t)(~HASH_CR_DMAE);
|
|
|
|
/* Reset the InCount */
|
|
hhash->HashInCount = 0;
|
|
|
|
/* Change HASH peripheral state */
|
|
hhash->State = HAL_HASH_STATE_READY;
|
|
|
|
/* Call Input data transfer complete callback */
|
|
HAL_HASH_InCpltCallback(hhash);
|
|
}
|
|
}
|
|
}
|
|
|
|
/**
|
|
* @brief DMA HASH communication error callback.
|
|
* @param hdma: DMA handle
|
|
* @retval None
|
|
*/
|
|
static void HASHEx_DMAError(DMA_HandleTypeDef *hdma)
|
|
{
|
|
HASH_HandleTypeDef* hhash = ( HASH_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
|
|
hhash->State= HAL_HASH_STATE_READY;
|
|
HAL_HASH_ErrorCallback(hhash);
|
|
}
|
|
|
|
|
|
/**
|
|
* @}
|
|
*/
|
|
#endif /* STM32F437xx || STM32F439xx */
|
|
|
|
#endif /* HAL_HASH_MODULE_ENABLED */
|
|
/**
|
|
* @}
|
|
*/
|
|
|
|
/**
|
|
* @}
|
|
*/
|
|
|
|
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|