1074c784b0
Hyperflash is used by the MIMXRT1050_EVKB, MIMXRT1060_EVK and MIMXRT1064_EVK boards. This commit includes: - add support for Hyperflash - modify MIMXRT1060_EVK and MIMXRT1064_EVK to change from QSPI to hyperflash. - minor incidental changes to other boards so they still build Note: Erasing a sector on the hyperflash is slow. It takes about a second, which seems too long, but matches the data sheet.
55 lines
2.1 KiB
C
55 lines
2.1 KiB
C
#define MICROPY_HW_BOARD_NAME "i.MX RT1064 EVK"
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#define MICROPY_HW_MCU_NAME "MIMXRT1064DVL6A"
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// MIMXRT1064_EVK has 1 user LED
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#define MICROPY_HW_LED1_PIN (pin_GPIO_AD_B0_09)
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#define MICROPY_HW_LED_ON(pin) (mp_hal_pin_low(pin))
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#define MICROPY_HW_LED_OFF(pin) (mp_hal_pin_high(pin))
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#define BOARD_FLASH_CONFIG_HEADER_H "evkmimxrt1064_flexspi_nor_config.h"
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#define BOARD_FLASH_OPS_HEADER_H "hal/flexspi_hyper_flash.h"
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#define MICROPY_HW_NUM_PIN_IRQS (4 * 32 + 3)
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// Define mapping logical UART # to hardware UART #
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// LPUART3 on D0/D1 -> 1
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// LPUART2 on D7/D6 -> 2
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// LPUART6 on D8/D9 -> 3
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// LPUART8 on A1/A0 -> 4
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#define MICROPY_HW_UART_NUM (sizeof(uart_index_table) / sizeof(uart_index_table)[0])
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#define MICROPY_HW_UART_INDEX { 0, 3, 2, 6, 8 }
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#define IOMUX_TABLE_UART \
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{ 0 }, { 0 }, \
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{ IOMUXC_GPIO_AD_B1_02_LPUART2_TX }, { IOMUXC_GPIO_AD_B1_03_LPUART2_RX }, \
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{ IOMUXC_GPIO_AD_B1_06_LPUART3_TX }, { IOMUXC_GPIO_AD_B1_07_LPUART3_RX }, \
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{ 0 }, { 0 }, \
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{ 0 }, { 0 }, \
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{ IOMUXC_GPIO_AD_B0_02_LPUART6_TX }, { IOMUXC_GPIO_AD_B0_03_LPUART6_RX }, \
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{ 0 }, { 0 }, \
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{ IOMUXC_GPIO_AD_B1_10_LPUART8_TX }, { IOMUXC_GPIO_AD_B1_11_LPUART8_RX },
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#define MICROPY_HW_SPI_INDEX { 1 }
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#define IOMUX_TABLE_SPI \
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{ IOMUXC_GPIO_SD_B0_00_LPSPI1_SCK }, { IOMUXC_GPIO_SD_B0_01_LPSPI1_PCS0 }, \
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{ IOMUXC_GPIO_SD_B0_02_LPSPI1_SDO }, { IOMUXC_GPIO_SD_B0_03_LPSPI1_SDI },
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#define DMA_REQ_SRC_RX { 0, kDmaRequestMuxLPSPI1Rx, kDmaRequestMuxLPSPI2Rx, \
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kDmaRequestMuxLPSPI3Rx, kDmaRequestMuxLPSPI4Rx }
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#define DMA_REQ_SRC_TX { 0, kDmaRequestMuxLPSPI1Tx, kDmaRequestMuxLPSPI2Tx, \
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kDmaRequestMuxLPSPI3Tx, kDmaRequestMuxLPSPI4Tx }
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// Define the mapping hardware I2C # to logical I2C #
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// SDA/SCL HW-I2C Logical I2C
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// D14/D15 LPI2C1 -> 0
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// D1/D0 LPI2C3 -> 1
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#define MICROPY_HW_I2C_INDEX { 1, 3 }
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#define IOMUX_TABLE_I2C \
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{ IOMUXC_GPIO_AD_B1_00_LPI2C1_SCL }, { IOMUXC_GPIO_AD_B1_01_LPI2C1_SDA }, \
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{ 0 }, { 0 }, \
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{ IOMUXC_GPIO_AD_B1_07_LPI2C3_SCL }, { IOMUXC_GPIO_AD_B1_06_LPI2C3_SDA },
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