circuitpython/ports/cxd56/common-hal/busio
Diego Elio Pettenò dd5d7c86d2 Fix up end of file and trailing whitespace.
This can be enforced by pre-commit, but correct it separately to make it easier to review.
2020-06-03 10:56:35 +01:00
..
__init__.c Change port name to cxd56 2019-10-11 08:23:51 +02:00
I2C.c Fix up end of file and trailing whitespace. 2020-06-03 10:56:35 +01:00
I2C.h Change port name to cxd56 2019-10-11 08:23:51 +02:00
OneWire.h Change port name to cxd56 2019-10-11 08:23:51 +02:00
SPI.c Fix up end of file and trailing whitespace. 2020-06-03 10:56:35 +01:00
SPI.h Change port name to cxd56 2019-10-11 08:23:51 +02:00
UART.c Enable showing the console on a debug uart 2020-05-19 02:02:52 +02:00
UART.h make UART.write be blocking on SAMD; add timeout property 2019-11-27 13:05:29 -05:00