6d983539bc
Internal flash used for the filesystem is now written (from the cache) only after a 5s delay, or when a file is closed, or when the drive is unmounted from the host. This delay means that multiple writes can accumulate in the cache, and leads to less writes to the flash, making it last longer. It's implemented by a high-priority interrupt that takes care of flash erase and write, and flushing the cache. This is still only an interim solution for the flash filesystem. It eventually needs to be replaced with something that uses less RAM for the cache, something that can use more of the flash, and something that does proper wear levelling.
375 lines
10 KiB
C
375 lines
10 KiB
C
/**
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******************************************************************************
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* @file Templates/Src/stm32f4xx_it.c
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* @author MCD Application Team
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* @version V1.0.1
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* @date 26-February-2014
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* @brief Main Interrupt Service Routines.
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* This file provides template for all exceptions handler and
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* peripherals interrupt service routine.
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******************************************************************************
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* @attention
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*
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* <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
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*
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* Redistribution and use in source and binary forms, with or without modification,
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* are permitted provided that the following conditions are met:
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* 1. Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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* 3. Neither the name of STMicroelectronics nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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******************************************************************************
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*/
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/* Includes ------------------------------------------------------------------*/
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#include <stdio.h>
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#include "stm32f4xx_it.h"
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#include "stm32f4xx_hal.h"
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#include "misc.h"
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#include "mpconfig.h"
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#include "qstr.h"
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#include "obj.h"
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#include "exti.h"
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#include "timer.h"
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#include "storage.h"
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/** @addtogroup STM32F4xx_HAL_Examples
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* @{
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*/
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/** @addtogroup Templates
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* @{
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*/
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/* Private typedef -----------------------------------------------------------*/
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/* Private define ------------------------------------------------------------*/
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/* Private macro -------------------------------------------------------------*/
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/* Private variables ---------------------------------------------------------*/
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extern void fatality();
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extern PCD_HandleTypeDef hpcd;
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/* Private function prototypes -----------------------------------------------*/
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/* Private functions ---------------------------------------------------------*/
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/******************************************************************************/
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/* Cortex-M4 Processor Exceptions Handlers */
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/******************************************************************************/
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/**
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* @brief This function handles NMI exception.
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* @param None
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* @retval None
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*/
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void NMI_Handler(void)
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{
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}
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/**
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* @brief This function handles Hard Fault exception.
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* @param None
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* @retval None
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*/
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void HardFault_Handler(void)
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{
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/* Go to infinite loop when Hard Fault exception occurs */
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while (1)
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{
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fatality();
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}
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}
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/**
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* @brief This function handles Memory Manage exception.
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* @param None
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* @retval None
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*/
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void MemManage_Handler(void)
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{
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/* Go to infinite loop when Memory Manage exception occurs */
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while (1)
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{
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fatality();
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}
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}
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/**
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* @brief This function handles Bus Fault exception.
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* @param None
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* @retval None
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*/
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void BusFault_Handler(void)
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{
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/* Go to infinite loop when Bus Fault exception occurs */
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while (1)
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{
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fatality();
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}
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}
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/**
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* @brief This function handles Usage Fault exception.
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* @param None
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* @retval None
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*/
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void UsageFault_Handler(void)
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{
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/* Go to infinite loop when Usage Fault exception occurs */
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while (1)
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{
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fatality();
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}
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}
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/**
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* @brief This function handles SVCall exception.
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* @param None
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* @retval None
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*/
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void SVC_Handler(void)
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{
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}
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/**
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* @brief This function handles Debug Monitor exception.
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* @param None
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* @retval None
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*/
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void DebugMon_Handler(void)
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{
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}
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/**
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* @brief This function handles PendSVC exception.
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* @param None
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* @retval None
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*/
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void PendSV_Handler(void)
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{
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extern void pendsv_isr_handler(void);
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pendsv_isr_handler();
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}
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/**
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* @brief This function handles SysTick Handler.
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* @param None
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* @retval None
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*/
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void SysTick_Handler(void)
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{
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HAL_IncTick();
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}
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/******************************************************************************/
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/* STM32F4xx Peripherals Interrupt Handlers */
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/* Add here the Interrupt Handler for the used peripheral(s) (PPP), for the */
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/* available peripheral interrupt handler's name please refer to the startup */
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/* file (startup_stm32f4xx.s). */
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/******************************************************************************/
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/**
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* @brief This function handles USB-On-The-Go FS global interrupt request.
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* @param None
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* @retval None
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*/
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#if defined(USE_USB_FS)
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#define OTG_XX_IRQHandler OTG_FS_IRQHandler
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#define OTG_XX_WKUP_IRQHandler OTG_FS_WKUP_IRQHandler
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#elif defined(USE_USB_HS)
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#define OTG_XX_IRQHandler OTG_HS_IRQHandler
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#define OTG_XX_WKUP_IRQHandler OTG_HS_WKUP_IRQHandler
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#endif
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#if defined(OTG_XX_IRQHandler)
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void OTG_XX_IRQHandler(void)
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{
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HAL_PCD_IRQHandler(&hpcd);
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}
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#endif
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/**
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* @brief This function handles USB OTG FS or HS Wakeup IRQ Handler.
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* @param None
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* @retval None
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*/
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#if defined(OTG_XX_WKUP_IRQHandler)
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void OTG_XX_WKUP_IRQHandler(void)
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{
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if((&hpcd)->Init.low_power_enable)
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{
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/* Reset SLEEPDEEP bit of Cortex System Control Register */
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SCB->SCR &= (uint32_t)~((uint32_t)(SCB_SCR_SLEEPDEEP_Msk | SCB_SCR_SLEEPONEXIT_Msk));
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/* Configures system clock after wake-up from STOP: enable HSE, PLL and select
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PLL as system clock source (HSE and PLL are disabled in STOP mode) */
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__HAL_RCC_HSE_CONFIG(RCC_HSE_ON);
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/* Wait till HSE is ready */
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while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
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{}
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/* Enable the main PLL. */
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__HAL_RCC_PLL_ENABLE();
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/* Wait till PLL is ready */
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while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
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{}
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/* Select PLL as SYSCLK */
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MODIFY_REG(RCC->CFGR, RCC_CFGR_SW, RCC_SYSCLKSOURCE_PLLCLK);
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while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_CFGR_SWS_PLL)
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{}
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/* ungate PHY clock */
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__HAL_PCD_UNGATE_PHYCLOCK((&hpcd));
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}
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#ifdef USE_USB_FS
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/* Clear EXTI pending Bit*/
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__HAL_USB_FS_EXTI_CLEAR_FLAG();
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#elif defined(USE_USB_HS)
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/* Clear EXTI pending Bit*/
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__HAL_USB_HS_EXTI_CLEAR_FLAG();
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#endif
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}
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#endif
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/**
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* @brief This function handles PPP interrupt request.
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* @param None
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* @retval None
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*/
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/*void PPP_IRQHandler(void)
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{
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}*/
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// Handle a flash (erase/program) interrupt.
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void FLASH_IRQHandler(void) {
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// This calls the real flash IRQ handler, if needed
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/*
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uint32_t flash_cr = FLASH->CR;
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if ((flash_cr & FLASH_IT_EOP) || (flash_cr & FLASH_IT_ERR)) {
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HAL_FLASH_IRQHandler();
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}
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*/
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// This call the storage IRQ handler, to check if the flash cache needs flushing
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storage_irq_handler();
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}
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/**
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* @brief These functions handle the EXTI interrupt requests.
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* @param None
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* @retval None
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*/
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void EXTI0_IRQHandler(void) {
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Handle_EXTI_Irq(0);
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}
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void EXTI1_IRQHandler(void) {
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Handle_EXTI_Irq(1);
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}
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void EXTI2_IRQHandler(void) {
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Handle_EXTI_Irq(2);
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}
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void EXTI3_IRQHandler(void) {
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Handle_EXTI_Irq(3);
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}
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void EXTI4_IRQHandler(void) {
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Handle_EXTI_Irq(4);
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}
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void EXTI9_5_IRQHandler(void) {
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Handle_EXTI_Irq(5);
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Handle_EXTI_Irq(6);
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Handle_EXTI_Irq(7);
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Handle_EXTI_Irq(8);
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Handle_EXTI_Irq(9);
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}
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void EXTI15_10_IRQHandler(void) {
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Handle_EXTI_Irq(10);
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Handle_EXTI_Irq(11);
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Handle_EXTI_Irq(12);
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Handle_EXTI_Irq(13);
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Handle_EXTI_Irq(14);
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Handle_EXTI_Irq(15);
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#if 0
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// for CC3000 support, needs to be re-written to use new EXTI code
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if (EXTI_GetITStatus(EXTI_Line14) != RESET) {
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led_toggle(PYB_LED_G2);
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/* these are needed for CC3000 support
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extern void SpiIntGPIOHandler(void);
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extern uint32_t exti14_enabled;
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extern uint32_t exti14_missed;
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//printf("-> EXTI14 en=%lu miss=%lu\n", exti14_enabled, exti14_missed);
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if (exti14_enabled) {
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exti14_missed = 0;
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SpiIntGPIOHandler(); // CC3000 interrupt
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} else {
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exti14_missed = 1;
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}
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*/
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EXTI_ClearITPendingBit(EXTI_Line14);
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//printf("<- EXTI14 done\n");
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}
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#endif
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}
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void PVD_IRQHandler(void) {
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Handle_EXTI_Irq(EXTI_PVD_OUTPUT);
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}
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void RTC_Alarm_IRQHandler(void) {
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Handle_EXTI_Irq(EXTI_RTC_ALARM);
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}
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#if defined(ETH) // The 407 has ETH, the 405 doesn't
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void ETH_WKUP_IRQHandler(void) {
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Handle_EXTI_Irq(EXTI_ETH_WAKEUP);
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}
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#endif
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void TAMP_STAMP_IRQHandler(void) {
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Handle_EXTI_Irq(EXTI_RTC_TIMESTAMP);
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}
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void RTC_WKUP_IRQHandler(void) {
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Handle_EXTI_Irq(EXTI_RTC_WAKEUP);
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}
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void TIM3_IRQHandler(void) {
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HAL_TIM_IRQHandler(&TIM3_Handle);
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}
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void TIM5_IRQHandler(void) {
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HAL_TIM_IRQHandler(&TIM5_Handle);
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}
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/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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