0d7366c912
- Moves definition of BOARD_FLASH_SIZE and other header files related to flash configuration into the Makefile. - Adds board specific clock_config.h. - Adds board.h, pin_mux.h, and peripherals.h as they are required by NXP MCU SDK in order to use our own clock_config.h. - Renames board specific FlexSPI configuration files. - Updates flash frequency of MIMXRT1020_EVK - Creates separated flash_config files for QSPI NOR and QSPI Hyper flash. - Unifies VFS start address to be @ 1M for 1010 and 1020 boards. - Unifies 1050EVK boards - Adds support to both NOR and HyperFlash on boards with both capabilities. - Adds automatic FlexRAM initialization to start-up code based on linker script and NXP HAL. - Applies code formatting to all files in mimxrt port. With this change the flash configuration is restructured and organized. This simplifies the configuration process and provides a better overview of each board's settings. With the integration of clock_config.h, board.h, pin_mux.h, and peripherals.h we gain better control of the settings and clock configurations. Furthermore the implementation of an explicit FlexRAM setup improves the system performance and allows for performance tuning. Signed-off-by: Philipp Ebensberger
66 lines
2.3 KiB
C
66 lines
2.3 KiB
C
#define MICROPY_HW_BOARD_NAME "i.MX RT1050 EVK"
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#define MICROPY_HW_MCU_NAME "MIMXRT1052DVL6B"
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// MIMXRT1050_EVKB has 1 user LED
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#define MICROPY_HW_LED1_PIN (pin_GPIO_AD_B0_09)
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#define MICROPY_HW_LED_ON(pin) (mp_hal_pin_low(pin))
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#define MICROPY_HW_LED_OFF(pin) (mp_hal_pin_high(pin))
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#define MICROPY_HW_NUM_PIN_IRQS (4 * 32 + 3)
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// Define mapping logical UART # to hardware UART #
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// LPUART3 on D0/D1 -> 1
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// LPUART2 on D7/D6 -> 2
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// LPUART6 on D8/D9 -> 3
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// LPUART8 on A1/A0 -> 4
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#define MICROPY_HW_UART_NUM (sizeof(uart_index_table) / sizeof(uart_index_table)[0])
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#define MICROPY_HW_UART_INDEX { 0, 3, 2, 6, 8 }
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#define IOMUX_TABLE_UART \
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{ 0 }, { 0 }, \
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{ IOMUXC_GPIO_AD_B1_02_LPUART2_TX }, { IOMUXC_GPIO_AD_B1_03_LPUART2_RX }, \
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{ IOMUXC_GPIO_AD_B1_06_LPUART3_TX }, { IOMUXC_GPIO_AD_B1_07_LPUART3_RX }, \
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{ 0 }, { 0 }, \
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{ 0 }, { 0 }, \
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{ IOMUXC_GPIO_AD_B0_02_LPUART6_TX }, { IOMUXC_GPIO_AD_B0_03_LPUART6_RX }, \
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{ 0 }, { 0 }, \
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{ IOMUXC_GPIO_AD_B1_10_LPUART8_TX }, { IOMUXC_GPIO_AD_B1_11_LPUART8_RX },
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#define MICROPY_HW_SPI_INDEX { 1 }
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#define IOMUX_TABLE_SPI \
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{ IOMUXC_GPIO_SD_B0_00_LPSPI1_SCK }, { IOMUXC_GPIO_SD_B0_01_LPSPI1_PCS0 }, \
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{ IOMUXC_GPIO_SD_B0_02_LPSPI1_SDO }, { IOMUXC_GPIO_SD_B0_03_LPSPI1_SDI },
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#define DMA_REQ_SRC_RX { 0, kDmaRequestMuxLPSPI1Rx, kDmaRequestMuxLPSPI2Rx, \
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kDmaRequestMuxLPSPI3Rx, kDmaRequestMuxLPSPI4Rx }
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#define DMA_REQ_SRC_TX { 0, kDmaRequestMuxLPSPI1Tx, kDmaRequestMuxLPSPI2Tx, \
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kDmaRequestMuxLPSPI3Tx, kDmaRequestMuxLPSPI4Tx }
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// Define the mapping hardware I2C # to logical I2C #
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// SDA/SCL HW-I2C Logical I2C
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// D14/D15 LPI2C1 -> 0
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// D1/D0 LPI2C3 -> 1
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#define MICROPY_HW_I2C_INDEX { 1, 3 }
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#define IOMUX_TABLE_I2C \
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{ IOMUXC_GPIO_AD_B1_00_LPI2C1_SCL }, { IOMUXC_GPIO_AD_B1_01_LPI2C1_SDA }, \
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{ 0 }, { 0 }, \
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{ IOMUXC_GPIO_AD_B1_07_LPI2C3_SCL }, { IOMUXC_GPIO_AD_B1_06_LPI2C3_SDA },
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#define USDHC_DUMMY_PIN NULL, 0
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#define MICROPY_USDHC1 \
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{ \
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.cmd = {GPIO_SD_B0_00_USDHC1_CMD}, \
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.clk = { GPIO_SD_B0_01_USDHC1_CLK }, \
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.cd_b = { GPIO_B1_12_USDHC1_CD_B }, \
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.data0 = { GPIO_SD_B0_02_USDHC1_DATA0 }, \
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.data1 = { GPIO_SD_B0_03_USDHC1_DATA1 }, \
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.data2 = { GPIO_SD_B0_04_USDHC1_DATA2 }, \
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.data3 = { GPIO_SD_B0_05_USDHC1_DATA3 }, \
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}
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