552 lines
20 KiB
C
552 lines
20 KiB
C
/*
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* This file is part of the MicroPython project, http://micropython.org/
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*
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* The MIT License (MIT)
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*
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* Copyright (c) 2017 Scott Shawcroft for Adafruit Industries
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* SPDX-FileCopyrightText: Copyright (c) 2016 Damien P. George
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* Copyright (c) 2019 Artur Pacholec
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#include <stdint.h>
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#include "py/runtime.h"
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#include "common-hal/pulseio/PWMOut.h"
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#include "shared-bindings/pulseio/PWMOut.h"
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#include "shared-bindings/microcontroller/Processor.h"
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#include "fsl_pwm.h"
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#include "supervisor/shared/translate.h"
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#include "periph.h"
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#include <stdio.h>
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// TODO
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//#include "samd/pins.h"
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//#undef ENABLE
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//
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//# define _TCC_SIZE(unused, n) TCC ## n ## _SIZE,
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//# define TCC_SIZES { REPEAT_MACRO(_TCC_SIZE, 0, TCC_INST_NUM) }
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//
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//static uint32_t tcc_periods[TCC_INST_NUM];
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//static uint32_t tc_periods[TC_INST_NUM];
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//
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//uint32_t target_tcc_frequencies[TCC_INST_NUM];
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//uint8_t tcc_refcount[TCC_INST_NUM];
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//
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//// This bitmask keeps track of which channels of a TCC are currently claimed.
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//#ifdef SAMD21
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//uint8_t tcc_channels[3]; // Set by pwmout_reset() to {0xf0, 0xfc, 0xfc} initially.
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//#endif
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//#ifdef SAMD51
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//uint8_t tcc_channels[5]; // Set by pwmout_reset() to {0xc0, 0xf0, 0xf8, 0xfc, 0xfc} initially.
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//#endif
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//
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//static uint8_t never_reset_tc_or_tcc[TC_INST_NUM + TCC_INST_NUM];
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void common_hal_pulseio_pwmout_never_reset(pulseio_pwmout_obj_t *self) {
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// if (self->timer->is_tc) {
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// never_reset_tc_or_tcc[self->timer->index] += 1;
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// } else {
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// never_reset_tc_or_tcc[TC_INST_NUM + self->timer->index] += 1;
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// }
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//
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// never_reset_pin_number(self->pin->number);
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}
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void common_hal_pulseio_pwmout_reset_ok(pulseio_pwmout_obj_t *self) {
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// if (self->timer->is_tc) {
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// never_reset_tc_or_tcc[self->timer->index] -= 1;
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// } else {
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// never_reset_tc_or_tcc[TC_INST_NUM + self->timer->index] -= 1;
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// }
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}
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void pwmout_reset(void) {
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// // Reset all timers
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// for (int i = 0; i < TCC_INST_NUM; i++) {
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// target_tcc_frequencies[i] = 0;
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// tcc_refcount[i] = 0;
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// }
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// Tcc *tccs[TCC_INST_NUM] = TCC_INSTS;
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// for (int i = 0; i < TCC_INST_NUM; i++) {
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// if (never_reset_tc_or_tcc[TC_INST_NUM + i] > 0) {
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// continue;
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// }
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// // Disable the module before resetting it.
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// if (tccs[i]->CTRLA.bit.ENABLE == 1) {
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// tccs[i]->CTRLA.bit.ENABLE = 0;
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// while (tccs[i]->SYNCBUSY.bit.ENABLE == 1) {
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// }
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// }
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// uint8_t mask = 0xff;
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// for (uint8_t j = 0; j < tcc_cc_num[i]; j++) {
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// mask <<= 1;
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// }
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// tcc_channels[i] = mask;
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// tccs[i]->CTRLA.bit.SWRST = 1;
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// while (tccs[i]->CTRLA.bit.SWRST == 1) {
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// }
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// }
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// Tc *tcs[TC_INST_NUM] = TC_INSTS;
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// for (int i = 0; i < TC_INST_NUM; i++) {
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// if (never_reset_tc_or_tcc[i] > 0) {
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// continue;
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// }
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// tcs[i]->COUNT16.CTRLA.bit.SWRST = 1;
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// while (tcs[i]->COUNT16.CTRLA.bit.SWRST == 1) {
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// }
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// }
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}
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//static uint8_t tcc_channel(const pin_timer_t* t) {
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// // For the SAMD51 this hardcodes the use of OTMX == 0x0, the output matrix mapping, which uses
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// // SAMD21-style modulo mapping.
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// return t->wave_output % tcc_cc_num[t->index];
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//}
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//bool channel_ok(const pin_timer_t* t) {
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// uint8_t channel_bit = 1 << tcc_channel(t);
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// return (!t->is_tc && ((tcc_channels[t->index] & channel_bit) == 0)) ||
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// t->is_tc;
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//}
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#define PWM_SRC_CLK_FREQ CLOCK_GetFreq(kCLOCK_IpgClk)
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pwmout_result_t common_hal_pulseio_pwmout_construct(pulseio_pwmout_obj_t *self,
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const mcu_pin_obj_t *pin,
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uint16_t duty,
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uint32_t frequency,
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bool variable_frequency) {
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self->pin = pin;
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self->variable_frequency = variable_frequency;
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const uint32_t pwm_count = sizeof(mcu_pwm_list) / sizeof(mcu_pwm_obj_t);
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for (uint32_t i = 0; i < pwm_count; ++i) {
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if (mcu_pwm_list[i].pin != pin)
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continue;
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printf("pwm: 0x%p, sum %d, chan %d, mux %d\r\n", mcu_pwm_list[i].pwm, mcu_pwm_list[i].submodule, mcu_pwm_list[i].channel, mcu_pwm_list[i].mux_mode);
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self->pwm = &mcu_pwm_list[i];
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break;
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}
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if (self->pwm == NULL) {
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return PWMOUT_INVALID_PIN;
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}
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CLOCK_SetDiv(kCLOCK_AhbDiv, 0x2); /* Set AHB PODF to 2, divide by 3 */
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CLOCK_SetDiv(kCLOCK_IpgDiv, 0x3); /* Set IPG PODF to 3, divede by 4 */
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//TODO re-enable
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// IOMUXC_SetPinMux(
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// IOMUXC_GPIO_SD_02_FLEXPWM1_PWM0_A, /* GPIO_02 is configured as FLEXPWM1_PWM0_A */
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// 0U); /* Software Input On Field: Input Path is determined by functionality */
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//
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// IOMUXC_SetPinConfig(
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// IOMUXC_GPIO_SD_02_FLEXPWM1_PWM0_A, /* GPIO_02 PAD functional properties : */
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// 0x10A0U); /* Slew Rate Field: Slow Slew Rate
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// Drive Strength Field: R0/4
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// Speed Field: fast(150MHz)
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// Open Drain Enable Field: Open Drain Disabled
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// Pull / Keep Enable Field: Pull/Keeper Enabled
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// Pull / Keep Select Field: Keeper
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// Pull Up / Down Config. Field: 100K Ohm Pull Down
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// Hyst. Enable Field: Hysteresis Disabled */
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pwm_config_t pwmConfig;
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/*
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* pwmConfig.enableDebugMode = false;
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* pwmConfig.enableWait = false;
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* pwmConfig.reloadSelect = kPWM_LocalReload;
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* pwmConfig.faultFilterCount = 0;
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* pwmConfig.faultFilterPeriod = 0;
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* pwmConfig.clockSource = kPWM_BusClock;
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* pwmConfig.prescale = kPWM_Prescale_Divide_1;
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* pwmConfig.initializationControl = kPWM_Initialize_LocalSync;
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* pwmConfig.forceTrigger = kPWM_Force_Local;
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* pwmConfig.reloadFrequency = kPWM_LoadEveryOportunity;
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* pwmConfig.reloadLogic = kPWM_ReloadImmediate;
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* pwmConfig.pairOperation = kPWM_Independent;
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*/
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PWM_GetDefaultConfig(&pwmConfig);
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//pwmConfig.reloadLogic = kPWM_ReloadPwmFullCycle;
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pwmConfig.enableDebugMode = true;
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if (PWM_Init(PWM1, self->pwm->submodule, &pwmConfig) == kStatus_Fail) {
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printf("PWM initialization failed\r\n");
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return PWMOUT_INVALID_PIN;
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}
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pwm_signal_param_t pwmSignal;
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/* Set deadtime count, we set this to about 650ns */
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uint16_t deadTimeVal = ((uint64_t)PWM_SRC_CLK_FREQ * 650) / 1000000000;
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pwmSignal.pwmChannel = self->pwm->channel;
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pwmSignal.level = kPWM_HighTrue;
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pwmSignal.dutyCyclePercent = frequency / 2; /* 1 percent dutycycle */
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pwmSignal.deadtimeValue = deadTimeVal;
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PWM_SetupPwm(PWM1, self->pwm->submodule, &pwmSignal, 1, kPWM_SignedCenterAligned, frequency, PWM_SRC_CLK_FREQ);
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PWM_SetPwmLdok(PWM1, kPWM_Control_Module_0 | kPWM_Control_Module_1 | kPWM_Control_Module_2, true);
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PWM_StartTimer(PWM1, kPWM_Control_Module_0 | kPWM_Control_Module_1 | kPWM_Control_Module_2);
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// if (frequency == 0 || frequency > 6000000) {
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// return PWMOUT_INVALID_FREQUENCY;
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// }
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// // Figure out which timer we are using.
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// // First see if a tcc is already going with the frequency we want and our
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// // channel is unused. tc's don't have enough channels to share.
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// const pin_timer_t* timer = NULL;
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// uint8_t mux_position = 0;
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// if (!variable_frequency) {
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// for (uint8_t i = 0; i < TCC_INST_NUM && timer == NULL; i++) {
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// if (target_tcc_frequencies[i] != frequency) {
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// continue;
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// }
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// for (uint8_t j = 0; j < NUM_TIMERS_PER_PIN && timer == NULL; j++) {
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// const pin_timer_t* t = &pin->timer[j];
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// if (t->index != i || t->is_tc || t->index >= TCC_INST_NUM) {
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// continue;
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// }
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// Tcc* tcc = tcc_insts[t->index];
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// if (tcc->CTRLA.bit.ENABLE == 1 && channel_ok(t)) {
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// timer = t;
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// mux_position = j;
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// // Claim channel.
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// tcc_channels[timer->index] |= (1 << tcc_channel(timer));
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//
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// }
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// }
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// }
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// }
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//
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// // No existing timer has been found, so find a new one to use and set it up.
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// if (timer == NULL) {
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// // By default, with fixed frequency we want to share a TCC because its likely we'll have
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// // other outputs at the same frequency. If the frequency is variable then we'll only have
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// // one output so we start with the TCs to see if they work.
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// int8_t direction = -1;
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// uint8_t start = NUM_TIMERS_PER_PIN - 1;
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// bool found = false;
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// if (variable_frequency) {
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// direction = 1;
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// start = 0;
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// }
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// for (int8_t i = start; i >= 0 && i < NUM_TIMERS_PER_PIN && timer == NULL; i += direction) {
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// const pin_timer_t* t = &pin->timer[i];
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// if ((!t->is_tc && t->index >= TCC_INST_NUM) ||
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// (t->is_tc && t->index >= TC_INST_NUM)) {
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// continue;
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// }
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// if (t->is_tc) {
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// found = true;
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// Tc* tc = tc_insts[t->index];
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// if (tc->COUNT16.CTRLA.bit.ENABLE == 0 && t->wave_output == 1) {
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// timer = t;
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// mux_position = i;
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// }
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// } else {
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// Tcc* tcc = tcc_insts[t->index];
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// if (tcc->CTRLA.bit.ENABLE == 0 && channel_ok(t)) {
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// timer = t;
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// mux_position = i;
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// }
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// }
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// }
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//
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// if (timer == NULL) {
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// if (found) {
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// return PWMOUT_ALL_TIMERS_ON_PIN_IN_USE;
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// }
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// return PWMOUT_ALL_TIMERS_IN_USE;
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// }
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//
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// uint8_t resolution = 0;
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// if (timer->is_tc) {
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// resolution = 16;
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// } else {
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// // TCC resolution varies so look it up.
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// const uint8_t _tcc_sizes[TCC_INST_NUM] = TCC_SIZES;
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// resolution = _tcc_sizes[timer->index];
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// }
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// // First determine the divisor that gets us the highest resolution.
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// uint32_t system_clock = common_hal_mcu_processor_get_frequency();
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// uint32_t top;
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// uint8_t divisor;
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// for (divisor = 0; divisor < 8; divisor++) {
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// top = (system_clock / prescaler[divisor] / frequency) - 1;
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// if (top < (1u << resolution)) {
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// break;
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// }
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// }
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//
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// set_timer_handler(timer->is_tc, timer->index, TC_HANDLER_NO_INTERRUPT);
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// // We use the zeroeth clock on either port to go full speed.
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// turn_on_clocks(timer->is_tc, timer->index, 0);
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//
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// if (timer->is_tc) {
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// tc_periods[timer->index] = top;
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// Tc* tc = tc_insts[timer->index];
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// #ifdef SAMD21
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// tc->COUNT16.CTRLA.reg = TC_CTRLA_MODE_COUNT16 |
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// TC_CTRLA_PRESCALER(divisor) |
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// TC_CTRLA_WAVEGEN_MPWM;
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// tc->COUNT16.CC[0].reg = top;
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// #endif
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// #ifdef SAMD51
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//
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// tc->COUNT16.CTRLA.bit.SWRST = 1;
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// while (tc->COUNT16.CTRLA.bit.SWRST == 1) {
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// }
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// tc_set_enable(tc, false);
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// tc->COUNT16.CTRLA.reg = TC_CTRLA_MODE_COUNT16 | TC_CTRLA_PRESCALER(divisor);
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// tc->COUNT16.WAVE.reg = TC_WAVE_WAVEGEN_MPWM;
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// tc->COUNT16.CCBUF[0].reg = top;
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// tc->COUNT16.CCBUF[1].reg = 0;
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// #endif
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//
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// tc_set_enable(tc, true);
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// } else {
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// tcc_periods[timer->index] = top;
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// Tcc* tcc = tcc_insts[timer->index];
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// tcc_set_enable(tcc, false);
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// tcc->CTRLA.bit.PRESCALER = divisor;
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// tcc->PER.bit.PER = top;
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// tcc->WAVE.bit.WAVEGEN = TCC_WAVE_WAVEGEN_NPWM_Val;
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// tcc_set_enable(tcc, true);
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// target_tcc_frequencies[timer->index] = frequency;
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// tcc_refcount[timer->index]++;
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// if (variable_frequency) {
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// // We're changing frequency so claim all of the channels.
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// tcc_channels[timer->index] = 0xff;
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// } else {
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// tcc_channels[timer->index] |= (1 << tcc_channel(timer));
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// }
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// }
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// }
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//
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// self->timer = timer;
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//
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// gpio_set_pin_function(pin->number, GPIO_PIN_FUNCTION_E + mux_position);
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common_hal_pulseio_pwmout_set_duty_cycle(self, duty);
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return PWMOUT_OK;
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}
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bool common_hal_pulseio_pwmout_deinited(pulseio_pwmout_obj_t* self) {
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return self->pin == NULL;
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}
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void common_hal_pulseio_pwmout_deinit(pulseio_pwmout_obj_t* self) {
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if (common_hal_pulseio_pwmout_deinited(self)) {
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return;
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}
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// const pin_timer_t* t = self->timer;
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// if (t->is_tc) {
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// Tc* tc = tc_insts[t->index];
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// tc_set_enable(tc, false);
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// tc->COUNT16.CTRLA.bit.SWRST = true;
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// tc_wait_for_sync(tc);
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// } else {
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// tcc_refcount[t->index]--;
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// tcc_channels[t->index] &= ~(1 << tcc_channel(t));
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// if (tcc_refcount[t->index] == 0) {
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// target_tcc_frequencies[t->index] = 0;
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// Tcc* tcc = tcc_insts[t->index];
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// tcc_set_enable(tcc, false);
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// tcc->CTRLA.bit.SWRST = true;
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// while (tcc->SYNCBUSY.bit.SWRST != 0) {
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// /* Wait for sync */
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// }
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// }
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// }
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// reset_pin_number(self->pin->number);
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self->pin = NULL;
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}
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void common_hal_pulseio_pwmout_set_duty_cycle(pulseio_pwmout_obj_t *self, uint16_t duty) {
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PWM_UpdatePwmDutycycle(PWM1, self->pwm->submodule, self->pwm->channel, kPWM_SignedCenterAligned, duty);
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// const pin_timer_t* t = self->timer;
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// if (t->is_tc) {
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// uint16_t adjusted_duty = tc_periods[t->index] * duty / 0xffff;
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// #ifdef SAMD21
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// tc_insts[t->index]->COUNT16.CC[t->wave_output].reg = adjusted_duty;
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// #endif
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// #ifdef SAMD51
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// Tc* tc = tc_insts[t->index];
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// while (tc->COUNT16.SYNCBUSY.bit.CC1 != 0) {}
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// tc->COUNT16.CCBUF[1].reg = adjusted_duty;
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// #endif
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// } else {
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// uint32_t adjusted_duty = ((uint64_t) tcc_periods[t->index]) * duty / 0xffff;
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// uint8_t channel = tcc_channel(t);
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// Tcc* tcc = tcc_insts[t->index];
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//
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// // Write into the CC buffer register, which will be transferred to the
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// // CC register on an UPDATE (when period is finished).
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// // Do clock domain syncing as necessary.
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//
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// while (tcc->SYNCBUSY.reg != 0) {}
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//
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// // Lock out double-buffering while updating the CCB value.
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// tcc->CTRLBSET.bit.LUPD = 1;
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// #ifdef SAMD21
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// tcc->CCB[channel].reg = adjusted_duty;
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// #endif
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// #ifdef SAMD51
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// tcc->CCBUF[channel].reg = adjusted_duty;
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// #endif
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// tcc->CTRLBCLR.bit.LUPD = 1;
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// }
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}
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|
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uint16_t common_hal_pulseio_pwmout_get_duty_cycle(pulseio_pwmout_obj_t* self) {
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return 0;
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// const pin_timer_t* t = self->timer;
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// if (t->is_tc) {
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// Tc* tc = tc_insts[t->index];
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// tc_wait_for_sync(tc);
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// uint16_t cv = tc->COUNT16.CC[t->wave_output].reg;
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// return cv * 0xffff / tc_periods[t->index];
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// } else {
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// Tcc* tcc = tcc_insts[t->index];
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// uint8_t channel = tcc_channel(t);
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// uint32_t cv = 0;
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//
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// while (tcc->SYNCBUSY.bit.CTRLB) {}
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|
//
|
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// #ifdef SAMD21
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// // If CCBV (CCB valid) is set, the CCB value hasn't yet been copied
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|
// // to the CC value.
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// if ((tcc->STATUS.vec.CCBV & (1 << channel)) != 0) {
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// cv = tcc->CCB[channel].reg;
|
|
// } else {
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|
// cv = tcc->CC[channel].reg;
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|
// }
|
|
// #endif
|
|
// #ifdef SAMD51
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// if ((tcc->STATUS.vec.CCBUFV & (1 << channel)) != 0) {
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|
// cv = tcc->CCBUF[channel].reg;
|
|
// } else {
|
|
// cv = tcc->CC[channel].reg;
|
|
// }
|
|
// #endif
|
|
//
|
|
// uint32_t duty_cycle = ((uint64_t) cv) * 0xffff / tcc_periods[t->index];
|
|
//
|
|
// return duty_cycle;
|
|
// }
|
|
}
|
|
|
|
void common_hal_pulseio_pwmout_set_frequency(pulseio_pwmout_obj_t* self,
|
|
uint32_t frequency) {
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|
// if (frequency == 0 || frequency > 6000000) {
|
|
// mp_raise_ValueError(translate("Invalid PWM frequency"));
|
|
// }
|
|
// const pin_timer_t* t = self->timer;
|
|
// uint8_t resolution;
|
|
// if (t->is_tc) {
|
|
// resolution = 16;
|
|
// } else {
|
|
// resolution = 24;
|
|
// }
|
|
// uint32_t system_clock = common_hal_mcu_processor_get_frequency();
|
|
// uint32_t new_top;
|
|
// uint8_t new_divisor;
|
|
// for (new_divisor = 0; new_divisor < 8; new_divisor++) {
|
|
// new_top = (system_clock / prescaler[new_divisor] / frequency) - 1;
|
|
// if (new_top < (1u << resolution)) {
|
|
// break;
|
|
// }
|
|
// }
|
|
// uint16_t old_duty = common_hal_pulseio_pwmout_get_duty_cycle(self);
|
|
// if (t->is_tc) {
|
|
// Tc* tc = tc_insts[t->index];
|
|
// uint8_t old_divisor = tc->COUNT16.CTRLA.bit.PRESCALER;
|
|
// if (new_divisor != old_divisor) {
|
|
// tc_set_enable(tc, false);
|
|
// tc->COUNT16.CTRLA.bit.PRESCALER = new_divisor;
|
|
// tc_set_enable(tc, true);
|
|
// }
|
|
// tc_periods[t->index] = new_top;
|
|
// #ifdef SAMD21
|
|
// tc->COUNT16.CC[0].reg = new_top;
|
|
// #endif
|
|
// #ifdef SAMD51
|
|
// while (tc->COUNT16.SYNCBUSY.reg != 0) {}
|
|
// tc->COUNT16.CCBUF[0].reg = new_top;
|
|
// #endif
|
|
// } else {
|
|
// Tcc* tcc = tcc_insts[t->index];
|
|
// uint8_t old_divisor = tcc->CTRLA.bit.PRESCALER;
|
|
// if (new_divisor != old_divisor) {
|
|
// tcc_set_enable(tcc, false);
|
|
// tcc->CTRLA.bit.PRESCALER = new_divisor;
|
|
// tcc_set_enable(tcc, true);
|
|
// }
|
|
// while (tcc->SYNCBUSY.reg != 0) {}
|
|
// tcc_periods[t->index] = new_top;
|
|
// #ifdef SAMD21
|
|
// tcc->PERB.bit.PERB = new_top;
|
|
// #endif
|
|
// #ifdef SAMD51
|
|
// tcc->PERBUF.bit.PERBUF = new_top;
|
|
// #endif
|
|
// }
|
|
|
|
// common_hal_pulseio_pwmout_set_duty_cycle(self, old_duty);
|
|
}
|
|
|
|
uint32_t common_hal_pulseio_pwmout_get_frequency(pulseio_pwmout_obj_t* self) {
|
|
// uint32_t system_clock = common_hal_mcu_processor_get_frequency();
|
|
// const pin_timer_t* t = self->timer;
|
|
// uint8_t divisor;
|
|
// uint32_t top;
|
|
// if (t->is_tc) {
|
|
// divisor = tc_insts[t->index]->COUNT16.CTRLA.bit.PRESCALER;
|
|
// top = tc_periods[t->index];
|
|
// } else {
|
|
// divisor = tcc_insts[t->index]->CTRLA.bit.PRESCALER;
|
|
// top = tcc_periods[t->index];
|
|
// }
|
|
// return (system_clock / prescaler[divisor]) / (top + 1);
|
|
return 0;
|
|
}
|
|
|
|
bool common_hal_pulseio_pwmout_get_variable_frequency(pulseio_pwmout_obj_t* self) {
|
|
return self->variable_frequency;
|
|
}
|