215 lines
6.8 KiB
Plaintext
215 lines
6.8 KiB
Plaintext
/* Template for iMX RT 10xx linking. This is the last of four linker scripts passed in.
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The first three provide variables for this one.
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Boards can setup reserved flash with _ld_reserved_flash_size in board.ld. */
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ENTRY(Reset_Handler)
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code_size = _ld_flash_size >= 4M ? 2M : 1M;
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_ld_default_stack_size = 20K;
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/* Default reserved flash to nothing. */
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_ld_reserved_flash_size = DEFINED(_ld_reserved_flash_size) ? _ld_reserved_flash_size : 0K ;
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MEMORY
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{
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/* These next two sections are included in place of a bootloader. If a UF2 is used to load, it
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will ignore these two sections because it lives there. */
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/* This is the first block and is read so that the bootrom knows the optimal way to interface with the flash chip. */
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FLASH_CONFIG (rx) : ORIGIN = flash_config_location, LENGTH = 512
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/* This can't move because the bootrom looks at this address. */
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FLASH_IVT (rx) : ORIGIN = flash_base + 0x1000, LENGTH = 4K
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/* Place the ISRs 48k in to leave room for the bootloader when it is available. */
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FLASH_FIRMWARE (rx) : ORIGIN = flash_base + 0xC000, LENGTH = code_size - 48K
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FLASH_FATFS (r) : ORIGIN = flash_base + code_size, LENGTH = _ld_flash_size - code_size - _ld_reserved_flash_size
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/* Teensy uses the last bit of flash for recovery. */
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RESERVED_FLASH : ORIGIN = flash_base + code_size + _ld_flash_size - _ld_reserved_flash_size, LENGTH = _ld_reserved_flash_size
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OCRAM (rwx) : ORIGIN = ocram_base, LENGTH = ram_size - 64K
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DTCM (x) : ORIGIN = 0x20000000, LENGTH = 32K
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ITCM (x) : ORIGIN = 0x00000000, LENGTH = 32K
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}
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__data_start__ = 0;
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__data_end__ = 0;
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_start = 0;
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SECTIONS
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{
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.flash_config :
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{
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. = ALIGN(4);
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KEEP(* (.boot_hdr.conf))
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. = ALIGN(4);
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} > FLASH_CONFIG
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.ivt :
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{
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. = ALIGN(4);
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KEEP(* (.boot_hdr.ivt))
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KEEP(* (.boot_hdr.boot_data))
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KEEP(* (.boot_hdr.dcd_data))
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. = ALIGN(4);
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} > FLASH_IVT
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/* Align for 256 ISR entries and place first in flash. Otherwise the UF2
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bootloader can't find it because it uses its own flash_config and ivt. */
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.isr_vector : ALIGN(4 * 256)
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{
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. = ALIGN(4);
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KEEP(*(.isr_vector)) /* Startup code */
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. = ALIGN(4);
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} > ITCM AT> FLASH_FIRMWARE
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_ld_isr_destination = ADDR(.isr_vector);
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_ld_isr_flash_copy = LOADADDR(.isr_vector);
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_ld_isr_size = SIZEOF(.isr_vector);
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/* Used by the bootloader to start user code. */
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__VECTOR_TABLE = LOADADDR(.isr_vector);
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.text :
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{
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. = ALIGN(4);
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*(EXCLUDE_FILE(
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*fsl_flexspi.o
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*cd_ci_hs.o
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*ehci.o
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*tusb_fifo.o
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*usbd.o
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*string0.o
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*py/nlr*.o
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*py/obj.o
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*py/gc.o
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*py/map.o
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*py/runtime.o
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*py/objboundmeth.o
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*py/objtype.o
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) .text*) /* .text* sections (code) */
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/* Keep USB processing functions out of RAM because we don't know which will be used.
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We try to only keep USB interrupt related functions. */
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*dcd_ci_hs.o(.text.process_*_request .text.dcd_edpt* .text.dcd_init .text.dcd_set_address)
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/* Move hcd_dcache* routines to RAM so that we don't cross execution from
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the cache during cache maintenance. Weird things happen when we do. */
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*hcd_ci_hs.o(.text.hcd_i*)
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*usbd.o(.text.process_*_request .text.process_[gs]et* .text.tud_* .text.usbd_* .text.configuration_reset .text.invoke_*)
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*ehci.o(.text.hcd_edpt* .text.hcd_setup* .text.ehci_init* .text.hcd_port* .text.hcd_device* .text.qtd_init* .text.list_remove*)
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/* Less critical portions of the runtime. */
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*runtime.o(.text.mp_import* .text.mp_resume* .text.mp_make_raise* .text.mp_init)
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*gc.o(.text.gc_never_free .text.gc_make_long_lived)
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/* Anything marked cold/unlikely should be in flash. */
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*(.text.unlikely.*)
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*(EXCLUDE_FILE(
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*dcd_ci_hs.o
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*py/objboundmeth.o
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*py/objtype.o
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) .rodata*) /* .rodata* sections (constants, strings, etc.) */
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. = ALIGN(4);
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} > FLASH_FIRMWARE
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.ARM.exidx :
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{
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__exidx_start = .;
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*(.ARM.exidx*)
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__exidx_end = .;
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*(.gnu.linkonce.armexidx.*)
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_etext = .; /* define a global symbol at end of code */
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__etext = .; /* define a global symbol at end of code */
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} > FLASH_FIRMWARE
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_ld_filesystem_start = ORIGIN(FLASH_FATFS);
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_ld_filesystem_end = _ld_filesystem_start + LENGTH(FLASH_FATFS);
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.data :
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{
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. = ALIGN(4);
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*(.data*) /* .data* sections */
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. = ALIGN(4);
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} > OCRAM AT> FLASH_FIRMWARE
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_ld_ocram_data_destination = ADDR(.data);
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_ld_ocram_data_flash_copy = LOADADDR(.data);
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_ld_ocram_data_size = SIZEOF(.data);
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/* Uninitialized data section */
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.bss :
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{
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. = ALIGN(4);
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*(SORT_BY_ALIGNMENT(SORT_BY_NAME(.bss*)))
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*(COMMON)
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. = ALIGN(4);
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} > OCRAM
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_ld_ocram_bss_start = ADDR(.bss);
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_ld_ocram_bss_size = SIZEOF(.bss);
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_ld_heap_start = _ld_ocram_bss_start + _ld_ocram_bss_size;
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_ld_ocram_start = ORIGIN(OCRAM);
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_ld_ocram_end = ORIGIN(OCRAM) + LENGTH(OCRAM);
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_ld_heap_end = _ld_ocram_end;
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.itcm : ALIGN(4)
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{
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. = ALIGN(4);
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*(.itcm.*)
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*fsl_flexspi.o(.text*)
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*dcd_ci_hs.o(.text*)
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*ehci.o(.text*)
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*tusb_fifo.o(.text*)
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*py/objboundmeth.o(.text*)
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*py/objtype.o(.text*)
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*py/obj.o(.text*)
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*py/gc.o(.text*)
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*py/map.o(.text*)
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*py/nlr*.o(.text*)
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*py/runtime.o(.text*)
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*(.text.process_*_isr .text.dcd_event_* .text.osal_queue*)
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*string0.o(.text*)
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. = ALIGN(4);
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} > ITCM AT> FLASH_FIRMWARE
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_ld_itcm_destination = ADDR(.itcm);
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_ld_itcm_flash_copy = LOADADDR(.itcm);
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_ld_itcm_size = SIZEOF(.itcm);
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.dtcm_data :
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{
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. = ALIGN(4);
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*(.dtcm_data.*)
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*dcd_ci_hs.o(.rodata*)
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*py/objboundmeth.o(.rodata*)
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*py/objtype.o(.rodata*)
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. = ALIGN(4);
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} > DTCM AT> FLASH_FIRMWARE
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_ld_dtcm_data_destination = ADDR(.dtcm_data);
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_ld_dtcm_data_flash_copy = LOADADDR(.dtcm_data);
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_ld_dtcm_data_size = SIZEOF(.dtcm_data);
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_flashimagelen = _ld_dtcm_data_flash_copy + _ld_dtcm_data_size - flash_config_location;
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.dtcm_bss :
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{
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. = ALIGN(4);
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*(.dtcm_bss.*)
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. = ALIGN(4);
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} > DTCM AT> DTCM
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_ld_dtcm_bss_start = ADDR(.dtcm_bss);
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_ld_dtcm_bss_size = SIZEOF(.dtcm_bss);
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.stack (NOLOAD) :
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{
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. = ALIGN(8);
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_ld_stack_bottom = .;
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. += _ld_default_stack_size;
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} > DTCM
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_ld_stack_top = ORIGIN(DTCM) + LENGTH(DTCM);
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/* For the SDK's isr vector table */
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__StackTop = ORIGIN(DTCM) + LENGTH(DTCM);
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.ARM.attributes 0 : { *(.ARM.attributes) }
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}
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