circuitpython/ports/espressif/supervisor
Scott Shawcroft f1053fb963
Introduce port_yield()
This allows the web workflow send code to yield briefly when
waiting for more room to send in a socket. Waiting for an "interrupt"
could wait forever because the select task only waits for read and
error. Adding wait on write is tricky because much of the time we
don't care if the sockets are ready to write. Using yield avoids
this trickiness.
2022-08-11 11:25:34 -07:00
..
internal_flash.c Enable -Werror=missing-prototypes on espressif port 2021-11-10 11:07:45 -06:00
internal_flash.h rename left over esp32s2 to espressif 2021-09-18 19:42:18 +05:30
internal_flash_root_pointers.h rename left over esp32s2 to espressif 2021-09-18 19:42:18 +05:30
port.c Introduce port_yield() 2022-08-11 11:25:34 -07:00
serial.c refactor debug UART to console UART; get working on ESP32 2022-06-30 23:16:46 -04:00
usb.c Fix other ESP builds and arduino_nano_33_iot 2022-07-29 11:02:35 -07:00
usb_serial_jtag.c Fix C3 when pasting 128+ characters 2022-08-02 15:25:19 -07:00
usb_serial_jtag.h Add USB to Serial/JTAG support for REPL 2022-03-21 14:03:57 -07:00