5bb8a7a7c6
* Enable dcache for OCRAM where the VM heap lives. * Add CIRCUITPY_SWO_TRACE for pushing program counters out over the SWO pin via the ITM module in the CPU. Exempt some functions from instrumentation to reduce traffic and allow inlining. * Place more functions in ITCM to handle errors using code in RAM-only and speed up CP. * Use SET and CLEAR registers for digitalio. The SDK does read, mask and write. * Switch to 2MiB reserved for CircuitPython code. Up from 1MiB. * Run USB interrupts during flash erase and write. * Allow storage writes from CP if the USB drive is disabled. * Get perf bench tests running on CircuitPython and increase timeouts so it works when instrumentation is active. |
||
|---|---|---|
| .. | ||
| boards | ||
| common-hal | ||
| linking | ||
| peripherals/mimxrt10xx | ||
| sdk@8363ff7bed | ||
| supervisor | ||
| background.c | ||
| background.h | ||
| board.h | ||
| Makefile | ||
| mpconfigport.h | ||
| mpconfigport.mk | ||
| mphalport.c | ||
| mphalport.h | ||
| qstrdefsport.h | ||
| README.md | ||
| reset.c | ||
| reset.h | ||
CircuitPython Port To The NXP i.MX RT10xx Series
This is a port of CircuitPython to the i.MX RT10xx series of chips.