0d7366c912
- Moves definition of BOARD_FLASH_SIZE and other header files related to flash configuration into the Makefile. - Adds board specific clock_config.h. - Adds board.h, pin_mux.h, and peripherals.h as they are required by NXP MCU SDK in order to use our own clock_config.h. - Renames board specific FlexSPI configuration files. - Updates flash frequency of MIMXRT1020_EVK - Creates separated flash_config files for QSPI NOR and QSPI Hyper flash. - Unifies VFS start address to be @ 1M for 1010 and 1020 boards. - Unifies 1050EVK boards - Adds support to both NOR and HyperFlash on boards with both capabilities. - Adds automatic FlexRAM initialization to start-up code based on linker script and NXP HAL. - Applies code formatting to all files in mimxrt port. With this change the flash configuration is restructured and organized. This simplifies the configuration process and provides a better overview of each board's settings. With the integration of clock_config.h, board.h, pin_mux.h, and peripherals.h we gain better control of the settings and clock configurations. Furthermore the implementation of an explicit FlexRAM setup improves the system performance and allows for performance tuning. Signed-off-by: Philipp Ebensberger
123 lines
4.7 KiB
C
123 lines
4.7 KiB
C
/*
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* Copyright 2018-2019 NXP
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* All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef _CLOCK_CONFIG_H_
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#define _CLOCK_CONFIG_H_
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#include "fsl_common.h"
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/*******************************************************************************
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* Definitions
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******************************************************************************/
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#define BOARD_XTAL0_CLK_HZ 24000000U /*!< Board xtal0 frequency in Hz */
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#define BOARD_XTAL32K_CLK_HZ 32768U /*!< Board xtal32k frequency in Hz */
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/*******************************************************************************
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************************ BOARD_InitBootClocks function ************************
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******************************************************************************/
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#if defined(__cplusplus)
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extern "C" {
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#endif /* __cplusplus*/
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/*!
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* @brief This function executes default configuration of clocks.
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*
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*/
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void BOARD_InitBootClocks(void);
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#if defined(__cplusplus)
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}
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#endif /* __cplusplus*/
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/*******************************************************************************
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********************** Configuration BOARD_BootClockRUN ***********************
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******************************************************************************/
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/*******************************************************************************
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* Definitions for BOARD_BootClockRUN configuration
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******************************************************************************/
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#define BOARD_BOOTCLOCKRUN_CORE_CLOCK 600000000U /*!< Core clock frequency: 600000000Hz */
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/* Clock outputs (values are in Hz): */
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#define BOARD_BOOTCLOCKRUN_AHB_CLK_ROOT 600000000UL
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#define BOARD_BOOTCLOCKRUN_CAN_CLK_ROOT 40000000UL
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#define BOARD_BOOTCLOCKRUN_CKIL_SYNC_CLK_ROOT 32768UL
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#define BOARD_BOOTCLOCKRUN_CLKO1_CLK 0UL
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#define BOARD_BOOTCLOCKRUN_CLKO2_CLK 0UL
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#define BOARD_BOOTCLOCKRUN_CLK_1M 1000000UL
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#define BOARD_BOOTCLOCKRUN_CLK_24M 24000000UL
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#define BOARD_BOOTCLOCKRUN_CSI_CLK_ROOT 12000000UL
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#define BOARD_BOOTCLOCKRUN_ENET1_TX_CLK 2400000UL
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#define BOARD_BOOTCLOCKRUN_ENET2_125M_CLK 1200000UL
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#define BOARD_BOOTCLOCKRUN_ENET2_TX_CLK 1200000UL
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#define BOARD_BOOTCLOCKRUN_ENET_125M_CLK 2400000UL
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#define BOARD_BOOTCLOCKRUN_ENET_25M_REF_CLK 1200000UL
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#define BOARD_BOOTCLOCKRUN_FLEXIO1_CLK_ROOT 30000000UL
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#define BOARD_BOOTCLOCKRUN_FLEXIO2_CLK_ROOT 30000000UL
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#define BOARD_BOOTCLOCKRUN_FLEXSPI2_CLK_ROOT 130909090UL
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#define BOARD_BOOTCLOCKRUN_FLEXSPI_CLK_ROOT 130909090UL
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#define BOARD_BOOTCLOCKRUN_GPT1_IPG_CLK_HIGHFREQ 75000000UL
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#define BOARD_BOOTCLOCKRUN_GPT2_IPG_CLK_HIGHFREQ 75000000UL
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#define BOARD_BOOTCLOCKRUN_IPG_CLK_ROOT 150000000UL
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#define BOARD_BOOTCLOCKRUN_LCDIF_CLK_ROOT 9642857UL
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#define BOARD_BOOTCLOCKRUN_LPI2C_CLK_ROOT 60000000UL
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#define BOARD_BOOTCLOCKRUN_LPSPI_CLK_ROOT 105600000UL
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#define BOARD_BOOTCLOCKRUN_LVDS1_CLK 1200000000UL
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#define BOARD_BOOTCLOCKRUN_MQS_MCLK 63529411UL
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#define BOARD_BOOTCLOCKRUN_PERCLK_CLK_ROOT 75000000UL
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#define BOARD_BOOTCLOCKRUN_PLL7_MAIN_CLK 24000000UL
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#define BOARD_BOOTCLOCKRUN_SAI1_CLK_ROOT 63529411UL
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#define BOARD_BOOTCLOCKRUN_SAI1_MCLK1 63529411UL
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#define BOARD_BOOTCLOCKRUN_SAI1_MCLK2 63529411UL
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#define BOARD_BOOTCLOCKRUN_SAI1_MCLK3 30000000UL
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#define BOARD_BOOTCLOCKRUN_SAI2_CLK_ROOT 63529411UL
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#define BOARD_BOOTCLOCKRUN_SAI2_MCLK1 63529411UL
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#define BOARD_BOOTCLOCKRUN_SAI2_MCLK2 0UL
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#define BOARD_BOOTCLOCKRUN_SAI2_MCLK3 30000000UL
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#define BOARD_BOOTCLOCKRUN_SAI3_CLK_ROOT 63529411UL
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#define BOARD_BOOTCLOCKRUN_SAI3_MCLK1 63529411UL
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#define BOARD_BOOTCLOCKRUN_SAI3_MCLK2 0UL
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#define BOARD_BOOTCLOCKRUN_SAI3_MCLK3 30000000UL
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#define BOARD_BOOTCLOCKRUN_SEMC_CLK_ROOT 75000000UL
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#define BOARD_BOOTCLOCKRUN_SPDIF0_CLK_ROOT 30000000UL
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#define BOARD_BOOTCLOCKRUN_SPDIF0_EXTCLK_OUT 0UL
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#define BOARD_BOOTCLOCKRUN_TRACE_CLK_ROOT 117333333UL
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#define BOARD_BOOTCLOCKRUN_UART_CLK_ROOT 80000000UL
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#define BOARD_BOOTCLOCKRUN_USBPHY1_CLK 0UL
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#define BOARD_BOOTCLOCKRUN_USBPHY2_CLK 0UL
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#define BOARD_BOOTCLOCKRUN_USDHC1_CLK_ROOT 198000000UL
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#define BOARD_BOOTCLOCKRUN_USDHC2_CLK_ROOT 198000000UL
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/*! @brief Arm PLL set for BOARD_BootClockRUN configuration.
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*/
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extern const clock_arm_pll_config_t armPllConfig_BOARD_BootClockRUN;
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/*! @brief Usb1 PLL set for BOARD_BootClockRUN configuration.
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*/
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extern const clock_usb_pll_config_t usb1PllConfig_BOARD_BootClockRUN;
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/*! @brief Sys PLL for BOARD_BootClockRUN configuration.
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*/
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extern const clock_sys_pll_config_t sysPllConfig_BOARD_BootClockRUN;
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/*******************************************************************************
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* API for BOARD_BootClockRUN configuration
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******************************************************************************/
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#if defined(__cplusplus)
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extern "C" {
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#endif /* __cplusplus*/
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/*!
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* @brief This function executes configuration of clocks.
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*
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*/
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void BOARD_BootClockRUN(void);
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#if defined(__cplusplus)
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}
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#endif /* __cplusplus*/
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#endif /* _CLOCK_CONFIG_H_ */
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