67fd58bbd2
Mboot now supports FAT, LFS1 and LFS2 filesystems, to load firmware from.
The filesystem needed by the board must be explicitly enabled by the
configuration variables MBOOT_VFS_FAT, MBOOT_VFS_LFS1 and MBOOT_VFS_LFS2.
Boards that previously used FAT implicitly (with MBOOT_FSLOAD enabled) must
now add the following config to mpconfigboard.h:
#define MBOOT_VFS_FAT (1)
Signed-off-by: Damien George <damien@micropython.org>
214 lines
9.0 KiB
C
214 lines
9.0 KiB
C
/*
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* This file is part of the MicroPython project, http://micropython.org/
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*
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* The MIT License (MIT)
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*
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* Copyright (c) 2018-2019 Damien P. George
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#define MICROPY_HW_BOARD_NAME "PYBD-SF2W"
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#define MICROPY_HW_MCU_NAME "STM32F722IEK"
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#define MICROPY_PY_PYB_LEGACY (1)
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#define MICROPY_HW_ENABLE_INTERNAL_FLASH_STORAGE (0)
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#define MICROPY_HW_HAS_SWITCH (1)
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#define MICROPY_HW_HAS_FLASH (1)
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#define MICROPY_HW_ENABLE_RNG (1)
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#define MICROPY_HW_ENABLE_RTC (1)
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#define MICROPY_HW_ENABLE_TIMER (1)
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#define MICROPY_HW_ENABLE_SERVO (1)
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#define MICROPY_HW_ENABLE_DAC (1)
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#define MICROPY_HW_ENABLE_USB (1)
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#define MICROPY_HW_ENABLE_SDCARD (1)
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#define MICROPY_HW_ENABLE_MMCARD (1)
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#define MICROPY_BOARD_EARLY_INIT board_early_init
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#define MICROPY_BOARD_ENTER_STOP board_sleep(1);
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#define MICROPY_BOARD_LEAVE_STOP board_sleep(0);
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#define MICROPY_BOARD_ENTER_STANDBY board_sleep(1);
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#define MICROPY_BOARD_SDCARD_POWER mp_hal_pin_high(pyb_pin_EN_3V3);
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void board_early_init(void);
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void board_sleep(int value);
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// HSE is 25MHz, run SYS at 120MHz
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#define MICROPY_HW_CLK_PLLM (20)
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#define MICROPY_HW_CLK_PLLN (192)
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#define MICROPY_HW_CLK_PLLP (RCC_PLLP_DIV2)
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#define MICROPY_HW_CLK_PLLQ (5)
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#define MICROPY_HW_FLASH_LATENCY (FLASH_LATENCY_3)
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// There is an external 32kHz oscillator
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#define RTC_ASYNCH_PREDIV (3)
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#define RTC_SYNCH_PREDIV (0x1fff)
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#define MICROPY_HW_RTC_USE_BYPASS (1)
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#define MICROPY_HW_RTC_USE_US (1)
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#define MICROPY_HW_RTC_USE_CALOUT (1)
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// SPI flash #1, for R/W storage
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#define MICROPY_HW_SOFTQSPI_SCK_LOW(self) (GPIOE->BSRR = (0x10000 << 11))
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#define MICROPY_HW_SOFTQSPI_SCK_HIGH(self) (GPIOE->BSRR = (1 << 11))
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#define MICROPY_HW_SOFTQSPI_NIBBLE_READ(self) ((GPIOE->IDR >> 7) & 0xf)
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#define MICROPY_HW_SPIFLASH_SIZE_BITS (16 * 1024 * 1024)
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#define MICROPY_HW_SPIFLASH_CS (pyb_pin_QSPI1_CS)
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#define MICROPY_HW_SPIFLASH_SCK (pyb_pin_QSPI1_CLK)
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#define MICROPY_HW_SPIFLASH_IO0 (pyb_pin_QSPI1_D0)
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#define MICROPY_HW_SPIFLASH_IO1 (pyb_pin_QSPI1_D1)
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#define MICROPY_HW_SPIFLASH_IO2 (pyb_pin_QSPI1_D2)
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#define MICROPY_HW_SPIFLASH_IO3 (pyb_pin_QSPI1_D3)
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// SPI flash #1, block device config
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extern const struct _mp_spiflash_config_t spiflash_config;
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extern struct _spi_bdev_t spi_bdev;
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#define MICROPY_HW_BDEV_IOCTL(op, arg) ( \
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(op) == BDEV_IOCTL_NUM_BLOCKS ? (MICROPY_HW_SPIFLASH_SIZE_BITS / 8 / FLASH_BLOCK_SIZE) : \
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(op) == BDEV_IOCTL_INIT ? spi_bdev_ioctl(&spi_bdev, (op), (uint32_t)&spiflash_config) : \
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spi_bdev_ioctl(&spi_bdev, (op), (arg)) \
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)
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#define MICROPY_HW_BDEV_READBLOCKS(dest, bl, n) spi_bdev_readblocks(&spi_bdev, (dest), (bl), (n))
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#define MICROPY_HW_BDEV_WRITEBLOCKS(src, bl, n) spi_bdev_writeblocks(&spi_bdev, (src), (bl), (n))
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#define MICROPY_HW_BDEV_SPIFLASH_EXTENDED (&spi_bdev) // for extended block protocol
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// SPI flash #2, to be memory mapped
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#define MICROPY_HW_QSPIFLASH_SIZE_BITS_LOG2 (24)
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#define MICROPY_HW_QSPIFLASH_CS (pyb_pin_QSPI2_CS)
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#define MICROPY_HW_QSPIFLASH_SCK (pyb_pin_QSPI2_CLK)
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#define MICROPY_HW_QSPIFLASH_IO0 (pyb_pin_QSPI2_D0)
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#define MICROPY_HW_QSPIFLASH_IO1 (pyb_pin_QSPI2_D1)
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#define MICROPY_HW_QSPIFLASH_IO2 (pyb_pin_QSPI2_D2)
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#define MICROPY_HW_QSPIFLASH_IO3 (pyb_pin_QSPI2_D3)
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// SPI flash #2, block device config
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extern const struct _mp_spiflash_config_t spiflash2_config;
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extern struct _spi_bdev_t spi_bdev2;
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// UART config
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#define MICROPY_HW_UART1_NAME "YA"
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#define MICROPY_HW_UART1_TX (pyb_pin_Y1)
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#define MICROPY_HW_UART1_RX (pyb_pin_Y2)
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#define MICROPY_HW_UART2_TX (pyb_pin_X3)
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#define MICROPY_HW_UART2_RX (pyb_pin_X4)
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#define MICROPY_HW_UART2_RTS (pyb_pin_X2)
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#define MICROPY_HW_UART2_CTS (pyb_pin_X1)
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#define MICROPY_HW_UART3_NAME "YB"
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#define MICROPY_HW_UART3_TX (pyb_pin_Y9)
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#define MICROPY_HW_UART3_RX (pyb_pin_Y10)
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#define MICROPY_HW_UART4_NAME "XA"
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#define MICROPY_HW_UART4_TX (pyb_pin_X1)
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#define MICROPY_HW_UART4_RX (pyb_pin_X2)
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#define MICROPY_HW_UART6_TX (pyb_pin_BT_TXD)
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#define MICROPY_HW_UART6_RX (pyb_pin_BT_RXD)
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#define MICROPY_HW_UART6_RTS (pyb_pin_BT_RTS)
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#define MICROPY_HW_UART6_CTS (pyb_pin_BT_CTS)
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// I2C busses
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#define MICROPY_HW_I2C1_NAME "X"
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#define MICROPY_HW_I2C1_SCL (pyb_pin_X9)
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#define MICROPY_HW_I2C1_SDA (pyb_pin_X10)
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#define MICROPY_HW_I2C2_NAME "Y"
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#define MICROPY_HW_I2C2_SCL (pyb_pin_Y9)
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#define MICROPY_HW_I2C2_SDA (pyb_pin_Y10)
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// SPI busses
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#define MICROPY_HW_SPI1_NAME "X"
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#define MICROPY_HW_SPI1_NSS (pyb_pin_X5)
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#define MICROPY_HW_SPI1_SCK (pyb_pin_X6)
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#define MICROPY_HW_SPI1_MISO (pyb_pin_X7)
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#define MICROPY_HW_SPI1_MOSI (pyb_pin_X8)
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#define MICROPY_HW_SPI2_NAME "Y"
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#define MICROPY_HW_SPI2_NSS (pyb_pin_Y5)
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#define MICROPY_HW_SPI2_SCK (pyb_pin_Y6)
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#define MICROPY_HW_SPI2_MISO (pyb_pin_Y7)
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#define MICROPY_HW_SPI2_MOSI (pyb_pin_Y8)
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#define MICROPY_HW_SPI3_NSS (pyb_pin_W16)
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#define MICROPY_HW_SPI3_SCK (pyb_pin_W29)
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#define MICROPY_HW_SPI3_MISO (pyb_pin_W50)
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#define MICROPY_HW_SPI3_MOSI (pyb_pin_W46)
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// CAN busses
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#define MICROPY_HW_CAN1_NAME "X"
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#define MICROPY_HW_CAN1_TX (pyb_pin_X10)
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#define MICROPY_HW_CAN1_RX (pyb_pin_X9)
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// USRSW is not pulled, and pressing the button makes the input go low.
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#define MICROPY_HW_USRSW_PIN (pyb_pin_USR)
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#define MICROPY_HW_USRSW_PULL (GPIO_PULLUP)
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#define MICROPY_HW_USRSW_EXTI_MODE (GPIO_MODE_IT_FALLING)
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#define MICROPY_HW_USRSW_PRESSED (0)
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// LEDs
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#define MICROPY_HW_LED_INVERTED (1) // LEDs are on when pin is driven low
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#define MICROPY_HW_LED1 (pyb_pin_LED_RED)
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#define MICROPY_HW_LED2 (pyb_pin_LED_GREEN)
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#define MICROPY_HW_LED3 (pyb_pin_LED_BLUE)
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#define MICROPY_HW_LED_ON(pin) (mp_hal_pin_low(pin))
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#define MICROPY_HW_LED_OFF(pin) (mp_hal_pin_high(pin))
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// SD card
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#define MICROPY_HW_SDMMC2_CK (pyb_pin_SD_CK)
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#define MICROPY_HW_SDMMC2_CMD (pyb_pin_SD_CMD)
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#define MICROPY_HW_SDMMC2_D0 (pyb_pin_SD_D0)
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#define MICROPY_HW_SDMMC2_D1 (pyb_pin_SD_D1)
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#define MICROPY_HW_SDMMC2_D2 (pyb_pin_SD_D2)
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#define MICROPY_HW_SDMMC2_D3 (pyb_pin_SD_D3)
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#define MICROPY_HW_SDCARD_DETECT_PIN (pyb_pin_SD_SW)
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#define MICROPY_HW_SDCARD_DETECT_PULL (GPIO_PULLUP)
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#define MICROPY_HW_SDCARD_DETECT_PRESENT (GPIO_PIN_RESET)
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#define MICROPY_HW_SDCARD_MOUNT_AT_BOOT (0)
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// USB config
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#define MICROPY_HW_USB_FS (1)
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#define MICROPY_HW_USB_HS (1)
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#define MICROPY_HW_USB_HS_IN_FS (1)
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#define MICROPY_HW_USB_MAIN_DEV (USB_PHY_HS_ID)
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// Bluetooth config
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#define MICROPY_HW_BLE_UART_ID (PYB_UART_6)
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#define MICROPY_HW_BLE_UART_BAUDRATE (115200)
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/******************************************************************************/
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// Bootloader configuration
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#define MBOOT_USB_AUTODETECT_PORT (1)
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#define MBOOT_FSLOAD (1)
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#define MBOOT_VFS_FAT (1)
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#define MBOOT_I2C_PERIPH_ID 1
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#define MBOOT_I2C_SCL (pin_B8)
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#define MBOOT_I2C_SDA (pin_B9)
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#define MBOOT_I2C_ALTFUNC (4)
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#define MBOOT_SPIFLASH_ADDR (0x80000000)
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#define MBOOT_SPIFLASH_BYTE_SIZE (64 * 32 * 1024)
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#define MBOOT_SPIFLASH_LAYOUT "/0x80000000/64*32Kg"
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#define MBOOT_SPIFLASH_ERASE_BLOCKS_PER_PAGE (32 / 4)
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#define MBOOT_SPIFLASH_SPIFLASH (&spi_bdev.spiflash)
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#define MBOOT_SPIFLASH_CONFIG (&spiflash_config)
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#define MBOOT_SPIFLASH2_ADDR (0x90000000)
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#define MBOOT_SPIFLASH2_BYTE_SIZE (64 * 32 * 1024)
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#define MBOOT_SPIFLASH2_LAYOUT "/0x90000000/64*32Kg"
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#define MBOOT_SPIFLASH2_ERASE_BLOCKS_PER_PAGE (32 / 4)
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#define MBOOT_SPIFLASH2_SPIFLASH (&spi_bdev2.spiflash)
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#define MBOOT_SPIFLASH2_CONFIG (&spiflash2_config)
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#define MBOOT_BOARD_EARLY_INIT mboot_board_early_init
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void mboot_board_early_init(void);
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