227 lines
9.5 KiB
C
227 lines
9.5 KiB
C
// This board is confirmed to operate using stlink and openocd.
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// REPL is on UART(1) and is available through the stlink USB-UART device.
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// To use openocd run "OPENOCD_CONFIG=boards/openocd_stm32f7.cfg" in
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// the make command.
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#define MICROPY_HW_BOARD_NAME "F769DISC"
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#define MICROPY_HW_MCU_NAME "STM32F769"
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#define MICROPY_HW_HAS_SWITCH (1)
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#define MICROPY_HW_HAS_FLASH (1)
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#define MICROPY_HW_ENABLE_RNG (1)
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#define MICROPY_HW_ENABLE_RTC (1)
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#define MICROPY_HW_ENABLE_USB (1)
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#define MICROPY_HW_ENABLE_SDCARD (1)
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#define MICROPY_BOARD_EARLY_INIT board_early_init
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void board_early_init(void);
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// HSE is 25MHz
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// VCOClock = HSE * PLLN / PLLM = 25 MHz * 432 / 25 = 432 MHz
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// SYSCLK = VCOClock / PLLP = 432 MHz / 2 = 216 MHz
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// USB/SDMMC/RNG Clock = VCOClock / PLLQ = 432 MHz / 9 = 48 MHz
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#define MICROPY_HW_CLK_PLLM (25)
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#define MICROPY_HW_CLK_PLLN (432)
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#define MICROPY_HW_CLK_PLLP (RCC_PLLP_DIV2)
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#define MICROPY_HW_CLK_PLLQ (9)
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#define MICROPY_HW_FLASH_LATENCY FLASH_LATENCY_7 // 210-216 MHz needs 7 wait states
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// 512MBit external QSPI flash, used for either the filesystem or XIP memory mapped
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#define MICROPY_HW_QSPIFLASH_SIZE_BITS_LOG2 (29)
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#define MICROPY_HW_QSPIFLASH_CS (pin_B6)
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#define MICROPY_HW_QSPIFLASH_SCK (pin_B2)
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#define MICROPY_HW_QSPIFLASH_IO0 (pin_C9)
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#define MICROPY_HW_QSPIFLASH_IO1 (pin_C10)
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#define MICROPY_HW_QSPIFLASH_IO2 (pin_E2)
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#define MICROPY_HW_QSPIFLASH_IO3 (pin_D13)
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// SPI flash, block device config (when used as the filesystem)
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extern const struct _mp_spiflash_config_t spiflash_config;
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extern struct _spi_bdev_t spi_bdev;
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#if !USE_QSPI_XIP
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#define MICROPY_HW_ENABLE_INTERNAL_FLASH_STORAGE (0)
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#define MICROPY_HW_SPIFLASH_ENABLE_CACHE (1)
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#define MICROPY_HW_BDEV_IOCTL(op, arg) ( \
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(op) == BDEV_IOCTL_NUM_BLOCKS ? ((1 << MICROPY_HW_QSPIFLASH_SIZE_BITS_LOG2) / 8 / FLASH_BLOCK_SIZE) : \
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(op) == BDEV_IOCTL_INIT ? spi_bdev_ioctl(&spi_bdev, (op), (uint32_t)&spiflash_config) : \
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spi_bdev_ioctl(&spi_bdev, (op), (arg)) \
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)
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#define MICROPY_HW_BDEV_READBLOCKS(dest, bl, n) spi_bdev_readblocks(&spi_bdev, (dest), (bl), (n))
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#define MICROPY_HW_BDEV_WRITEBLOCKS(src, bl, n) spi_bdev_writeblocks(&spi_bdev, (src), (bl), (n))
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#define MICROPY_HW_BDEV_SPIFLASH_EXTENDED (&spi_bdev) // for extended block protocol
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#endif
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// UART config
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#define MICROPY_HW_UART1_TX (pin_A9)
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#define MICROPY_HW_UART1_RX (pin_A10)
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#define MICROPY_HW_UART5_TX (pin_C12)
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#define MICROPY_HW_UART5_RX (pin_D2)
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#define MICROPY_HW_UART_REPL PYB_UART_1
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#define MICROPY_HW_UART_REPL_BAUD 115200
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// I2C buses
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#define MICROPY_HW_I2C1_SCL (pin_B8)
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#define MICROPY_HW_I2C1_SDA (pin_B9)
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#define MICROPY_HW_I2C3_SCL (pin_H7)
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#define MICROPY_HW_I2C3_SDA (pin_H8)
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// SPI buses
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#define MICROPY_HW_SPI2_NSS (pin_A11)
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#define MICROPY_HW_SPI2_SCK (pin_A12)
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#define MICROPY_HW_SPI2_MISO (pin_B14)
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#define MICROPY_HW_SPI2_MOSI (pin_B15)
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// CAN buses
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#define MICROPY_HW_CAN1_TX (pin_B9)
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#define MICROPY_HW_CAN1_RX (pin_B8)
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#define MICROPY_HW_CAN2_TX (pin_B13)
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#define MICROPY_HW_CAN2_RX (pin_B12)
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// USRSW is pulled low. Pressing the button makes the input go high.
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#define MICROPY_HW_USRSW_PIN (pin_A0)
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#define MICROPY_HW_USRSW_PULL (GPIO_NOPULL)
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#define MICROPY_HW_USRSW_EXTI_MODE (GPIO_MODE_IT_RISING)
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#define MICROPY_HW_USRSW_PRESSED (1)
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// LEDs
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#define MICROPY_HW_LED1 (pin_J13) // red
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#define MICROPY_HW_LED2 (pin_J5) // green
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#define MICROPY_HW_LED3 (pin_A12) // green
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#define MICROPY_HW_LED_ON(pin) (mp_hal_pin_high(pin))
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#define MICROPY_HW_LED_OFF(pin) (mp_hal_pin_low(pin))
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// SD card
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#define MICROPY_HW_SDCARD_SDMMC (2)
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#define MICROPY_HW_SDCARD_CK (pin_D6)
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#define MICROPY_HW_SDCARD_CMD (pin_D7)
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#define MICROPY_HW_SDCARD_D0 (pin_G9)
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#define MICROPY_HW_SDCARD_D1 (pin_G10)
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#define MICROPY_HW_SDCARD_D2 (pin_B3)
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#define MICROPY_HW_SDCARD_D3 (pin_B4)
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#define MICROPY_HW_SDCARD_DETECT_PIN (pin_I15)
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#define MICROPY_HW_SDCARD_DETECT_PULL (GPIO_PULLUP)
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#define MICROPY_HW_SDCARD_DETECT_PRESENT (GPIO_PIN_RESET)
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// USB config (CN15 - USB OTG HS with external PHY)
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#define MICROPY_HW_USB_HS (1)
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#define MICROPY_HW_USB_HS_ULPI_NXT (pin_H4)
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#define MICROPY_HW_USB_HS_ULPI_DIR (pin_I11)
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// Ethernet via RMII
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#define MICROPY_HW_ETH_MDC (pin_C1)
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#define MICROPY_HW_ETH_MDIO (pin_A2)
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#define MICROPY_HW_ETH_RMII_REF_CLK (pin_A1)
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#define MICROPY_HW_ETH_RMII_CRS_DV (pin_A7)
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#define MICROPY_HW_ETH_RMII_RXD0 (pin_C4)
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#define MICROPY_HW_ETH_RMII_RXD1 (pin_C5)
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#define MICROPY_HW_ETH_RMII_TX_EN (pin_G11)
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#define MICROPY_HW_ETH_RMII_TXD0 (pin_G13)
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#define MICROPY_HW_ETH_RMII_TXD1 (pin_G14)
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#if 0
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// Optional SDRAM configuration.
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// Note: This requires SYSCLK <= 200MHz. 192MHz example below:
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// #define MICROPY_HW_CLK_PLLM (25)
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// #define MICROPY_HW_CLK_PLLN (384)
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// #define MICROPY_HW_CLK_PLLP (RCC_PLLP_DIV2)
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// #define MICROPY_HW_CLK_PLLQ (8)
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#define MICROPY_HW_SDRAM_SIZE (128 * 1024 * 1024 / 8) // 128 Mbit
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#define MICROPY_HW_SDRAM_STARTUP_TEST (0)
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#define MICROPY_HEAP_START sdram_start()
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#define MICROPY_HEAP_END sdram_end()
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// Timing configuration for 90 Mhz (11.90ns) of SD clock frequency (180Mhz/2)
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#define MICROPY_HW_SDRAM_TIMING_TMRD (2)
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#define MICROPY_HW_SDRAM_TIMING_TXSR (7)
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#define MICROPY_HW_SDRAM_TIMING_TRAS (4)
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#define MICROPY_HW_SDRAM_TIMING_TRC (7)
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#define MICROPY_HW_SDRAM_TIMING_TWR (2)
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#define MICROPY_HW_SDRAM_TIMING_TRP (2)
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#define MICROPY_HW_SDRAM_TIMING_TRCD (2)
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#define MICROPY_HW_SDRAM_REFRESH_RATE (64) // ms
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#define MICROPY_HW_SDRAM_BURST_LENGTH 1
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#define MICROPY_HW_SDRAM_CAS_LATENCY 2
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#define MICROPY_HW_SDRAM_COLUMN_BITS_NUM 8
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#define MICROPY_HW_SDRAM_ROW_BITS_NUM 12
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#define MICROPY_HW_SDRAM_MEM_BUS_WIDTH 32
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#define MICROPY_HW_SDRAM_INTERN_BANKS_NUM 4
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#define MICROPY_HW_SDRAM_CLOCK_PERIOD 2
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#define MICROPY_HW_SDRAM_RPIPE_DELAY 0
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#define MICROPY_HW_SDRAM_RBURST (1)
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#define MICROPY_HW_SDRAM_WRITE_PROTECTION (0)
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#define MICROPY_HW_SDRAM_AUTOREFRESH_NUM (8)
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// See pins.csv for CPU pin mapping
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#define MICROPY_HW_FMC_SDCKE0 (pyb_pin_FMC_SDCKE0)
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#define MICROPY_HW_FMC_SDNE0 (pyb_pin_FMC_SDNE0)
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#define MICROPY_HW_FMC_SDCLK (pyb_pin_FMC_SDCLK)
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#define MICROPY_HW_FMC_SDNCAS (pyb_pin_FMC_SDNCAS)
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#define MICROPY_HW_FMC_SDNRAS (pyb_pin_FMC_SDNRAS)
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#define MICROPY_HW_FMC_SDNWE (pyb_pin_FMC_SDNWE)
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#define MICROPY_HW_FMC_BA0 (pyb_pin_FMC_BA0)
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#define MICROPY_HW_FMC_BA1 (pyb_pin_FMC_BA1)
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#define MICROPY_HW_FMC_NBL0 (pyb_pin_FMC_NBL0)
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#define MICROPY_HW_FMC_NBL1 (pyb_pin_FMC_NBL1)
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#define MICROPY_HW_FMC_NBL2 (pyb_pin_FMC_NBL2)
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#define MICROPY_HW_FMC_NBL3 (pyb_pin_FMC_NBL3)
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#define MICROPY_HW_FMC_A0 (pyb_pin_FMC_A0)
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#define MICROPY_HW_FMC_A1 (pyb_pin_FMC_A1)
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#define MICROPY_HW_FMC_A2 (pyb_pin_FMC_A2)
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#define MICROPY_HW_FMC_A3 (pyb_pin_FMC_A3)
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#define MICROPY_HW_FMC_A4 (pyb_pin_FMC_A4)
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#define MICROPY_HW_FMC_A5 (pyb_pin_FMC_A5)
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#define MICROPY_HW_FMC_A6 (pyb_pin_FMC_A6)
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#define MICROPY_HW_FMC_A7 (pyb_pin_FMC_A7)
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#define MICROPY_HW_FMC_A8 (pyb_pin_FMC_A8)
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#define MICROPY_HW_FMC_A9 (pyb_pin_FMC_A9)
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#define MICROPY_HW_FMC_A10 (pyb_pin_FMC_A10)
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#define MICROPY_HW_FMC_A11 (pyb_pin_FMC_A11)
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#define MICROPY_HW_FMC_A12 (pyb_pin_FMC_A12)
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#define MICROPY_HW_FMC_D0 (pyb_pin_FMC_D0)
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#define MICROPY_HW_FMC_D1 (pyb_pin_FMC_D1)
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#define MICROPY_HW_FMC_D2 (pyb_pin_FMC_D2)
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#define MICROPY_HW_FMC_D3 (pyb_pin_FMC_D3)
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#define MICROPY_HW_FMC_D4 (pyb_pin_FMC_D4)
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#define MICROPY_HW_FMC_D5 (pyb_pin_FMC_D5)
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#define MICROPY_HW_FMC_D6 (pyb_pin_FMC_D6)
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#define MICROPY_HW_FMC_D7 (pyb_pin_FMC_D7)
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#define MICROPY_HW_FMC_D8 (pyb_pin_FMC_D8)
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#define MICROPY_HW_FMC_D9 (pyb_pin_FMC_D9)
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#define MICROPY_HW_FMC_D10 (pyb_pin_FMC_D10)
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#define MICROPY_HW_FMC_D11 (pyb_pin_FMC_D11)
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#define MICROPY_HW_FMC_D12 (pyb_pin_FMC_D12)
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#define MICROPY_HW_FMC_D13 (pyb_pin_FMC_D13)
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#define MICROPY_HW_FMC_D14 (pyb_pin_FMC_D14)
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#define MICROPY_HW_FMC_D15 (pyb_pin_FMC_D15)
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#define MICROPY_HW_FMC_D16 (pyb_pin_FMC_D16)
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#define MICROPY_HW_FMC_D17 (pyb_pin_FMC_D17)
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#define MICROPY_HW_FMC_D18 (pyb_pin_FMC_D18)
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#define MICROPY_HW_FMC_D19 (pyb_pin_FMC_D19)
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#define MICROPY_HW_FMC_D20 (pyb_pin_FMC_D20)
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#define MICROPY_HW_FMC_D21 (pyb_pin_FMC_D21)
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#define MICROPY_HW_FMC_D22 (pyb_pin_FMC_D22)
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#define MICROPY_HW_FMC_D23 (pyb_pin_FMC_D23)
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#define MICROPY_HW_FMC_D24 (pyb_pin_FMC_D24)
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#define MICROPY_HW_FMC_D25 (pyb_pin_FMC_D25)
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#define MICROPY_HW_FMC_D26 (pyb_pin_FMC_D26)
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#define MICROPY_HW_FMC_D27 (pyb_pin_FMC_D27)
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#define MICROPY_HW_FMC_D28 (pyb_pin_FMC_D28)
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#define MICROPY_HW_FMC_D29 (pyb_pin_FMC_D29)
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#define MICROPY_HW_FMC_D30 (pyb_pin_FMC_D30)
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#define MICROPY_HW_FMC_D31 (pyb_pin_FMC_D31)
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#endif
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/******************************************************************************/
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// Bootloader configuration
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// Give Mboot access to the external QSPI flash
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#define MBOOT_SPIFLASH_ADDR (0x90000000)
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#define MBOOT_SPIFLASH_BYTE_SIZE (512 * 128 * 1024)
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#define MBOOT_SPIFLASH_LAYOUT "/0x90000000/512*128Kg"
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#define MBOOT_SPIFLASH_ERASE_BLOCKS_PER_PAGE (128 / 4) // 128k page, 4k erase block
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#define MBOOT_SPIFLASH_CONFIG (&spiflash_config)
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#define MBOOT_SPIFLASH_SPIFLASH (&spi_bdev.spiflash)
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