circuitpython/ports/litex
Christian Walther c7404a3ff8 Add movable allocation system.
This allows calls to `allocate_memory()` while the VM is running, it will then allocate from the GC heap (unless there is a suitable hole among the supervisor allocations), and when the VM exits and the GC heap is freed, the allocation will be moved to the bottom of the former GC heap and transformed into a proper supervisor allocation. Existing movable allocations will also be moved to defragment the supervisor heap and ensure that the next VM run gets as much memory as possible for the GC heap.

By itself this breaks terminalio because it violates the assumption that supervisor_display_move_memory() still has access to an undisturbed heap to copy the tilegrid from. It will work in many cases, but if you're unlucky you will get garbled terminal contents after exiting from the vm run that created the display. This will be fixed in the following commit, which is separate to simplify review.
2020-11-28 17:50:23 +01:00
..
boards supervisor.mk: Compute USB_DEVICES; remove from boards and ports 2020-06-23 12:59:01 -05:00
common-hal Finish common-hal pin API 2020-07-24 12:29:18 -04:00
hw Fix up end of file and trailing whitespace. 2020-06-03 10:56:35 +01:00
supervisor Add movable allocation system. 2020-11-28 17:50:23 +01:00
.gitignore Update LiteX APIs for new tick 2020-03-31 17:52:23 -07:00
Makefile Changes to optimization option 2020-07-23 19:27:02 -05:00
README.rst Update the supported ports 2020-03-31 18:27:55 -07:00
background.c supervisor: factor supervisor_background_tasks from sundry ports 2020-07-15 11:49:44 -05:00
background.h supervisor: factor supervisor_background_tasks from sundry ports 2020-07-15 11:49:44 -05:00
crt0-vexriscv.S ports: litex: add port and fomu board 2020-03-31 09:40:38 +08:00
fatfs_port.c Add license to some obvious files. 2020-07-06 19:16:25 +01:00
irq.h Fix up end of file and trailing whitespace. 2020-06-03 10:56:35 +01:00
mpconfigport.h Moved ORDEREDDICT define to central location 2020-10-13 18:52:27 -05:00
mpconfigport.mk no _bleio for litex; ESP32S2 defines BIT() already 2020-10-15 16:34:19 -04:00
mphalport.c supervisor: factor out, Handle USB via background callback 2020-07-15 11:49:44 -05:00
mphalport.h ports: litex: add port and fomu board 2020-03-31 09:40:38 +08:00
qstrdefsport.h ports: litex: add port and fomu board 2020-03-31 09:40:38 +08:00

README.rst

LiteX (FPGA)
============

`LiteX <https://github.com/enjoy-digital/litex>`_ is a Python-based System on a Chip (SoC) designer
for open source supported Field Programmable Gate Array (FPGA) chips. This means that the CPU
core(s) and peripherals are not defined by the physical chip. Instead, they are loaded as separate
"gateware". Once this gateware is loaded, CircuitPython can be loaded on top of it to work as
expected.

Installation
-------------

You'll need ``dfu-util`` to install CircuitPython on the Fomu.

Make sure the foboot bootloader is updated. Instructions are here: https://github.com/im-tomu/fomu-workshop/blob/master/docs/bootloader.rst

Once you've updated the bootloader, you should know how to use ``dfu-util``. It's pretty easy!

To install CircuitPython do:

.. code-block:: shell

  dfu-util -D adafruit-circuitpython-fomu-en_US-<version>.dfu

It will install and then restart. CIRCUITPY should appear as it usually does and work the same.