4a2a553647
Enhance readability by separating the samd21 and samd51 clock code. This patch should not introduce any functional changes.
70 lines
2.7 KiB
C
70 lines
2.7 KiB
C
/*
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* This file is part of the MicroPython project, http://micropython.org/
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*
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* The MIT License (MIT)
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*
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* Copyright (c) 2018 Scott Shawcroft for Adafruit Industries
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#include "clocks.h"
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#include "hpl_gclk_config.h"
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#include "shared-bindings/microcontroller/__init__.h"
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#include "py/runtime.h"
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bool gclk_enabled(uint8_t gclk) {
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common_hal_mcu_disable_interrupts();
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// Explicitly do a byte write so the peripheral knows we're just wanting to read the channel
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// rather than write to it.
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*((uint8_t*) &GCLK->GENCTRL.reg) = gclk;
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while (GCLK->STATUS.bit.SYNCBUSY == 1) {}
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bool enabled = GCLK->GENCTRL.bit.GENEN;
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common_hal_mcu_enable_interrupts();
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return enabled;
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}
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void disable_gclk(uint8_t gclk) {
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while (GCLK->STATUS.bit.SYNCBUSY == 1) {}
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GCLK->GENCTRL.reg = GCLK_GENCTRL_ID(gclk);
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while (GCLK->STATUS.bit.SYNCBUSY == 1) {}
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}
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void connect_gclk_to_peripheral(uint8_t gclk, uint8_t peripheral) {
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GCLK->CLKCTRL.reg = GCLK_CLKCTRL_ID(peripheral) | GCLK_CLKCTRL_GEN(gclk) | GCLK_CLKCTRL_CLKEN;
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}
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void disconnect_gclk_from_peripheral(uint8_t gclk, uint8_t peripheral) {
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GCLK->CLKCTRL.reg = GCLK_CLKCTRL_ID(peripheral) | GCLK_CLKCTRL_GEN(gclk);
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}
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void enable_clock_generator(uint8_t gclk, uint8_t source, uint16_t divisor) {
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GCLK->GENDIV.reg = GCLK_GENDIV_ID(gclk) | GCLK_GENDIV_DIV(divisor);
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GCLK->GENCTRL.reg = GCLK_GENCTRL_ID(gclk) | GCLK_GENCTRL_SRC(source) | GCLK_GENCTRL_GENEN;
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while (GCLK->STATUS.bit.SYNCBUSY != 0) {}
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}
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void disable_clock_generator(uint8_t gclk) {
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GCLK->GENCTRL.reg = GCLK_GENCTRL_ID(gclk);
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while (GCLK->STATUS.bit.SYNCBUSY != 0) {}
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}
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