f3a5b313e5
This fixes compiling for older architectures (e.g. armv5tej). According to [1], the limit of R0-R7 for the STR and LDR instructions is tied to the Thumb instruction set and not any specific processor architectures. [1]: http://www.keil.com/support/man/docs/armasm/armasm_dom1361289906890.htm
146 lines
5.7 KiB
C
146 lines
5.7 KiB
C
/*
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* This file is part of the MicroPython project, http://micropython.org/
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*
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* The MIT License (MIT)
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*
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* Copyright (c) 2013-2017 Damien P. George
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#include "py/mpstate.h"
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#if MICROPY_NLR_THUMB
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#undef nlr_push
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// We only need the functions here if we are on arm/thumb, and we are not
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// using setjmp/longjmp.
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//
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// For reference, arm/thumb callee save regs are:
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// r4-r11, r13=sp
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__attribute__((naked)) unsigned int nlr_push(nlr_buf_t *nlr) {
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__asm volatile (
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"str r4, [r0, #12] \n" // store r4 into nlr_buf
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"str r5, [r0, #16] \n" // store r5 into nlr_buf
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"str r6, [r0, #20] \n" // store r6 into nlr_buf
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"str r7, [r0, #24] \n" // store r7 into nlr_buf
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#if !defined(__thumb2__)
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"mov r1, r8 \n"
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"str r1, [r0, #28] \n" // store r8 into nlr_buf
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"mov r1, r9 \n"
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"str r1, [r0, #32] \n" // store r9 into nlr_buf
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"mov r1, r10 \n"
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"str r1, [r0, #36] \n" // store r10 into nlr_buf
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"mov r1, r11 \n"
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"str r1, [r0, #40] \n" // store r11 into nlr_buf
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"mov r1, r13 \n"
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"str r1, [r0, #44] \n" // store r13=sp into nlr_buf
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"mov r1, lr \n"
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"str r1, [r0, #8] \n" // store lr into nlr_buf
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#else
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"str r8, [r0, #28] \n" // store r8 into nlr_buf
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"str r9, [r0, #32] \n" // store r9 into nlr_buf
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"str r10, [r0, #36] \n" // store r10 into nlr_buf
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"str r11, [r0, #40] \n" // store r11 into nlr_buf
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"str r13, [r0, #44] \n" // store r13=sp into nlr_buf
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#if MICROPY_NLR_NUM_REGS == 16
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"vstr d8, [r0, #48] \n" // store s16-s17 into nlr_buf
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"vstr d9, [r0, #56] \n" // store s18-s19 into nlr_buf
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"vstr d10, [r0, #64] \n" // store s20-s21 into nlr_buf
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#endif
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"str lr, [r0, #8] \n" // store lr into nlr_buf
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#endif
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#if !defined(__thumb2__)
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"ldr r1, nlr_push_tail_var \n"
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"bx r1 \n" // do the rest in C
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".align 2 \n"
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"nlr_push_tail_var: .word nlr_push_tail \n"
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#else
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#if defined(__APPLE__) || defined(__MACH__)
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"b _nlr_push_tail \n" // do the rest in C
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#else
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"b nlr_push_tail \n" // do the rest in C
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#endif
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#endif
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);
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#if !defined(__clang__) && defined(__GNUC__) && (__GNUC__ < 4 || (__GNUC__ == 4 && __GNUC_MINOR__ < 8))
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// Older versions of gcc give an error when naked functions don't return a value
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// Additionally exclude Clang as it also defines __GNUC__ but doesn't need this statement
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return 0;
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#endif
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}
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NORETURN void nlr_jump(void *val) {
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MP_NLR_JUMP_HEAD(val, top)
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__asm volatile (
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"mov r0, %0 \n" // r0 points to nlr_buf
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"ldr r4, [r0, #12] \n" // load r4 from nlr_buf
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"ldr r5, [r0, #16] \n" // load r5 from nlr_buf
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"ldr r6, [r0, #20] \n" // load r6 from nlr_buf
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"ldr r7, [r0, #24] \n" // load r7 from nlr_buf
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#if !defined(__thumb2__)
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"ldr r1, [r0, #28] \n" // load r8 from nlr_buf
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"mov r8, r1 \n"
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"ldr r1, [r0, #32] \n" // load r9 from nlr_buf
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"mov r9, r1 \n"
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"ldr r1, [r0, #36] \n" // load r10 from nlr_buf
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"mov r10, r1 \n"
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"ldr r1, [r0, #40] \n" // load r11 from nlr_buf
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"mov r11, r1 \n"
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"ldr r1, [r0, #44] \n" // load r13=sp from nlr_buf
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"mov r13, r1 \n"
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"ldr r1, [r0, #8] \n" // load lr from nlr_buf
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"mov lr, r1 \n"
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#else
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"ldr r8, [r0, #28] \n" // load r8 from nlr_buf
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"ldr r9, [r0, #32] \n" // load r9 from nlr_buf
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"ldr r10, [r0, #36] \n" // load r10 from nlr_buf
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"ldr r11, [r0, #40] \n" // load r11 from nlr_buf
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"ldr r13, [r0, #44] \n" // load r13=sp from nlr_buf
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#if MICROPY_NLR_NUM_REGS == 16
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"vldr d8, [r0, #48] \n" // load s16-s17 from nlr_buf
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"vldr d9, [r0, #56] \n" // load s18-s19 from nlr_buf
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"vldr d10, [r0, #64] \n" // load s20-s21 from nlr_buf
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#endif
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"ldr lr, [r0, #8] \n" // load lr from nlr_buf
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#endif
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"movs r0, #1 \n" // return 1, non-local return
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"bx lr \n" // return
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: // output operands
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: "r"(top) // input operands
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: // clobbered registers
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);
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#if defined(__GNUC__)
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__builtin_unreachable();
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#else
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for (;;); // needed to silence compiler warning
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#endif
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}
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#endif // MICROPY_NLR_THUMB
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