217 lines
7.3 KiB
C
217 lines
7.3 KiB
C
/*
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* This file is part of the MicroPython project, http://micropython.org/
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*
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* The MIT License (MIT)
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*
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* Copyright (c) 2016 Scott Shawcroft for Adafruit Industries
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* Copyright (c) 2019 Artur Pacholec
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* Copyright (c) 2020 Lucian Copeland for Adafruit Industries
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#include "shared-bindings/microcontroller/__init__.h"
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#include "shared-bindings/microcontroller/Pin.h"
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STATIC bool claimed_pins[IOMUXC_SW_PAD_CTL_PAD_COUNT];
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STATIC bool never_reset_pins[IOMUXC_SW_PAD_CTL_PAD_COUNT];
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// Default is that no pins are forbidden to reset.
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MP_WEAK const mcu_pin_obj_t *mimxrt10xx_reset_forbidden_pins[] = {
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NULL,
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};
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STATIC bool _reset_forbidden(const mcu_pin_obj_t *pin) {
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const mcu_pin_obj_t **forbidden_pin = &mimxrt10xx_reset_forbidden_pins[0];
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while (*forbidden_pin) {
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if (pin == *forbidden_pin) {
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return true;
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}
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forbidden_pin++;
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}
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return false;
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}
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// There are two numbering systems used here:
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// IOMUXC index, used for iterating through pins and accessing reset information,
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// and GPIO port and number, used to store claimed and reset tagging. The two number
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// systems are not related and one cannot determine the other without a pin object
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void reset_all_pins(void) {
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for (uint8_t i = 0; i < IOMUXC_SW_PAD_CTL_PAD_COUNT; i++) {
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claimed_pins[i] = never_reset_pins[i];
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}
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for (uint8_t i = 0; i < IOMUXC_SW_PAD_CTL_PAD_COUNT; i++) {
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mcu_pin_obj_t *pin = mcu_pin_globals.map.table[i].value;
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if (never_reset_pins[pin->mux_idx]) {
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continue;
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}
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common_hal_reset_pin(pin);
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}
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}
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MP_WEAK bool mimxrt10xx_board_reset_pin_number(const mcu_pin_obj_t *pin) {
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return false;
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}
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// Since i.MX pins need extra register and reset information to reset properly,
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// resetting pins by number alone has been removed.
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void common_hal_reset_pin(const mcu_pin_obj_t *pin) {
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if (pin == NULL) {
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return;
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}
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if (_reset_forbidden(pin)) {
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return;
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}
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// Give the board a chance to reset the pin in a particular way, or not reset it at all.
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if (mimxrt10xx_board_reset_pin_number(pin)) {
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return;
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}
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disable_pin_change_interrupt(pin);
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never_reset_pins[pin->mux_idx] = false;
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claimed_pins[pin->mux_idx] = false;
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*(uint32_t *)pin->mux_reg = pin->mux_reset;
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*(uint32_t *)pin->cfg_reg = pin->pad_reset;
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}
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void common_hal_never_reset_pin(const mcu_pin_obj_t *pin) {
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if (pin == NULL) {
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return;
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}
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never_reset_pins[pin->mux_idx] = true;
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}
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bool common_hal_mcu_pin_is_free(const mcu_pin_obj_t *pin) {
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return !claimed_pins[pin->mux_idx];
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}
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uint8_t common_hal_mcu_pin_number(const mcu_pin_obj_t *pin) {
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return pin->mux_idx; // returns IOMUXC to align with pin table
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}
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void common_hal_mcu_pin_claim(const mcu_pin_obj_t *pin) {
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claimed_pins[pin->mux_idx] = true;
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}
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void claim_pin(const mcu_pin_obj_t *pin) {
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common_hal_mcu_pin_claim(pin);
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}
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void common_hal_mcu_pin_reset_number(uint8_t pin_no) {
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common_hal_reset_pin((mcu_pin_obj_t *)(mcu_pin_globals.map.table[pin_no].value));
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}
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/* Array of GPIO peripheral base address. */
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static GPIO_Type *const s_gpioBases[] = GPIO_BASE_PTRS;
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static uint32_t GPIO_GetInstance(GPIO_Type *base) {
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uint32_t instance;
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/* Find the instance index from base address mappings. */
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for (instance = 0U; instance < ARRAY_SIZE(s_gpioBases); instance++)
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{
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if (s_gpioBases[instance] == base) {
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break;
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}
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}
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assert(instance < ARRAY_SIZE(s_gpioBases));
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return instance;
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}
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/* to find IRQ based on GPIO */
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static const IRQn_Type low_irqs[] = GPIO_COMBINED_LOW_IRQS;
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static const IRQn_Type high_irqs[] = GPIO_COMBINED_HIGH_IRQS;
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typedef struct {
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gpio_change_interrupt_t *func;
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void *data;
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} pin_change_interrupt_data;
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volatile static pin_change_interrupt_data pcid[MP_ARRAY_SIZE(s_gpioBases)][32];
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void enable_pin_change_interrupt(const mcu_pin_obj_t *pin, gpio_change_interrupt_t func, void *data) {
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int instance = GPIO_GetInstance(pin->gpio);
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volatile pin_change_interrupt_data *pci = &pcid[instance][pin->number];
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common_hal_mcu_disable_interrupts();
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pci->data = data;
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pci->func = func;
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IRQn_Type irq = pin->number < 16 ? low_irqs[instance] : high_irqs[instance];
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if (irq != NotAvail_IRQn) {
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EnableIRQ(irq);
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}
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pin->gpio->IMR |= (1 << pin->number);
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common_hal_mcu_enable_interrupts();
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}
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void disable_pin_change_interrupt(const mcu_pin_obj_t *pin) {
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volatile pin_change_interrupt_data *pci = &pcid[GPIO_GetInstance(pin->gpio)][pin->number];
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common_hal_mcu_disable_interrupts();
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pin->gpio->IMR &= ~(1 << pin->number);
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pci->data = NULL;
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pci->func = NULL;
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pin->gpio->ISR = (1 << pin->number); // acknowledge any pending interrupt
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common_hal_mcu_enable_interrupts();
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}
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static void pin_change_interrupt_common(uint32_t isr, volatile pin_change_interrupt_data *pcr) {
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for (uint32_t i = 0; i < 32; i++) {
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if (isr & (1 << i)) {
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pin_change_interrupt_data cb = pcr[i];
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if (cb.func) {
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cb.func(cb.data);
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}
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}
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}
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}
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#define GPIO_INTERRUPT_HANDLER(name, ptr, instance, offset) \
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void name(void); \
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__attribute__((used)) void name(void) { \
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uint32_t isr = ptr->ISR; \
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ptr->ISR = isr; \
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pin_change_interrupt_common(isr, pcid[instance]); \
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}
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#if defined(GPIO1)
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GPIO_INTERRUPT_HANDLER(GPIO1_Combined_0_15_IRQHandler, GPIO1, 1, 0);
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GPIO_INTERRUPT_HANDLER(GPIO1_Combined_16_31_IRQHandler, GPIO1, 1, 16);
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#endif
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#if defined(GPIO2)
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GPIO_INTERRUPT_HANDLER(GPIO2_Combined_0_15_IRQHandler, GPIO2, 2, 0);
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GPIO_INTERRUPT_HANDLER(GPIO2_Combined_16_31_IRQHandler, GPIO2, 2, 16);
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#endif
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#if defined(GPIO3)
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GPIO_INTERRUPT_HANDLER(GPIO3_Combined_0_15_IRQHandler, GPIO3, 3, 0);
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GPIO_INTERRUPT_HANDLER(GPIO3_Combined_16_31_IRQHandler, GPIO3, 3, 16);
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#endif
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#if defined(GPIO4)
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GPIO_INTERRUPT_HANDLER(GPIO4_Combined_0_15_IRQHandler, GPIO4, 4, 0);
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GPIO_INTERRUPT_HANDLER(GPIO4_Combined_16_31_IRQHandler, GPIO4, 4, 16);
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#endif
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#if defined(GPIO5)
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GPIO_INTERRUPT_HANDLER(GPIO5_Combined_0_15_IRQHandler, GPIO5, 5, 0);
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GPIO_INTERRUPT_HANDLER(GPIO5_Combined_16_31_IRQHandler, GPIO5, 5, 16);
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#endif
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#if defined(GPIO6)
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GPIO_INTERRUPT_HANDLER(GPIO6_Combined_0_15_IRQHandler, GPIO6, 6, 0);
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GPIO_INTERRUPT_HANDLER(GPIO6_Combined_16_31_IRQHandler, GPIO6, 6, 16);
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#endif
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