604 lines
18 KiB
C
604 lines
18 KiB
C
/*
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* The MIT License (MIT)
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*
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* Copyright (c) 2021,2022 Renesas Electronics Corporation
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#include <stdio.h>
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#include <stdint.h>
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#include "hal_data.h"
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#include "ra_config.h"
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#include "ra_gpio.h"
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#include "ra_icu.h"
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#include "ra_int.h"
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#include "ra_timer.h"
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#include "ra_utils.h"
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#include "ra_i2c.h"
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#if !defined(RA_PRI_I2C)
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#define RA_PRI_I2C (8)
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#endif
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#if defined(__GNUC__)
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#pragma GCC diagnostic ignored "-Wunused-parameter"
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#pragma GCC diagnostic ignored "-Wconversion"
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#pragma GCC diagnostic ignored "-Wimplicit-function-declaration"
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#pragma GCC diagnostic ignored "-Wunused-variable"
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#endif
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extern volatile uint32_t uwTick;
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static const ra_af_pin_t scl_pins[] = {
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#if defined(RA4M1)
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{ AF_I2C, 0, P204 },
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{ AF_I2C, 0, P400 },
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{ AF_I2C, 0, P408 },
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{ AF_I2C, 1, P100 },
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{ AF_I2C, 1, P205 },
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#elif defined(RA4W1)
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{ AF_I2C, 0, P204 },
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{ AF_I2C, 1, P100 },
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{ AF_I2C, 1, P205 },
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#elif defined(RA6M1)
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{ AF_I2C, 0, P400 },
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{ AF_I2C, 0, P408 },
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{ AF_I2C, 1, P100 },
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{ AF_I2C, 1, P205 },
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#elif defined(RA6M2)
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{ AF_I2C, 0, P204 },
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{ AF_I2C, 0, P400 },
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{ AF_I2C, 0, P408 },
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{ AF_I2C, 1, P100 },
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{ AF_I2C, 1, P205 },
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{ AF_I2C, 2, P512 },
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#else
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#error "CMSIS MCU Series is not specified."
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#endif
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};
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#define SCL_PINS_SIZE sizeof(scl_pins) / sizeof(ra_af_pin_t)
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static const ra_af_pin_t sda_pins[] = {
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#if defined(RA4M1)
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{ AF_I2C, 0, P401 },
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{ AF_I2C, 0, P407 },
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{ AF_I2C, 1, P101 },
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{ AF_I2C, 1, P206 },
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#elif defined(RA4W1)
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{ AF_I2C, 0, P407 },
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{ AF_I2C, 1, P101 },
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{ AF_I2C, 1, P206 },
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#elif defined(RA6M1)
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{ AF_I2C, 0, P401 },
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{ AF_I2C, 0, P407 },
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{ AF_I2C, 1, P101 },
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{ AF_I2C, 1, P206 },
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#elif defined(RA6M2)
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{ AF_I2C, 0, P401 },
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{ AF_I2C, 0, P407 },
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{ AF_I2C, 1, P101 },
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{ AF_I2C, 1, P206 },
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{ AF_I2C, 2, P511 },
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#else
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#error "CMSIS MCU Series is not specified."
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#endif
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};
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#define SDA_PINS_SIZE sizeof(sda_pins) / sizeof(ra_af_pin_t)
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static const uint8_t ra_i2c_ch_to_rxirq[] = {
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#if defined(VECTOR_NUMBER_IIC0_RXI)
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VECTOR_NUMBER_IIC0_RXI,
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#else
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VECTOR_NUMBER_NONE,
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#endif
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#if defined(VECTOR_NUMBER_IIC1_RXI)
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VECTOR_NUMBER_IIC1_RXI,
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#else
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VECTOR_NUMBER_NONE,
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#endif
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#if defined(VECTOR_NUMBER_IIC2_RXI)
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VECTOR_NUMBER_IIC2_RXI,
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#else
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VECTOR_NUMBER_NONE,
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#endif
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};
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static const uint8_t ra_i2c_ch_to_txirq[] = {
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#if defined(VECTOR_NUMBER_IIC0_TXI)
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VECTOR_NUMBER_IIC0_TXI,
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#else
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VECTOR_NUMBER_NONE,
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#endif
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#if defined(VECTOR_NUMBER_IIC1_TXI)
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VECTOR_NUMBER_IIC1_TXI,
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#else
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VECTOR_NUMBER_NONE,
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#endif
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#if defined(VECTOR_NUMBER_IIC2_TXI)
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VECTOR_NUMBER_IIC2_TXI,
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#else
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VECTOR_NUMBER_NONE,
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#endif
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};
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static const uint8_t ra_i2c_ch_to_teirq[] = {
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#if defined(VECTOR_NUMBER_IIC0_TEI)
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VECTOR_NUMBER_IIC0_TEI,
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#else
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VECTOR_NUMBER_NONE,
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#endif
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#if defined(VECTOR_NUMBER_IIC1_TEI)
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VECTOR_NUMBER_IIC1_TEI,
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#else
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VECTOR_NUMBER_NONE,
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#endif
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#if defined(VECTOR_NUMBER_IIC2_TEI)
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VECTOR_NUMBER_IIC2_TEI,
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#else
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VECTOR_NUMBER_NONE,
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#endif
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};
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static const uint8_t ra_i2c_ch_to_erirq[] = {
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#if defined(VECTOR_NUMBER_IIC0_ERI)
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VECTOR_NUMBER_IIC0_ERI,
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#else
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VECTOR_NUMBER_NONE,
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#endif
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#if defined(VECTOR_NUMBER_IIC1_ERI)
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VECTOR_NUMBER_IIC1_ERI,
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#else
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VECTOR_NUMBER_NONE,
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#endif
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#if defined(VECTOR_NUMBER_IIC2_ERI)
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VECTOR_NUMBER_IIC2_ERI,
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#else
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VECTOR_NUMBER_NONE,
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#endif
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};
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static xaction_t *current_xaction;
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static xaction_unit_t *current_xaction_unit;
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static bool last_stop;
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static uint8_t pclk_div[8] = {
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1, 2, 4, 8, 16, 32, 64, 128
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};
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static uint32_t R_IIC0_Type_to_ch(R_IIC0_Type *i2c_inst) {
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if (i2c_inst == R_IIC2) {
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return 2; /* channel 2 */
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} else if (i2c_inst == R_IIC1) {
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return 1; /* channel 1 */
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} else {
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return 0; /* channel 0 */
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}
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}
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static R_IIC0_Type *ch_to_R_IIC0_Type(uint32_t ch) {
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if (ch == 2) {
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return R_IIC2;
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} else if (ch == 1) {
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return R_IIC1;
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} else {
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return R_IIC0;
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}
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}
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bool ra_i2c_find_af_ch(uint32_t scl, uint32_t sda, uint8_t *ch) {
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bool find = false;
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uint8_t scl_ch;
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uint8_t sda_ch;
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find = ra_af_find_ch((ra_af_pin_t *)&scl_pins, SCL_PINS_SIZE, scl, &scl_ch);
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if (find) {
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find = ra_af_find_ch((ra_af_pin_t *)&sda_pins, SDA_PINS_SIZE, sda, &sda_ch);
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if (find) {
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find = (scl_ch == sda_ch);
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if (find) {
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*ch = scl_ch;
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} else {
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*ch = 0;
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}
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}
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}
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return find;
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}
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static void ra_i2c_module_start(R_IIC0_Type *i2c_inst) {
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if (i2c_inst == R_IIC0) {
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ra_mstpcrb_start(R_MSTP_MSTPCRB_MSTPB9_Msk);
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} else if (i2c_inst == R_IIC1) {
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ra_mstpcrb_start(R_MSTP_MSTPCRB_MSTPB8_Msk);
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} else if (i2c_inst == R_IIC2) {
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ra_mstpcrb_start(R_MSTP_MSTPCRB_MSTPB7_Msk);
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}
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}
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static void ra_i2c_module_stop(R_IIC0_Type *i2c_inst) {
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if (i2c_inst == R_IIC0) {
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ra_mstpcrb_stop(R_MSTP_MSTPCRB_MSTPB9_Msk);
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} else if (i2c_inst == R_IIC1) {
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ra_mstpcrb_stop(R_MSTP_MSTPCRB_MSTPB8_Msk);
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} else if (i2c_inst == R_IIC2) {
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ra_mstpcrb_stop(R_MSTP_MSTPCRB_MSTPB7_Msk);
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}
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}
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void ra_i2c_irq_enable(R_IIC0_Type *i2c_inst) {
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uint32_t ch = R_IIC0_Type_to_ch(i2c_inst);
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R_BSP_IrqEnable((IRQn_Type const)ra_i2c_ch_to_rxirq[ch]);
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R_BSP_IrqEnable((IRQn_Type const)ra_i2c_ch_to_txirq[ch]);
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R_BSP_IrqEnable((IRQn_Type const)ra_i2c_ch_to_teirq[ch]);
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R_BSP_IrqEnable((IRQn_Type const)ra_i2c_ch_to_erirq[ch]);
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}
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void ra_i2c_irq_disable(R_IIC0_Type *i2c_inst) {
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uint32_t ch = R_IIC0_Type_to_ch(i2c_inst);
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R_BSP_IrqDisable((IRQn_Type const)ra_i2c_ch_to_rxirq[ch]);
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R_BSP_IrqDisable((IRQn_Type const)ra_i2c_ch_to_txirq[ch]);
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R_BSP_IrqDisable((IRQn_Type const)ra_i2c_ch_to_teirq[ch]);
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R_BSP_IrqDisable((IRQn_Type const)ra_i2c_ch_to_erirq[ch]);
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}
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void ra_i2c_priority(R_IIC0_Type *i2c_inst, uint32_t ipl) {
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uint32_t ch = R_IIC0_Type_to_ch(i2c_inst);
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R_BSP_IrqCfg((IRQn_Type const)ra_i2c_ch_to_rxirq[ch], ipl, (void *)NULL);
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R_BSP_IrqCfg((IRQn_Type const)ra_i2c_ch_to_txirq[ch], ipl, (void *)NULL);
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R_BSP_IrqCfg((IRQn_Type const)ra_i2c_ch_to_teirq[ch], ipl, (void *)NULL);
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R_BSP_IrqCfg((IRQn_Type const)ra_i2c_ch_to_erirq[ch], ipl, (void *)NULL);
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}
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void ra_i2c_clear_IR(R_IIC0_Type *i2c_inst) {
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uint32_t ch = R_IIC0_Type_to_ch(i2c_inst);
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R_BSP_IrqStatusClear((IRQn_Type const)ra_i2c_ch_to_rxirq[ch]);
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R_BSP_IrqStatusClear((IRQn_Type const)ra_i2c_ch_to_txirq[ch]);
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R_BSP_IrqStatusClear((IRQn_Type const)ra_i2c_ch_to_teirq[ch]);
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R_BSP_IrqStatusClear((IRQn_Type const)ra_i2c_ch_to_erirq[ch]);
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}
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// ToDo: need to properly implement
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static void ra_i2c_clock_calc(uint32_t baudrate, uint8_t *cks, uint8_t *brh, uint8_t *brl);
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static void ra_i2c_clock_calc(uint32_t baudrate, uint8_t *cks, uint8_t *brh, uint8_t *brl) {
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#if defined(RA4M1)
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if (baudrate >= 400000) {
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// assume clock is 400000Hz (PCLKB 32MHz)
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*cks = 1;
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*brh = 9;
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*brl = 20;
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} else {
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// assume clock is 100000Hz (PCLKB 32MHz)
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*cks = 3;
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*brh = 15;
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*brl = 18;
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}
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#elif defined(RA4W1)
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if (baudrate >= 400000) {
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// assume clock is 400000Hz (PCLKB 32MHz)
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*cks = 1;
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*brh = 9;
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*brl = 20;
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} else {
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// assume clock is 100000Hz (PCLKB 32MHz)
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*cks = 3;
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*brh = 15;
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*brl = 18;
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}
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#elif defined(RA6M1)
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// PCLKB 60MHz SCLE=0
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if (baudrate >= 1000000) {
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*cks = 0;
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*brh = 15;
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*brl = 29;
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} else if (baudrate >= 400000) {
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// assume clock is 400000Hz (PCLKB 32MHz)
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*cks = 2;
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*brh = 8;
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*brl = 19;
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} else {
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// assume clock is 100000Hz (PCLKB 32MHz)
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*cks = 4;
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*brh = 14;
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*brl = 17;
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}
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#elif defined(RA6M2)
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// PCLKB 60MHz SCLE=0
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if (baudrate >= RA_I2C_CLOCK_MAX) {
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*cks = 0;
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*brh = 15;
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*brl = 29;
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} else if (baudrate >= 400000) {
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// assume clock is 400000Hz
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*cks = 2;
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*brh = 8;
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*brl = 19;
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} else {
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// assume clock is 100000Hz
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*cks = 4;
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*brh = 14;
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*brl = 17;
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}
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#else
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#error "CMSIS MCU Series is not specified."
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#endif
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}
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void ra_i2c_set_baudrate(R_IIC0_Type *i2c_inst, uint32_t baudrate) {
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uint8_t cks;
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uint8_t brh;
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uint8_t brl;
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ra_i2c_clock_calc(baudrate, &cks, &brh, &brl);
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i2c_inst->ICMR1_b.CKS = cks;
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i2c_inst->ICBRH_b.BRH = brh;
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i2c_inst->ICBRL_b.BRL = brl;
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}
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void ra_i2c_init(R_IIC0_Type *i2c_inst, uint32_t scl, uint32_t sda, uint32_t baudrate) {
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ra_i2c_module_start(i2c_inst);
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ra_gpio_config(scl, GPIO_MODE_AF_OD, GPIO_NOPULL, GPIO_LOW_POWER, AF_I2C);
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ra_gpio_config(sda, GPIO_MODE_AF_OD, GPIO_NOPULL, GPIO_LOW_POWER, AF_I2C);
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ra_i2c_priority(i2c_inst, RA_PRI_I2C);
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i2c_inst->ICCR1_b.ICE = 0; // I2C disable
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i2c_inst->ICCR1_b.IICRST = 1; // I2C internal reset
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i2c_inst->ICIER = 0x00; // I2C disable all interrupts
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while (i2c_inst->ICIER != 0) {
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;
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}
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ra_i2c_clear_IR(i2c_inst); // clear IR
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i2c_inst->ICCR1_b.ICE = 1; // I2C enable
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ra_i2c_set_baudrate(i2c_inst, baudrate);
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i2c_inst->ICSER = 0x00; // I2C reset bus status enable register
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i2c_inst->ICMR3_b.ACKWP = 0x01; // I2C allow to write ACKBT (transfer acknowledge bit)
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i2c_inst->ICIER = 0xFF; // Enable all interrupts
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i2c_inst->ICCR1_b.IICRST = 0; // I2C internal reset
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ra_i2c_irq_enable(i2c_inst);
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last_stop = true;
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return;
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}
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void ra_i2c_deinit(R_IIC0_Type *i2c_inst) {
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i2c_inst->ICIER = 0; // I2C interrupt disable
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i2c_inst->ICCR1_b.ICE = 0; // I2C disable
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ra_i2c_module_stop(i2c_inst);
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return;
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}
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void ra_i2c_xaction_start(R_IIC0_Type *i2c_inst, xaction_t *action, bool repeated_start) {
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uint32_t timeout;
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if (last_stop == false) {
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i2c_inst->ICSR2_b.START = 0;
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i2c_inst->ICCR2_b.RS = 1;
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return; /* We still keep I2C bus */
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}
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timeout = RA_I2C_TIMEOUT_BUS_BUSY;
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while (i2c_inst->ICCR2_b.BBSY) {
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if (timeout-- == 0) {
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action->m_status = RA_I2C_STATUS_Stopped;
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action->m_error = RA_I2C_ERROR_BUSY;
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return;
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}
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}
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i2c_inst->ICCR2_b.ST = 1; // I2C start condition
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}
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void ra_i2c_xaction_stop() {
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last_stop = current_xaction->m_stop;
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}
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void ra_i2c_xunit_write_byte(R_IIC0_Type *i2c_inst, xaction_unit_t *unit) {
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i2c_inst->ICDRT = unit->buf[unit->m_bytes_transferred];
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++unit->m_bytes_transferred;
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--unit->m_bytes_transfer;
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}
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void ra_i2c_xunit_read_byte(R_IIC0_Type *i2c_inst, xaction_unit_t *unit) {
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uint8_t data = i2c_inst->ICDRR;
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unit->buf[unit->m_bytes_transferred] = data;
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++unit->m_bytes_transferred;
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--unit->m_bytes_transfer;
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}
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void ra_i2c_xunit_init(xaction_unit_t *unit, uint8_t *buf, uint32_t size, bool fread, void *next) {
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unit->m_bytes_transferred = 0;
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unit->m_bytes_transfer = size;
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unit->m_fread = fread;
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unit->buf = buf;
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unit->next = (void *)next;
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}
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void ra_i2c_xaction_init(xaction_t *action, xaction_unit_t *units, uint32_t size, uint32_t address, bool stop) {
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action->units = units;
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action->m_num_of_units = size;
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action->m_current = 0;
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action->m_address = (((address << 1) & 0xFE) | (units->m_fread ? 0x1 : 0x0));
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action->m_status = RA_I2C_STATUS_Idle;
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action->m_error = RA_I2C_ERROR_OK;
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action->m_stop = stop;
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}
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static void ra_i2c_iceri_isr(R_IIC0_Type *i2c_inst) {
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xaction_t *action = current_xaction;
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if (i2c_inst->ICSR2_b.TMOF != 0) {
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action->m_error = RA_I2C_ERROR_TMOF;
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i2c_inst->ICSR2_b.TMOF = 0;
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i2c_inst->ICCR2_b.SP = 1; // request stop condition
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}
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if (i2c_inst->ICSR2_b.AL != 0) {
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action->m_error = RA_I2C_ERROR_AL;
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i2c_inst->ICSR2_b.AL = 0;
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i2c_inst->ICCR2_b.SP = 1; // request stop condition
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}
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// Check Start
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if (i2c_inst->ICSR2_b.START != 0) {
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action->m_status = RA_I2C_STATUS_Started;
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i2c_inst->ICSR2_b.START = 0;
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}
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// Check Stop
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if (i2c_inst->ICSR2_b.STOP != 0) {
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action->m_status = RA_I2C_STATUS_Stopped;
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i2c_inst->ICSR2_b.STOP = 0;
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i2c_inst->ICSR2_b.NACKF = 0; // clear for next transaction
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}
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// Check NACK reception
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if (i2c_inst->ICSR2_b.NACKF != 0) {
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action->m_error = RA_I2C_ERROR_NACK;
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i2c_inst->ICSR2_b.NACKF = 0;
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i2c_inst->ICCR2_b.SP = 1; // request stop condition
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}
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}
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static void ra_i2c_icrxi_isr(R_IIC0_Type *i2c_inst) {
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xaction_unit_t *unit = current_xaction_unit;
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xaction_t *action = current_xaction;
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if (action->m_status == RA_I2C_STATUS_AddrWriteCompleted) {
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(void)i2c_inst->ICDRR; // dummy read
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action->m_status = RA_I2C_STATUS_FirstReceiveCompleted;
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return;
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}
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if (unit->m_bytes_transfer > 2) {
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if (unit->m_bytes_transfer == 3) {
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i2c_inst->ICMR3_b.WAIT = 1;
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}
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ra_i2c_xunit_read_byte(i2c_inst, unit);
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} else if (unit->m_bytes_transfer == 2) {
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i2c_inst->ICMR3_b.ACKBT = 1;
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ra_i2c_xunit_read_byte(i2c_inst, unit);
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} else {
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// last data
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action->m_status = RA_I2C_STATUS_LastReceiveCompleted;
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if (action->m_stop == true) {
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i2c_inst->ICCR2_b.SP = 1; // request top condition
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}
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ra_i2c_xunit_read_byte(i2c_inst, unit);
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}
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}
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static void ra_i2c_ictxi_isr(R_IIC0_Type *i2c_inst) {
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xaction_t *action = current_xaction;
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xaction_unit_t *unit = current_xaction_unit;
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if (action->m_status == RA_I2C_STATUS_Started) {
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i2c_inst->ICDRT = action->m_address; // I2C send slave address
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action->m_status = RA_I2C_STATUS_AddrWriteCompleted;
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return;
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}
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if (action->m_status == RA_I2C_STATUS_AddrWriteCompleted &&
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unit->m_fread == false) {
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if (unit->m_bytes_transfer != 0) {
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ra_i2c_xunit_write_byte(i2c_inst, unit);
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} else {
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if (unit->next == (void *)NULL) {
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action->m_status = RA_I2C_STATUS_DataWriteCompleted;
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} else {
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current_xaction_unit = (xaction_unit_t *)unit->next;
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if (current_xaction_unit->m_bytes_transfer == 0) {
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action->m_status = RA_I2C_STATUS_DataWriteCompleted;
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}
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}
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}
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return;
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}
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}
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static void ra_i2c_ictei_isr(R_IIC0_Type *i2c_inst) {
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xaction_t *action = current_xaction;
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i2c_inst->ICSR2_b.TEND = 0;
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action->m_current++;
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if (action->m_current == action->m_num_of_units) {
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// We wrote all data and received transfer end, so request stop condition
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if (action->m_stop == true) {
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action->m_status = RA_I2C_STATUS_DataSendCompleted;
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i2c_inst->ICCR2_b.SP = 1;
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} else {
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action->m_status = RA_I2C_STATUS_Stopped; // set Stopped status insted STOP condition
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}
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} else {
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ra_i2c_xaction_start(i2c_inst, action, true);
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}
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}
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void iic_master_rxi_isr(void) {
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IRQn_Type irq = R_FSP_CurrentIrqGet();
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uint8_t ch = irq_to_ch[(uint32_t)irq];
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ra_i2c_icrxi_isr(ch_to_R_IIC0_Type(ch));
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R_BSP_IrqStatusClear(irq);
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}
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|
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void iic_master_txi_isr(void) {
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IRQn_Type irq = R_FSP_CurrentIrqGet();
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uint8_t ch = irq_to_ch[(uint32_t)irq];
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ra_i2c_ictxi_isr(ch_to_R_IIC0_Type(ch));
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R_BSP_IrqStatusClear(irq);
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}
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void iic_master_tei_isr(void) {
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IRQn_Type irq = R_FSP_CurrentIrqGet();
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uint8_t ch = irq_to_ch[(uint32_t)irq];
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ra_i2c_ictei_isr(ch_to_R_IIC0_Type(ch));
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R_BSP_IrqStatusClear(irq);
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}
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|
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void iic_master_eri_isr(void) {
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IRQn_Type irq = R_FSP_CurrentIrqGet();
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uint8_t ch = irq_to_ch[(uint32_t)irq];
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ra_i2c_iceri_isr(ch_to_R_IIC0_Type(ch));
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R_BSP_IrqStatusClear(irq);
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}
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|
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bool ra_i2c_action_execute(R_IIC0_Type *i2c_inst, xaction_t *action, bool repeated_start, uint32_t timeout_ms) {
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bool flag = false;
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uint32_t start = uwTick;
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|
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current_xaction = action;
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current_xaction_unit = action->units;
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|
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ra_i2c_xaction_start(i2c_inst, action, repeated_start);
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while (true) {
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if (action->m_status == RA_I2C_STATUS_Stopped) {
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if (action->m_error == RA_I2C_ERROR_OK) {
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flag = true;
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}
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|
break;
|
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}
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if (uwTick - start > timeout_ms) {
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|
break;
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}
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}
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ra_i2c_xaction_stop();
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|
if (last_stop == true) {
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|
mp_hal_delay_ms(3); // avoid device busy of next access.
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|
}
|
|
current_xaction = (xaction_t *)NULL;
|
|
current_xaction_unit = (xaction_unit_t *)NULL;
|
|
|
|
return flag;
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|
}
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