75 lines
3.2 KiB
C
75 lines
3.2 KiB
C
/* generated pin source file - do not edit */
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#include "bsp_api.h"
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#include "r_ioport_api.h"
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const ioport_pin_cfg_t g_bsp_pin_cfg_data[] =
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{
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{ .pin = BSP_IO_PORT_01_PIN_00, .pin_cfg = ((uint32_t)IOPORT_CFG_PERIPHERAL_PIN
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| (uint32_t)IOPORT_PERIPHERAL_SPI) },
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{ .pin = BSP_IO_PORT_01_PIN_01, .pin_cfg = ((uint32_t)IOPORT_CFG_PERIPHERAL_PIN
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| (uint32_t)IOPORT_PERIPHERAL_SPI) },
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{ .pin = BSP_IO_PORT_01_PIN_02, .pin_cfg = ((uint32_t)IOPORT_CFG_PERIPHERAL_PIN
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| (uint32_t)IOPORT_PERIPHERAL_SPI) },
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{ .pin = BSP_IO_PORT_01_PIN_03, .pin_cfg = ((uint32_t)IOPORT_CFG_PORT_DIRECTION_OUTPUT
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| (uint32_t)IOPORT_CFG_PORT_OUTPUT_HIGH) },
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{ .pin = BSP_IO_PORT_01_PIN_06, .pin_cfg = ((uint32_t)IOPORT_CFG_PORT_DIRECTION_OUTPUT
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| (uint32_t)IOPORT_CFG_PORT_OUTPUT_HIGH) },
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{ .pin = BSP_IO_PORT_01_PIN_09, .pin_cfg = ((uint32_t)IOPORT_CFG_PERIPHERAL_PIN
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| (uint32_t)IOPORT_PERIPHERAL_SCI1_3_5_7_9) },
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{ .pin = BSP_IO_PORT_01_PIN_10, .pin_cfg = ((uint32_t)IOPORT_CFG_PERIPHERAL_PIN
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| (uint32_t)IOPORT_PERIPHERAL_SCI1_3_5_7_9) },
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{ .pin = BSP_IO_PORT_01_PIN_11, .pin_cfg = ((uint32_t)IOPORT_CFG_PORT_DIRECTION_OUTPUT
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| (uint32_t)IOPORT_CFG_PORT_OUTPUT_HIGH) },
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{ .pin = BSP_IO_PORT_02_PIN_04, .pin_cfg = ((uint32_t)IOPORT_CFG_PORT_DIRECTION_OUTPUT
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| (uint32_t)IOPORT_CFG_PORT_OUTPUT_HIGH) },
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{ .pin = BSP_IO_PORT_02_PIN_05, .pin_cfg = ((uint32_t)IOPORT_CFG_PERIPHERAL_PIN
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| (uint32_t)IOPORT_PERIPHERAL_SCI0_2_4_6_8) },
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{ .pin = BSP_IO_PORT_02_PIN_06, .pin_cfg = ((uint32_t)IOPORT_CFG_PERIPHERAL_PIN
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| (uint32_t)IOPORT_PERIPHERAL_SCI0_2_4_6_8) },
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{ .pin = BSP_IO_PORT_02_PIN_12, .pin_cfg = ((uint32_t)IOPORT_CFG_PERIPHERAL_PIN
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| (uint32_t)IOPORT_PERIPHERAL_SCI1_3_5_7_9) },
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{ .pin = BSP_IO_PORT_02_PIN_13, .pin_cfg = ((uint32_t)IOPORT_CFG_PERIPHERAL_PIN
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| (uint32_t)IOPORT_PERIPHERAL_SCI1_3_5_7_9) },
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{ .pin = BSP_IO_PORT_04_PIN_02, .pin_cfg = ((uint32_t)IOPORT_CFG_IRQ_ENABLE
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| (uint32_t)IOPORT_CFG_PORT_DIRECTION_INPUT) },
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{ .pin = BSP_IO_PORT_04_PIN_04, .pin_cfg = ((uint32_t)IOPORT_CFG_PORT_DIRECTION_OUTPUT
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| (uint32_t)IOPORT_CFG_PORT_OUTPUT_HIGH) },
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};
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const ioport_cfg_t g_bsp_pin_cfg =
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{ .number_of_pins = sizeof(g_bsp_pin_cfg_data) / sizeof(ioport_pin_cfg_t), .p_pin_cfg_data = &g_bsp_pin_cfg_data[0], };
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#if BSP_TZ_SECURE_BUILD
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void R_BSP_PinCfgSecurityInit(void);
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/* Initialize SAR registers for secure pins. */
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void R_BSP_PinCfgSecurityInit(void) {
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#if (2U == BSP_FEATURE_IOPORT_VERSION)
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uint32_t pmsar[BSP_FEATURE_BSP_NUM_PMSAR];
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#else
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uint16_t pmsar[BSP_FEATURE_BSP_NUM_PMSAR];
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#endif
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memset(pmsar, 0xFF, BSP_FEATURE_BSP_NUM_PMSAR * sizeof(R_PMISC->PMSAR[0]));
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for (uint32_t i = 0; i < g_bsp_pin_cfg.number_of_pins; i++)
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{
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uint32_t port_pin = g_bsp_pin_cfg.p_pin_cfg_data[i].pin;
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uint32_t port = port_pin >> 8U;
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uint32_t pin = port_pin & 0xFFU;
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pmsar[port] &= (uint16_t) ~(1U << pin);
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}
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for (uint32_t i = 0; i < BSP_FEATURE_BSP_NUM_PMSAR; i++)
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{
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#if (2U == BSP_FEATURE_IOPORT_VERSION)
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R_PMISC->PMSAR[i].PMSAR = (uint16_t)pmsar[i];
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#else
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R_PMISC->PMSAR[i].PMSAR = pmsar[i];
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#endif
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}
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}
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#endif
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