97 lines
2.8 KiB
C
97 lines
2.8 KiB
C
/*
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* This file is part of the MicroPython project, http://micropython.org/
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*
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* The MIT License (MIT)
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*
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* Copyright (c) 2018 Scott Shawcroft for Adafruit Industries
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#include "clocks.h"
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#include "hpl_gclk_config.h"
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#include "shared-bindings/microcontroller/__init__.h"
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#include "py/runtime.h"
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// TODO(tannewt): Should we have a way of sharing GCLKs based on their speed? Divisor doesn't
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// gaurantee speed because it depends on the source.
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uint8_t find_free_gclk(uint16_t divisor) {
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if (divisor > 0xff) {
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if (gclk_enabled(1)) {
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return 0xff;
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}
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return 1;
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}
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uint8_t first_8_bit = 2;
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#ifdef SAMD21
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first_8_bit = 3;
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if (divisor <= (1 << 5) && !gclk_enabled(2)) {
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return 2;
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}
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#endif
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for (uint8_t i = first_8_bit; i < GCLK_GEN_NUM; i++) {
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if (!gclk_enabled(i)) {
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return i;
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}
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}
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return 0xff;
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}
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void reset_gclks(void) {
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// Never reset GCLK0 because its used for the core
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#if CONF_GCLK_GEN_1_GENEN == 0
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disable_gclk(1);
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#endif
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#if CONF_GCLK_GEN_2_GENEN == 0
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disable_gclk(2);
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#endif
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#if CONF_GCLK_GEN_3_GENEN == 0
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disable_gclk(3);
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#endif
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#if CONF_GCLK_GEN_4_GENEN == 0
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disable_gclk(4);
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#endif
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#if CONF_GCLK_GEN_5_GENEN == 0
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disable_gclk(5);
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#endif
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#if CONF_GCLK_GEN_6_GENEN == 0
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disable_gclk(6);
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#endif
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#if CONF_GCLK_GEN_7_GENEN == 0
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disable_gclk(7);
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#endif
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#ifdef SAMD51
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#if CONF_GCLK_GEN_8_GENEN == 0
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disable_gclk(8);
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#endif
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#if CONF_GCLK_GEN_9_GENEN == 0
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disable_gclk(9);
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#endif
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#if CONF_GCLK_GEN_10_GENEN == 0
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disable_gclk(10);
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#endif
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#if CONF_GCLK_GEN_11_GENEN == 0
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disable_gclk(11);
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#endif
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#endif
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}
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