441 lines
26 KiB
C
441 lines
26 KiB
C
/* Copyright (c) 2016, Nordic Semiconductor ASA
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* * Redistributions of source code must retain the above copyright notice, this
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* list of conditions and the following disclaimer.
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*
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* * Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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*
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* * Neither the name of Nordic Semiconductor ASA nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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*/
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#ifndef NRF51_DEPRECATED_H
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#define NRF51_DEPRECATED_H
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/*lint ++flb "Enter library region */
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/* This file is given to prevent your SW from not compiling with the updates made to nrf51.h and
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* nrf51_bitfields.h. The macros defined in this file were available previously. Do not use these
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* macros on purpose. Use the ones defined in nrf51.h and nrf51_bitfields.h instead.
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*/
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/* NVMC */
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/* The register ERASEPROTECTEDPAGE is called ERASEPCR0 in the documentation. */
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#define ERASEPROTECTEDPAGE ERASEPCR0
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/* LPCOMP */
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/* The interrupt ISR was renamed. Adding old name to the macros. */
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#define LPCOMP_COMP_IRQHandler LPCOMP_IRQHandler
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#define LPCOMP_COMP_IRQn LPCOMP_IRQn
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/* Corrected typo in RESULT register. */
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#define LPCOMP_RESULT_RESULT_Bellow LPCOMP_RESULT_RESULT_Below
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/* MPU */
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/* The field MPU.PERR0.LPCOMP_COMP was renamed. Added into deprecated in case somebody was using the macros defined for it. */
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#define MPU_PERR0_LPCOMP_COMP_Pos MPU_PERR0_LPCOMP_Pos
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#define MPU_PERR0_LPCOMP_COMP_Msk MPU_PERR0_LPCOMP_Msk
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#define MPU_PERR0_LPCOMP_COMP_InRegion1 MPU_PERR0_LPCOMP_InRegion1
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#define MPU_PERR0_LPCOMP_COMP_InRegion0 MPU_PERR0_LPCOMP_InRegion0
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/* POWER */
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/* The field POWER.RAMON.OFFRAM3 was eliminated. Added into deprecated in case somebody was using the macros defined for it. */
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#define POWER_RAMON_OFFRAM3_Pos (19UL)
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#define POWER_RAMON_OFFRAM3_Msk (0x1UL << POWER_RAMON_OFFRAM3_Pos)
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#define POWER_RAMON_OFFRAM3_RAM3Off (0UL)
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#define POWER_RAMON_OFFRAM3_RAM3On (1UL)
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/* The field POWER.RAMON.OFFRAM2 was eliminated. Added into deprecated in case somebody was using the macros defined for it. */
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#define POWER_RAMON_OFFRAM2_Pos (18UL)
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#define POWER_RAMON_OFFRAM2_Msk (0x1UL << POWER_RAMON_OFFRAM2_Pos)
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#define POWER_RAMON_OFFRAM2_RAM2Off (0UL)
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#define POWER_RAMON_OFFRAM2_RAM2On (1UL)
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/* The field POWER.RAMON.ONRAM3 was eliminated. Added into deprecated in case somebody was using the macros defined for it. */
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#define POWER_RAMON_ONRAM3_Pos (3UL)
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#define POWER_RAMON_ONRAM3_Msk (0x1UL << POWER_RAMON_ONRAM3_Pos)
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#define POWER_RAMON_ONRAM3_RAM3Off (0UL)
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#define POWER_RAMON_ONRAM3_RAM3On (1UL)
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/* The field POWER.RAMON.ONRAM2 was eliminated. Added into deprecated in case somebody was using the macros defined for it. */
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#define POWER_RAMON_ONRAM2_Pos (2UL)
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#define POWER_RAMON_ONRAM2_Msk (0x1UL << POWER_RAMON_ONRAM2_Pos)
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#define POWER_RAMON_ONRAM2_RAM2Off (0UL)
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#define POWER_RAMON_ONRAM2_RAM2On (1UL)
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/* RADIO */
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/* The enumerated value RADIO.TXPOWER.TXPOWER.Neg40dBm was renamed. Added into deprecated with the new macro name. */
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#define RADIO_TXPOWER_TXPOWER_Neg40dBm RADIO_TXPOWER_TXPOWER_Neg30dBm
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/* The name of the field SKIPADDR was corrected. Old macros added for compatibility. */
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#define RADIO_CRCCNF_SKIP_ADDR_Pos RADIO_CRCCNF_SKIPADDR_Pos
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#define RADIO_CRCCNF_SKIP_ADDR_Msk RADIO_CRCCNF_SKIPADDR_Msk
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#define RADIO_CRCCNF_SKIP_ADDR_Include RADIO_CRCCNF_SKIPADDR_Include
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#define RADIO_CRCCNF_SKIP_ADDR_Skip RADIO_CRCCNF_SKIPADDR_Skip
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/* The name of the field PLLLOCK was corrected. Old macros added for compatibility. */
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#define RADIO_TEST_PLL_LOCK_Pos RADIO_TEST_PLLLOCK_Pos
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#define RADIO_TEST_PLL_LOCK_Msk RADIO_TEST_PLLLOCK_Msk
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#define RADIO_TEST_PLL_LOCK_Disabled RADIO_TEST_PLLLOCK_Disabled
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#define RADIO_TEST_PLL_LOCK_Enabled RADIO_TEST_PLLLOCK_Enabled
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/* The name of the field CONSTCARRIER was corrected. Old macros added for compatibility. */
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#define RADIO_TEST_CONST_CARRIER_Pos RADIO_TEST_CONSTCARRIER_Pos
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#define RADIO_TEST_CONST_CARRIER_Msk RADIO_TEST_CONSTCARRIER_Msk
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#define RADIO_TEST_CONST_CARRIER_Disabled RADIO_TEST_CONSTCARRIER_Disabled
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#define RADIO_TEST_CONST_CARRIER_Enabled RADIO_TEST_CONSTCARRIER_Enabled
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/* FICR */
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/* The registers FICR.SIZERAMBLOCK0, FICR.SIZERAMBLOCK1, FICR.SIZERAMBLOCK2 and FICR.SIZERAMBLOCK3 were renamed into an array. */
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#define SIZERAMBLOCK0 SIZERAMBLOCKS
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#define SIZERAMBLOCK1 SIZERAMBLOCKS
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#define SIZERAMBLOCK2 SIZERAMBLOCK[2] /*!< Note that this macro will disapear when SIZERAMBLOCK array is eliminated. SIZERAMBLOCK is a deprecated array. */
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#define SIZERAMBLOCK3 SIZERAMBLOCK[3] /*!< Note that this macro will disapear when SIZERAMBLOCK array is eliminated. SIZERAMBLOCK is a deprecated array. */
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/* The registers FICR.DEVICEID0 and FICR.DEVICEID1 were renamed into an array. */
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#define DEVICEID0 DEVICEID[0]
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#define DEVICEID1 DEVICEID[1]
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/* The registers FICR.ER0, FICR.ER1, FICR.ER2 and FICR.ER3 were renamed into an array. */
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#define ER0 ER[0]
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#define ER1 ER[1]
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#define ER2 ER[2]
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#define ER3 ER[3]
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/* The registers FICR.IR0, FICR.IR1, FICR.IR2 and FICR.IR3 were renamed into an array. */
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#define IR0 IR[0]
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#define IR1 IR[1]
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#define IR2 IR[2]
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#define IR3 IR[3]
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/* The registers FICR.DEVICEADDR0 and FICR.DEVICEADDR1 were renamed into an array. */
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#define DEVICEADDR0 DEVICEADDR[0]
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#define DEVICEADDR1 DEVICEADDR[1]
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/* PPI */
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/* The tasks PPI.TASKS_CHGxEN and PPI.TASKS_CHGxDIS were renamed into an array of structs. */
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#define TASKS_CHG0EN TASKS_CHG[0].EN
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#define TASKS_CHG0DIS TASKS_CHG[0].DIS
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#define TASKS_CHG1EN TASKS_CHG[1].EN
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#define TASKS_CHG1DIS TASKS_CHG[1].DIS
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#define TASKS_CHG2EN TASKS_CHG[2].EN
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#define TASKS_CHG2DIS TASKS_CHG[2].DIS
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#define TASKS_CHG3EN TASKS_CHG[3].EN
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#define TASKS_CHG3DIS TASKS_CHG[3].DIS
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/* The registers PPI.CHx_EEP and PPI.CHx_TEP were renamed into an array of structs. */
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#define CH0_EEP CH[0].EEP
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#define CH0_TEP CH[0].TEP
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#define CH1_EEP CH[1].EEP
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#define CH1_TEP CH[1].TEP
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#define CH2_EEP CH[2].EEP
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#define CH2_TEP CH[2].TEP
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#define CH3_EEP CH[3].EEP
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#define CH3_TEP CH[3].TEP
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#define CH4_EEP CH[4].EEP
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#define CH4_TEP CH[4].TEP
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#define CH5_EEP CH[5].EEP
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#define CH5_TEP CH[5].TEP
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#define CH6_EEP CH[6].EEP
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#define CH6_TEP CH[6].TEP
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#define CH7_EEP CH[7].EEP
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#define CH7_TEP CH[7].TEP
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#define CH8_EEP CH[8].EEP
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#define CH8_TEP CH[8].TEP
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#define CH9_EEP CH[9].EEP
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#define CH9_TEP CH[9].TEP
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#define CH10_EEP CH[10].EEP
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#define CH10_TEP CH[10].TEP
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#define CH11_EEP CH[11].EEP
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#define CH11_TEP CH[11].TEP
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#define CH12_EEP CH[12].EEP
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#define CH12_TEP CH[12].TEP
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#define CH13_EEP CH[13].EEP
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#define CH13_TEP CH[13].TEP
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#define CH14_EEP CH[14].EEP
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#define CH14_TEP CH[14].TEP
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#define CH15_EEP CH[15].EEP
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#define CH15_TEP CH[15].TEP
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/* The registers PPI.CHG0, PPI.CHG1, PPI.CHG2 and PPI.CHG3 were renamed into an array. */
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#define CHG0 CHG[0]
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#define CHG1 CHG[1]
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#define CHG2 CHG[2]
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#define CHG3 CHG[3]
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/* All bitfield macros for the CHGx registers therefore changed name. */
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#define PPI_CHG0_CH15_Pos PPI_CHG_CH15_Pos
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#define PPI_CHG0_CH15_Msk PPI_CHG_CH15_Msk
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#define PPI_CHG0_CH15_Excluded PPI_CHG_CH15_Excluded
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#define PPI_CHG0_CH15_Included PPI_CHG_CH15_Included
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#define PPI_CHG0_CH14_Pos PPI_CHG_CH14_Pos
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#define PPI_CHG0_CH14_Msk PPI_CHG_CH14_Msk
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#define PPI_CHG0_CH14_Excluded PPI_CHG_CH14_Excluded
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#define PPI_CHG0_CH14_Included PPI_CHG_CH14_Included
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#define PPI_CHG0_CH13_Pos PPI_CHG_CH13_Pos
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#define PPI_CHG0_CH13_Msk PPI_CHG_CH13_Msk
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#define PPI_CHG0_CH13_Excluded PPI_CHG_CH13_Excluded
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#define PPI_CHG0_CH13_Included PPI_CHG_CH13_Included
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#define PPI_CHG0_CH12_Pos PPI_CHG_CH12_Pos
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#define PPI_CHG0_CH12_Msk PPI_CHG_CH12_Msk
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#define PPI_CHG0_CH12_Excluded PPI_CHG_CH12_Excluded
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#define PPI_CHG0_CH12_Included PPI_CHG_CH12_Included
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#define PPI_CHG0_CH11_Pos PPI_CHG_CH11_Pos
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#define PPI_CHG0_CH11_Msk PPI_CHG_CH11_Msk
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#define PPI_CHG0_CH11_Excluded PPI_CHG_CH11_Excluded
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#define PPI_CHG0_CH11_Included PPI_CHG_CH11_Included
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#define PPI_CHG0_CH10_Pos PPI_CHG_CH10_Pos
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#define PPI_CHG0_CH10_Msk PPI_CHG_CH10_Msk
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#define PPI_CHG0_CH10_Excluded PPI_CHG_CH10_Excluded
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#define PPI_CHG0_CH10_Included PPI_CHG_CH10_Included
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#define PPI_CHG0_CH9_Pos PPI_CHG_CH9_Pos
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#define PPI_CHG0_CH9_Msk PPI_CHG_CH9_Msk
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#define PPI_CHG0_CH9_Excluded PPI_CHG_CH9_Excluded
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#define PPI_CHG0_CH9_Included PPI_CHG_CH9_Included
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#define PPI_CHG0_CH8_Pos PPI_CHG_CH8_Pos
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#define PPI_CHG0_CH8_Msk PPI_CHG_CH8_Msk
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#define PPI_CHG0_CH8_Excluded PPI_CHG_CH8_Excluded
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#define PPI_CHG0_CH8_Included PPI_CHG_CH8_Included
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#define PPI_CHG0_CH7_Pos PPI_CHG_CH7_Pos
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#define PPI_CHG0_CH7_Msk PPI_CHG_CH7_Msk
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#define PPI_CHG0_CH7_Excluded PPI_CHG_CH7_Excluded
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#define PPI_CHG0_CH7_Included PPI_CHG_CH7_Included
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#define PPI_CHG0_CH6_Pos PPI_CHG_CH6_Pos
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#define PPI_CHG0_CH6_Msk PPI_CHG_CH6_Msk
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#define PPI_CHG0_CH6_Excluded PPI_CHG_CH6_Excluded
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#define PPI_CHG0_CH6_Included PPI_CHG_CH6_Included
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#define PPI_CHG0_CH5_Pos PPI_CHG_CH5_Pos
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#define PPI_CHG0_CH5_Msk PPI_CHG_CH5_Msk
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#define PPI_CHG0_CH5_Excluded PPI_CHG_CH5_Excluded
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#define PPI_CHG0_CH5_Included PPI_CHG_CH5_Included
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#define PPI_CHG0_CH4_Pos PPI_CHG_CH4_Pos
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#define PPI_CHG0_CH4_Msk PPI_CHG_CH4_Msk
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#define PPI_CHG0_CH4_Excluded PPI_CHG_CH4_Excluded
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#define PPI_CHG0_CH4_Included PPI_CHG_CH4_Included
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#define PPI_CHG0_CH3_Pos PPI_CHG_CH3_Pos
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#define PPI_CHG0_CH3_Msk PPI_CHG_CH3_Msk
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#define PPI_CHG0_CH3_Excluded PPI_CHG_CH3_Excluded
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#define PPI_CHG0_CH3_Included PPI_CHG_CH3_Included
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#define PPI_CHG0_CH2_Pos PPI_CHG_CH2_Pos
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#define PPI_CHG0_CH2_Msk PPI_CHG_CH2_Msk
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#define PPI_CHG0_CH2_Excluded PPI_CHG_CH2_Excluded
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#define PPI_CHG0_CH2_Included PPI_CHG_CH2_Included
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#define PPI_CHG0_CH1_Pos PPI_CHG_CH1_Pos
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#define PPI_CHG0_CH1_Msk PPI_CHG_CH1_Msk
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#define PPI_CHG0_CH1_Excluded PPI_CHG_CH1_Excluded
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#define PPI_CHG0_CH1_Included PPI_CHG_CH1_Included
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#define PPI_CHG0_CH0_Pos PPI_CHG_CH0_Pos
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#define PPI_CHG0_CH0_Msk PPI_CHG_CH0_Msk
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#define PPI_CHG0_CH0_Excluded PPI_CHG_CH0_Excluded
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#define PPI_CHG0_CH0_Included PPI_CHG_CH0_Included
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#define PPI_CHG1_CH15_Pos PPI_CHG_CH15_Pos
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#define PPI_CHG1_CH15_Msk PPI_CHG_CH15_Msk
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#define PPI_CHG1_CH15_Excluded PPI_CHG_CH15_Excluded
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#define PPI_CHG1_CH15_Included PPI_CHG_CH15_Included
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#define PPI_CHG1_CH14_Pos PPI_CHG_CH14_Pos
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#define PPI_CHG1_CH14_Msk PPI_CHG_CH14_Msk
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#define PPI_CHG1_CH14_Excluded PPI_CHG_CH14_Excluded
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#define PPI_CHG1_CH14_Included PPI_CHG_CH14_Included
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#define PPI_CHG1_CH13_Pos PPI_CHG_CH13_Pos
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#define PPI_CHG1_CH13_Msk PPI_CHG_CH13_Msk
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#define PPI_CHG1_CH13_Excluded PPI_CHG_CH13_Excluded
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#define PPI_CHG1_CH13_Included PPI_CHG_CH13_Included
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#define PPI_CHG1_CH12_Pos PPI_CHG_CH12_Pos
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#define PPI_CHG1_CH12_Msk PPI_CHG_CH12_Msk
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#define PPI_CHG1_CH12_Excluded PPI_CHG_CH12_Excluded
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#define PPI_CHG1_CH12_Included PPI_CHG_CH12_Included
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#define PPI_CHG1_CH11_Pos PPI_CHG_CH11_Pos
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#define PPI_CHG1_CH11_Msk PPI_CHG_CH11_Msk
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#define PPI_CHG1_CH11_Excluded PPI_CHG_CH11_Excluded
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#define PPI_CHG1_CH11_Included PPI_CHG_CH11_Included
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#define PPI_CHG1_CH10_Pos PPI_CHG_CH10_Pos
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#define PPI_CHG1_CH10_Msk PPI_CHG_CH10_Msk
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#define PPI_CHG1_CH10_Excluded PPI_CHG_CH10_Excluded
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#define PPI_CHG1_CH10_Included PPI_CHG_CH10_Included
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#define PPI_CHG1_CH9_Pos PPI_CHG_CH9_Pos
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#define PPI_CHG1_CH9_Msk PPI_CHG_CH9_Msk
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#define PPI_CHG1_CH9_Excluded PPI_CHG_CH9_Excluded
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#define PPI_CHG1_CH9_Included PPI_CHG_CH9_Included
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#define PPI_CHG1_CH8_Pos PPI_CHG_CH8_Pos
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#define PPI_CHG1_CH8_Msk PPI_CHG_CH8_Msk
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#define PPI_CHG1_CH8_Excluded PPI_CHG_CH8_Excluded
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#define PPI_CHG1_CH8_Included PPI_CHG_CH8_Included
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#define PPI_CHG1_CH7_Pos PPI_CHG_CH7_Pos
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#define PPI_CHG1_CH7_Msk PPI_CHG_CH7_Msk
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#define PPI_CHG1_CH7_Excluded PPI_CHG_CH7_Excluded
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#define PPI_CHG1_CH7_Included PPI_CHG_CH7_Included
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#define PPI_CHG1_CH6_Pos PPI_CHG_CH6_Pos
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#define PPI_CHG1_CH6_Msk PPI_CHG_CH6_Msk
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#define PPI_CHG1_CH6_Excluded PPI_CHG_CH6_Excluded
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#define PPI_CHG1_CH6_Included PPI_CHG_CH6_Included
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#define PPI_CHG1_CH5_Pos PPI_CHG_CH5_Pos
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#define PPI_CHG1_CH5_Msk PPI_CHG_CH5_Msk
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#define PPI_CHG1_CH5_Excluded PPI_CHG_CH5_Excluded
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#define PPI_CHG1_CH5_Included PPI_CHG_CH5_Included
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#define PPI_CHG1_CH4_Pos PPI_CHG_CH4_Pos
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#define PPI_CHG1_CH4_Msk PPI_CHG_CH4_Msk
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#define PPI_CHG1_CH4_Excluded PPI_CHG_CH4_Excluded
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#define PPI_CHG1_CH4_Included PPI_CHG_CH4_Included
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#define PPI_CHG1_CH3_Pos PPI_CHG_CH3_Pos
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#define PPI_CHG1_CH3_Msk PPI_CHG_CH3_Msk
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#define PPI_CHG1_CH3_Excluded PPI_CHG_CH3_Excluded
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#define PPI_CHG1_CH3_Included PPI_CHG_CH3_Included
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#define PPI_CHG1_CH2_Pos PPI_CHG_CH2_Pos
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#define PPI_CHG1_CH2_Msk PPI_CHG_CH2_Msk
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#define PPI_CHG1_CH2_Excluded PPI_CHG_CH2_Excluded
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#define PPI_CHG1_CH2_Included PPI_CHG_CH2_Included
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#define PPI_CHG1_CH1_Pos PPI_CHG_CH1_Pos
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#define PPI_CHG1_CH1_Msk PPI_CHG_CH1_Msk
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#define PPI_CHG1_CH1_Excluded PPI_CHG_CH1_Excluded
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#define PPI_CHG1_CH1_Included PPI_CHG_CH1_Included
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#define PPI_CHG1_CH0_Pos PPI_CHG_CH0_Pos
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#define PPI_CHG1_CH0_Msk PPI_CHG_CH0_Msk
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#define PPI_CHG1_CH0_Excluded PPI_CHG_CH0_Excluded
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#define PPI_CHG1_CH0_Included PPI_CHG_CH0_Included
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#define PPI_CHG2_CH15_Pos PPI_CHG_CH15_Pos
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#define PPI_CHG2_CH15_Msk PPI_CHG_CH15_Msk
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#define PPI_CHG2_CH15_Excluded PPI_CHG_CH15_Excluded
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#define PPI_CHG2_CH15_Included PPI_CHG_CH15_Included
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#define PPI_CHG2_CH14_Pos PPI_CHG_CH14_Pos
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#define PPI_CHG2_CH14_Msk PPI_CHG_CH14_Msk
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#define PPI_CHG2_CH14_Excluded PPI_CHG_CH14_Excluded
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#define PPI_CHG2_CH14_Included PPI_CHG_CH14_Included
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#define PPI_CHG2_CH13_Pos PPI_CHG_CH13_Pos
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#define PPI_CHG2_CH13_Msk PPI_CHG_CH13_Msk
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#define PPI_CHG2_CH13_Excluded PPI_CHG_CH13_Excluded
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#define PPI_CHG2_CH13_Included PPI_CHG_CH13_Included
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#define PPI_CHG2_CH12_Pos PPI_CHG_CH12_Pos
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#define PPI_CHG2_CH12_Msk PPI_CHG_CH12_Msk
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#define PPI_CHG2_CH12_Excluded PPI_CHG_CH12_Excluded
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#define PPI_CHG2_CH12_Included PPI_CHG_CH12_Included
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#define PPI_CHG2_CH11_Pos PPI_CHG_CH11_Pos
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#define PPI_CHG2_CH11_Msk PPI_CHG_CH11_Msk
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#define PPI_CHG2_CH11_Excluded PPI_CHG_CH11_Excluded
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#define PPI_CHG2_CH11_Included PPI_CHG_CH11_Included
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#define PPI_CHG2_CH10_Pos PPI_CHG_CH10_Pos
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#define PPI_CHG2_CH10_Msk PPI_CHG_CH10_Msk
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#define PPI_CHG2_CH10_Excluded PPI_CHG_CH10_Excluded
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#define PPI_CHG2_CH10_Included PPI_CHG_CH10_Included
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#define PPI_CHG2_CH9_Pos PPI_CHG_CH9_Pos
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#define PPI_CHG2_CH9_Msk PPI_CHG_CH9_Msk
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#define PPI_CHG2_CH9_Excluded PPI_CHG_CH9_Excluded
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#define PPI_CHG2_CH9_Included PPI_CHG_CH9_Included
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#define PPI_CHG2_CH8_Pos PPI_CHG_CH8_Pos
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#define PPI_CHG2_CH8_Msk PPI_CHG_CH8_Msk
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#define PPI_CHG2_CH8_Excluded PPI_CHG_CH8_Excluded
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#define PPI_CHG2_CH8_Included PPI_CHG_CH8_Included
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#define PPI_CHG2_CH7_Pos PPI_CHG_CH7_Pos
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#define PPI_CHG2_CH7_Msk PPI_CHG_CH7_Msk
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#define PPI_CHG2_CH7_Excluded PPI_CHG_CH7_Excluded
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#define PPI_CHG2_CH7_Included PPI_CHG_CH7_Included
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#define PPI_CHG2_CH6_Pos PPI_CHG_CH6_Pos
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#define PPI_CHG2_CH6_Msk PPI_CHG_CH6_Msk
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#define PPI_CHG2_CH6_Excluded PPI_CHG_CH6_Excluded
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#define PPI_CHG2_CH6_Included PPI_CHG_CH6_Included
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#define PPI_CHG2_CH5_Pos PPI_CHG_CH5_Pos
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#define PPI_CHG2_CH5_Msk PPI_CHG_CH5_Msk
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#define PPI_CHG2_CH5_Excluded PPI_CHG_CH5_Excluded
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#define PPI_CHG2_CH5_Included PPI_CHG_CH5_Included
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#define PPI_CHG2_CH4_Pos PPI_CHG_CH4_Pos
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#define PPI_CHG2_CH4_Msk PPI_CHG_CH4_Msk
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#define PPI_CHG2_CH4_Excluded PPI_CHG_CH4_Excluded
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#define PPI_CHG2_CH4_Included PPI_CHG_CH4_Included
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#define PPI_CHG2_CH3_Pos PPI_CHG_CH3_Pos
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#define PPI_CHG2_CH3_Msk PPI_CHG_CH3_Msk
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#define PPI_CHG2_CH3_Excluded PPI_CHG_CH3_Excluded
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#define PPI_CHG2_CH3_Included PPI_CHG_CH3_Included
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#define PPI_CHG2_CH2_Pos PPI_CHG_CH2_Pos
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#define PPI_CHG2_CH2_Msk PPI_CHG_CH2_Msk
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#define PPI_CHG2_CH2_Excluded PPI_CHG_CH2_Excluded
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#define PPI_CHG2_CH2_Included PPI_CHG_CH2_Included
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#define PPI_CHG2_CH1_Pos PPI_CHG_CH1_Pos
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#define PPI_CHG2_CH1_Msk PPI_CHG_CH1_Msk
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#define PPI_CHG2_CH1_Excluded PPI_CHG_CH1_Excluded
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#define PPI_CHG2_CH1_Included PPI_CHG_CH1_Included
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#define PPI_CHG2_CH0_Pos PPI_CHG_CH0_Pos
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#define PPI_CHG2_CH0_Msk PPI_CHG_CH0_Msk
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#define PPI_CHG2_CH0_Excluded PPI_CHG_CH0_Excluded
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#define PPI_CHG2_CH0_Included PPI_CHG_CH0_Included
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#define PPI_CHG3_CH15_Pos PPI_CHG_CH15_Pos
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#define PPI_CHG3_CH15_Msk PPI_CHG_CH15_Msk
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#define PPI_CHG3_CH15_Excluded PPI_CHG_CH15_Excluded
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#define PPI_CHG3_CH15_Included PPI_CHG_CH15_Included
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#define PPI_CHG3_CH14_Pos PPI_CHG_CH14_Pos
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#define PPI_CHG3_CH14_Msk PPI_CHG_CH14_Msk
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#define PPI_CHG3_CH14_Excluded PPI_CHG_CH14_Excluded
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#define PPI_CHG3_CH14_Included PPI_CHG_CH14_Included
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#define PPI_CHG3_CH13_Pos PPI_CHG_CH13_Pos
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#define PPI_CHG3_CH13_Msk PPI_CHG_CH13_Msk
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#define PPI_CHG3_CH13_Excluded PPI_CHG_CH13_Excluded
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#define PPI_CHG3_CH13_Included PPI_CHG_CH13_Included
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#define PPI_CHG3_CH12_Pos PPI_CHG_CH12_Pos
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#define PPI_CHG3_CH12_Msk PPI_CHG_CH12_Msk
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#define PPI_CHG3_CH12_Excluded PPI_CHG_CH12_Excluded
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#define PPI_CHG3_CH12_Included PPI_CHG_CH12_Included
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#define PPI_CHG3_CH11_Pos PPI_CHG_CH11_Pos
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#define PPI_CHG3_CH11_Msk PPI_CHG_CH11_Msk
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#define PPI_CHG3_CH11_Excluded PPI_CHG_CH11_Excluded
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#define PPI_CHG3_CH11_Included PPI_CHG_CH11_Included
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#define PPI_CHG3_CH10_Pos PPI_CHG_CH10_Pos
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#define PPI_CHG3_CH10_Msk PPI_CHG_CH10_Msk
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#define PPI_CHG3_CH10_Excluded PPI_CHG_CH10_Excluded
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#define PPI_CHG3_CH10_Included PPI_CHG_CH10_Included
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#define PPI_CHG3_CH9_Pos PPI_CHG_CH9_Pos
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#define PPI_CHG3_CH9_Msk PPI_CHG_CH9_Msk
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#define PPI_CHG3_CH9_Excluded PPI_CHG_CH9_Excluded
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#define PPI_CHG3_CH9_Included PPI_CHG_CH9_Included
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#define PPI_CHG3_CH8_Pos PPI_CHG_CH8_Pos
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#define PPI_CHG3_CH8_Msk PPI_CHG_CH8_Msk
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#define PPI_CHG3_CH8_Excluded PPI_CHG_CH8_Excluded
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#define PPI_CHG3_CH8_Included PPI_CHG_CH8_Included
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#define PPI_CHG3_CH7_Pos PPI_CHG_CH7_Pos
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#define PPI_CHG3_CH7_Msk PPI_CHG_CH7_Msk
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#define PPI_CHG3_CH7_Excluded PPI_CHG_CH7_Excluded
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#define PPI_CHG3_CH7_Included PPI_CHG_CH7_Included
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#define PPI_CHG3_CH6_Pos PPI_CHG_CH6_Pos
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#define PPI_CHG3_CH6_Msk PPI_CHG_CH6_Msk
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#define PPI_CHG3_CH6_Excluded PPI_CHG_CH6_Excluded
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#define PPI_CHG3_CH6_Included PPI_CHG_CH6_Included
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#define PPI_CHG3_CH5_Pos PPI_CHG_CH5_Pos
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#define PPI_CHG3_CH5_Msk PPI_CHG_CH5_Msk
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#define PPI_CHG3_CH5_Excluded PPI_CHG_CH5_Excluded
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#define PPI_CHG3_CH5_Included PPI_CHG_CH5_Included
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#define PPI_CHG3_CH4_Pos PPI_CHG_CH4_Pos
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#define PPI_CHG3_CH4_Msk PPI_CHG_CH4_Msk
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#define PPI_CHG3_CH4_Excluded PPI_CHG_CH4_Excluded
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#define PPI_CHG3_CH4_Included PPI_CHG_CH4_Included
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#define PPI_CHG3_CH3_Pos PPI_CHG_CH3_Pos
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#define PPI_CHG3_CH3_Msk PPI_CHG_CH3_Msk
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#define PPI_CHG3_CH3_Excluded PPI_CHG_CH3_Excluded
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#define PPI_CHG3_CH3_Included PPI_CHG_CH3_Included
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#define PPI_CHG3_CH2_Pos PPI_CHG_CH2_Pos
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#define PPI_CHG3_CH2_Msk PPI_CHG_CH2_Msk
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#define PPI_CHG3_CH2_Excluded PPI_CHG_CH2_Excluded
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#define PPI_CHG3_CH2_Included PPI_CHG_CH2_Included
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#define PPI_CHG3_CH1_Pos PPI_CHG_CH1_Pos
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#define PPI_CHG3_CH1_Msk PPI_CHG_CH1_Msk
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#define PPI_CHG3_CH1_Excluded PPI_CHG_CH1_Excluded
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#define PPI_CHG3_CH1_Included PPI_CHG_CH1_Included
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#define PPI_CHG3_CH0_Pos PPI_CHG_CH0_Pos
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#define PPI_CHG3_CH0_Msk PPI_CHG_CH0_Msk
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#define PPI_CHG3_CH0_Excluded PPI_CHG_CH0_Excluded
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#define PPI_CHG3_CH0_Included PPI_CHG_CH0_Included
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/*lint --flb "Leave library region" */
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#endif /* NRF51_DEPRECATED_H */
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