474233c250
Any update of freq or duty_cycle requires the previous PWM cycle to be finished. Otherwise the new settings are not accepted. Other changes in this commit: - Report the set duty cycles even when the PWM is not yet started. - pwm.freq(0) stops the pwm device, instead of raising an expception. - Clear the duty cycle value cache on soft reset.
405 lines
15 KiB
C
405 lines
15 KiB
C
/*
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* This file is part of the MicroPython project, http://micropython.org/
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*
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* The MIT License (MIT)
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*
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* Copyright (c) 2020-2021 Damien P. George
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* Copyright (c) 2022 Robert Hammelrath
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#include <string.h>
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#include "py/runtime.h"
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#include "py/mphal.h"
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#include "modmachine.h"
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#include "clock_config.h"
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#include "sam.h"
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#include "pin_af.h"
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/******************************************************************************/
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// MicroPython bindings for machine.PWM
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typedef struct _machine_pwm_obj_t {
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mp_obj_base_t base;
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Tcc *instance;
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uint8_t pin_id;
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uint8_t alt_fct;
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uint8_t device;
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uint8_t channel;
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uint8_t output;
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uint16_t prescaler;
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uint32_t period; // full period count ticks
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uint32_t duty_ns; // just for reporting
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uint16_t duty_u16; // just for reporting
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} machine_pwm_obj_t;
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#define PWM_NOT_INIT (0)
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#define PWM_CLK_READY (1)
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#define PWM_TCC_ENABLED (2)
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#define PWM_MASTER_CLK (get_peripheral_freq())
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#define PWM_FULL_SCALE (65536)
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#define PWM_UPDATE_TIMEOUT (2000)
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static Tcc *tcc_instance[] = TCC_INSTS;
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#if defined(MCU_SAMD21)
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static const int tcc_gclk_id[] = {
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GCLK_CLKCTRL_ID_TCC0_TCC1, GCLK_CLKCTRL_ID_TCC0_TCC1, GCLK_CLKCTRL_ID_TCC2_TC3
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};
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const uint8_t tcc_channel_count[] = {4, 2, 2};
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const static uint8_t tcc_channel_offset[] = {0, 4, 6};
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static uint32_t pwm_duty_values[8];
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#define PERBUF PERB
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#define CCBUF CCB
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#elif defined(MCU_SAMD51)
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static const int tcc_gclk_id[] = {
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TCC0_GCLK_ID, TCC1_GCLK_ID, TCC2_GCLK_ID,
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#if TCC_INST_NUM > 3
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TCC3_GCLK_ID, TCC4_GCLK_ID
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#endif
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};
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#if TCC_INST_NUM > 3
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const uint8_t tcc_channel_count[] = {6, 4, 3, 2, 2};
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const static uint8_t tcc_channel_offset[] = {0, 6, 10, 13, 15};
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static uint32_t pwm_duty_values[17];
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#else
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const uint8_t tcc_channel_count[] = {6, 4, 3};
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const static uint8_t tcc_channel_offset[] = {0, 6, 10};
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static uint32_t pwm_duty_values[13];
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#endif // TCC_INST_NUM > 3
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#endif // defined(MCU_SAMD51)
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#define put_duty_value(device, channel, duty) \
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pwm_duty_values[tcc_channel_offset[device] + channel] = duty;
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#define get_duty_value(device, channel) \
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pwm_duty_values[tcc_channel_offset[device] + channel]
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static uint8_t duty_type_flags[TCC_INST_NUM];
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static uint8_t device_status[TCC_INST_NUM];
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static uint8_t output_active[TCC_INST_NUM];
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const uint16_t prescaler_table[] = {1, 2, 4, 8, 16, 64, 256, 1024};
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STATIC void pwm_stop_device(int device);
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STATIC void mp_machine_pwm_freq_set(machine_pwm_obj_t *self, mp_int_t freq);
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STATIC void mp_machine_pwm_duty_set_u16(machine_pwm_obj_t *self, mp_int_t duty_u16);
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STATIC void mp_machine_pwm_duty_set_ns(machine_pwm_obj_t *self, mp_int_t duty_ns);
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STATIC void mp_machine_pwm_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) {
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machine_pwm_obj_t *self = MP_OBJ_TO_PTR(self_in);
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mp_printf(print, "PWM(%s, device=%u, channel=%u, output=%u)",
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pin_name(self->pin_id), self->device, self->channel, self->output);
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}
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// PWM(pin)
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STATIC mp_obj_t mp_machine_pwm_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *all_args) {
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enum { ARG_pin, ARG_freq, ARG_duty_u16, ARG_duty_ns, ARG_invert, ARG_device };
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static const mp_arg_t allowed_args[] = {
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{ MP_QSTR_pin, MP_ARG_REQUIRED | MP_ARG_OBJ },
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{ MP_QSTR_freq, MP_ARG_INT, {.u_int = -1} },
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{ MP_QSTR_duty_u16, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = -1} },
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{ MP_QSTR_duty_ns, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = -1} },
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{ MP_QSTR_invert, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = -1} },
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{ MP_QSTR_device, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = -1} },
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};
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// Parse the arguments.
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mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)];
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mp_arg_parse_all_kw_array(n_args, n_kw, all_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args);
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// Get GPIO and optional device to connect to PWM.
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uint32_t pin_id = mp_hal_get_pin_obj(args[ARG_pin].u_obj);
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int32_t wanted_dev = args[ARG_device].u_int; // -1 = any
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// Get the peripheral object and populate it
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pwm_config_t config = get_pwm_config(pin_id, wanted_dev, device_status);
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uint8_t device = config.device_channel >> 4;
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if (device >= TCC_INST_NUM) {
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mp_raise_ValueError(MP_ERROR_TEXT("wrong device"));
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}
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machine_pwm_obj_t *self = mp_obj_malloc(machine_pwm_obj_t, &machine_pwm_type);
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self->instance = tcc_instance[device];
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self->device = device;
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self->pin_id = pin_id;
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self->alt_fct = config.alt_fct;
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self->channel = (config.device_channel & 0x0f) % tcc_channel_count[device];
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self->output = config.device_channel & 0x0f;
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self->prescaler = 1;
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self->period = 1; // Use an invalid but safe value
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self->duty_u16 = self->duty_ns = 0;
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put_duty_value(self->device, self->channel, 0);
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Tcc *tcc = self->instance;
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if (device_status[device] == PWM_NOT_INIT) {
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// Enable the device clock at first use.
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#if defined(MCU_SAMD21)
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// Enable synchronous clock. The bits are nicely arranged
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PM->APBCMASK.reg |= PM_APBCMASK_TCC0 << device;
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// Select multiplexer generic clock source and enable.
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GCLK->CLKCTRL.reg = GCLK_CLKCTRL_CLKEN | GCLK_CLKCTRL_GEN_GCLK2 | tcc_gclk_id[device];
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// Wait while it updates synchronously.
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while (GCLK->STATUS.bit.SYNCBUSY) {
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}
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#elif defined(MCU_SAMD51)
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// GenClk2 to the tcc
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GCLK->PCHCTRL[tcc_gclk_id[device]].reg = GCLK_PCHCTRL_CHEN | GCLK_PCHCTRL_GEN(2);
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while (GCLK->SYNCBUSY.reg & GCLK_SYNCBUSY_GENCTRL_GCLK2) {
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}
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// Enable MCLK
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switch (device) {
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case 0:
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MCLK->APBBMASK.reg |= MCLK_APBBMASK_TCC0;
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break;
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case 1:
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MCLK->APBBMASK.reg |= MCLK_APBBMASK_TCC1;
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break;
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case 2:
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MCLK->APBCMASK.reg |= MCLK_APBCMASK_TCC2;
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break;
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#if TCC_INST_NUM > 3
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case 3:
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MCLK->APBCMASK.reg |= MCLK_APBCMASK_TCC3;
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break;
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case 4:
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MCLK->APBDMASK.reg |= MCLK_APBDMASK_TCC4;
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break;
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#endif
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}
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#endif
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// Reset the device
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tcc->CTRLA.reg = TCC_CTRLA_SWRST;
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while (tcc->SYNCBUSY.reg & TCC_SYNCBUSY_SWRST) {
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}
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tcc->CTRLA.reg = TCC_CTRLA_PRESCALER_DIV1;
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tcc->WAVE.reg = TCC_WAVE_WAVEGEN_NPWM;
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// Flag the clock as initialized, but not the device as enabled.
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device_status[device] = PWM_CLK_READY;
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}
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if (args[ARG_invert].u_int != -1) {
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bool invert = !!args[ARG_invert].u_int;
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if (device_status[device] != PWM_CLK_READY) {
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pwm_stop_device(device);
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}
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uint32_t mask = 1 << (self->output + TCC_DRVCTRL_INVEN0_Pos);
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if (invert) {
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tcc->DRVCTRL.reg |= mask;
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} else {
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tcc->DRVCTRL.reg &= ~(mask);
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}
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}
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if (args[ARG_duty_u16].u_int != -1) {
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mp_machine_pwm_duty_set_u16(self, args[ARG_duty_u16].u_int);
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}
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if (args[ARG_duty_ns].u_int != -1) {
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mp_machine_pwm_duty_set_ns(self, args[ARG_duty_ns].u_int);
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}
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if (args[ARG_freq].u_int != -1) {
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mp_machine_pwm_freq_set(self, args[ARG_freq].u_int);
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}
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return MP_OBJ_FROM_PTR(self);
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}
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STATIC void pwm_stop_device(int device) {
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Tcc *tcc = tcc_instance[device];
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tcc->CTRLA.bit.ENABLE = 0;
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while (tcc->SYNCBUSY.reg & TCC_SYNCBUSY_ENABLE) {
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}
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device_status[device] = PWM_CLK_READY;
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}
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// Stop all TTC devices
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void pwm_deinit_all(void) {
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for (int i = 0; i < TCC_INST_NUM; i++) {
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Tcc *tcc = tcc_instance[i];
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tcc->CTRLA.reg = TCC_CTRLA_SWRST;
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while (tcc->SYNCBUSY.reg & TCC_SYNCBUSY_SWRST) {
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}
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device_status[i] = PWM_NOT_INIT;
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duty_type_flags[i] = 0;
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output_active[i] = 0;
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memset(pwm_duty_values, 0, sizeof(pwm_duty_values));
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}
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}
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// Switch off an output. If all outputs of a device are off,
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// switch off that device.
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// This stops all channels, but keeps the configuration
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// Calling pwm.freq(n) will start an instance again.
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STATIC void mp_machine_pwm_deinit(machine_pwm_obj_t *self) {
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mp_hal_clr_pin_mux(self->pin_id); // Switch the output off
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output_active[self->device] &= ~(1 << self->output); // clear output flasg
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// Stop the device, if no output is active.
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if (output_active[self->device] == 0) {
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pwm_stop_device(self->device);
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}
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}
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STATIC void wait_for_register_update(Tcc *tcc) {
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// Wait for a period's end (may be long) to have the change settled
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// Each loop cycle takes at least 1 ms, giving an implicit timeout.
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for (int i = 0; i < PWM_UPDATE_TIMEOUT; i++) {
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if (tcc->INTFLAG.reg & TCC_INTFLAG_OVF) {
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break;
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}
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MICROPY_EVENT_POLL_HOOK
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}
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// Clear the flag, telling that a cycle has been handled.
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tcc->INTFLAG.reg = TCC_INTFLAG_OVF;
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}
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STATIC mp_obj_t mp_machine_pwm_freq_get(machine_pwm_obj_t *self) {
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if (self->instance->CTRLA.reg & TCC_CTRLA_ENABLE) {
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return MP_OBJ_NEW_SMALL_INT(PWM_MASTER_CLK / self->prescaler / self->period);
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} else {
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return MP_OBJ_NEW_SMALL_INT(0);
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}
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}
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STATIC void mp_machine_pwm_freq_set(machine_pwm_obj_t *self, mp_int_t freq) {
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// Set the frequency. The period counter is 24 bit or 16 bit with a pre-scaling
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// of up to 1024, allowing a range from 24 MHz down to 1 Hz.
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static const uint32_t max_period[5] = {1 << 24, 1 << 24, 1 << 16, 1 << 16, 1 << 16};
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Tcc *tcc = self->instance;
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if (freq < 1) {
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pwm_stop_device(self->device);
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return;
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}
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// Get the actual settings of prescaler & period from the unit
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// To be able for cope for changes.
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uint32_t prev_period = tcc->PER.reg + 1;
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// Check for the right prescaler
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uint8_t index;
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for (index = 0; index < 8; index++) {
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uint32_t temp = PWM_MASTER_CLK / prescaler_table[index] / freq;
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if (temp < max_period[self->device]) {
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break;
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}
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}
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self->prescaler = prescaler_table[index];
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uint32_t period = PWM_MASTER_CLK / self->prescaler / freq;
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if (period < 2) {
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mp_raise_ValueError(MP_ERROR_TEXT("freq too large"));
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}
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// If the PWM is running, ensure that a cycle has passed since the
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// previous setting before setting a new frequency/duty value
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if (tcc->CTRLA.reg & TCC_CTRLA_ENABLE) {
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wait_for_register_update(tcc);
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}
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// Check, if the prescaler has to be changed and stop the device if so.
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if (index != tcc->CTRLA.bit.PRESCALER) {
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// stop the device
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pwm_stop_device(self->device);
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// update the prescaler
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tcc->CTRLA.bit.PRESCALER = index;
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}
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// Lock the update to get a glitch-free change of period and duty cycle
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tcc->CTRLBSET.reg = TCC_CTRLBSET_LUPD;
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tcc->PERBUF.reg = period - 1;
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self->period = period;
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// Check if the Duty rate has to be aligned again when freq or prescaler were changed.
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// This condition is as well true on first call after instantiation. So (re-)configure
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// all channels with a duty_u16 setting.
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if (period != prev_period) {
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for (uint16_t ch = 0; ch < tcc_channel_count[self->device]; ch++) {
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if ((duty_type_flags[self->device] & (1 << ch)) != 0) { // duty_u16 type?
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tcc->CCBUF[ch].reg = (uint64_t)get_duty_value(self->device, ch) * period /
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PWM_FULL_SCALE;
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}
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}
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}
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// If the prescaler was changed, the device is disabled. So this condition is true
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// after the instantiation and after a prescaler change.
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// (re-)configure all channels with a duty_ns setting.
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if (!(tcc->CTRLA.reg & TCC_CTRLA_ENABLE)) {
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for (uint16_t ch = 0; ch < tcc_channel_count[self->device]; ch++) {
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if ((duty_type_flags[self->device] & (1 << ch)) == 0) { // duty_ns type?
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tcc->CCBUF[ch].reg = (uint64_t)get_duty_value(self->device, ch) * PWM_MASTER_CLK /
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self->prescaler / 1000000000ULL;
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}
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}
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}
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// Remember the output as active.
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output_active[self->device] |= 1 << self->output; // set output flag
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// (Re-)Select PWM function for given GPIO.
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mp_hal_set_pin_mux(self->pin_id, self->alt_fct);
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// Enable the device, if required.
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if ((device_status[self->device] & PWM_TCC_ENABLED) == 0) {
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tcc->CTRLBSET.reg = TCC_CTRLBSET_CMD_UPDATE;
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tcc->CTRLA.reg |= TCC_CTRLA_ENABLE;
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while (tcc->SYNCBUSY.reg & TCC_SYNCBUSY_ENABLE) {
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}
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device_status[self->device] |= PWM_TCC_ENABLED;
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}
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// Unlock the register update, now that the settings are complete
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tcc->CTRLBCLR.reg = TCC_CTRLBCLR_LUPD;
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}
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STATIC mp_obj_t mp_machine_pwm_duty_get_u16(machine_pwm_obj_t *self) {
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return MP_OBJ_NEW_SMALL_INT(self->duty_u16);
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}
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STATIC void mp_machine_pwm_duty_set_u16(machine_pwm_obj_t *self, mp_int_t duty_u16) {
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// Remember the values for update & reporting
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put_duty_value(self->device, self->channel, duty_u16);
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self->duty_u16 = duty_u16;
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self->duty_ns = 0;
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// If the device is enabled, than the period is set and we get a reasonable value for
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// the duty cycle, set to the CCBUF register. Otherwise, PWM does not start.
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if (self->instance->CTRLA.reg & TCC_CTRLA_ENABLE) {
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// Ensure that a cycle has passed updating the registers
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// since the previous setting before setting a new duty value
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wait_for_register_update(self->instance);
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self->instance->CCBUF[self->channel].reg = (uint64_t)duty_u16 * (self->period) / PWM_FULL_SCALE;
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}
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duty_type_flags[self->device] |= 1 << self->channel;
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}
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STATIC mp_obj_t mp_machine_pwm_duty_get_ns(machine_pwm_obj_t *self) {
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return MP_OBJ_NEW_SMALL_INT(self->duty_ns);
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}
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STATIC void mp_machine_pwm_duty_set_ns(machine_pwm_obj_t *self, mp_int_t duty_ns) {
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// Remember the values for update & reporting
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put_duty_value(self->device, self->channel, duty_ns);
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self->duty_ns = duty_ns;
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self->duty_u16 = 0;
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// Ensure that a cycle has passed updating the registers
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// since the previous setting before setting a new duty value
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wait_for_register_update(self->instance);
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self->instance->CCBUF[self->channel].reg = (uint64_t)duty_ns * PWM_MASTER_CLK / self->prescaler / 1000000000ULL;
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duty_type_flags[self->device] &= ~(1 << self->channel);
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}
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