circuitpython/ports
Sean Cross 2f95cc95a4 litex: move more critical code to RAM
The XIP SPI flash on Fomu is slow, which results in certain operations
taking a long time. This becomes a problem for time-critical operations
such as USB.

Move various calls into RAM to improve performance.

This includes the call to __modsi3 and __udivsi3 which are used by the
supervisor handler to determine if periodic callbacks need to be run.

This finishes fixing #3841

Signed-off-by: Sean Cross <sean@xobs.io>
2020-12-24 14:06:57 +08:00
..
atmel-samd Rev C Feather M4 CAN pin changes 2020-11-02 15:28:30 -05:00
cxd56 cxd56 needed more precise include for __packed; needed SRC_C += on some ports 2020-10-15 15:24:24 -04:00
esp32s2 Merge pull request #3555 from UnexpectedCircuitPython/main 2020-10-15 15:12:40 -07:00
litex litex: move more critical code to RAM 2020-12-24 14:06:57 +08:00
mimxrt10xx cxd56 needed more precise include for __packed; needed SRC_C += on some ports 2020-10-15 15:24:24 -04:00
nrf fix CPB SPI pin definitions 2020-10-21 17:07:30 -04:00
stm disable on winterbloom_sol and thunderpack 2020-10-15 18:48:28 -04:00
unix cxd56 needed more precise include for __packed; needed SRC_C += on some ports 2020-10-15 15:24:24 -04:00