785 lines
38 KiB
C
785 lines
38 KiB
C
/**
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******************************************************************************
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* @file stm32f4xx_hal_uart.h
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* @author MCD Application Team
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* @version V1.5.2
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* @date 22-September-2016
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* @brief Header file of UART HAL module.
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******************************************************************************
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* @attention
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*
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* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
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*
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* Redistribution and use in source and binary forms, with or without modification,
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* are permitted provided that the following conditions are met:
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* 1. Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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* 3. Neither the name of STMicroelectronics nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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******************************************************************************
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*/
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/* Define to prevent recursive inclusion -------------------------------------*/
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#ifndef __STM32F4xx_HAL_UART_H
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#define __STM32F4xx_HAL_UART_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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/* Includes ------------------------------------------------------------------*/
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#include "stm32f4xx_hal_def.h"
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/** @addtogroup STM32F4xx_HAL_Driver
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* @{
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*/
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/** @addtogroup UART
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* @{
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*/
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/* Exported types ------------------------------------------------------------*/
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/** @defgroup UART_Exported_Types UART Exported Types
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* @{
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*/
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/**
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* @brief UART Init Structure definition
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*/
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typedef struct
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{
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uint32_t BaudRate; /*!< This member configures the UART communication baud rate.
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The baud rate is computed using the following formula:
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- IntegerDivider = ((PCLKx) / (8 * (OVR8+1) * (huart->Init.BaudRate)))
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- FractionalDivider = ((IntegerDivider - ((uint32_t) IntegerDivider)) * 8 * (OVR8+1)) + 0.5
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Where OVR8 is the "oversampling by 8 mode" configuration bit in the CR1 register. */
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uint32_t WordLength; /*!< Specifies the number of data bits transmitted or received in a frame.
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This parameter can be a value of @ref UART_Word_Length */
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uint32_t StopBits; /*!< Specifies the number of stop bits transmitted.
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This parameter can be a value of @ref UART_Stop_Bits */
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uint32_t Parity; /*!< Specifies the parity mode.
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This parameter can be a value of @ref UART_Parity
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@note When parity is enabled, the computed parity is inserted
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at the MSB position of the transmitted data (9th bit when
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the word length is set to 9 data bits; 8th bit when the
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word length is set to 8 data bits). */
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uint32_t Mode; /*!< Specifies whether the Receive or Transmit mode is enabled or disabled.
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This parameter can be a value of @ref UART_Mode */
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uint32_t HwFlowCtl; /*!< Specifies whether the hardware flow control mode is enabled
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or disabled.
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This parameter can be a value of @ref UART_Hardware_Flow_Control */
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uint32_t OverSampling; /*!< Specifies whether the Over sampling 8 is enabled or disabled, to achieve higher speed (up to fPCLK/8).
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This parameter can be a value of @ref UART_Over_Sampling */
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}UART_InitTypeDef;
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/**
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* @brief HAL UART State structures definition
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* @note HAL UART State value is a combination of 2 different substates: gState and RxState.
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* - gState contains UART state information related to global Handle management
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* and also information related to Tx operations.
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* gState value coding follow below described bitmap :
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* b7-b6 Error information
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* 00 : No Error
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* 01 : (Not Used)
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* 10 : Timeout
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* 11 : Error
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* b5 IP initilisation status
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* 0 : Reset (IP not initialized)
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* 1 : Init done (IP not initialized. HAL UART Init function already called)
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* b4-b3 (not used)
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* xx : Should be set to 00
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* b2 Intrinsic process state
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* 0 : Ready
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* 1 : Busy (IP busy with some configuration or internal operations)
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* b1 (not used)
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* x : Should be set to 0
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* b0 Tx state
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* 0 : Ready (no Tx operation ongoing)
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* 1 : Busy (Tx operation ongoing)
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* - RxState contains information related to Rx operations.
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* RxState value coding follow below described bitmap :
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* b7-b6 (not used)
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* xx : Should be set to 00
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* b5 IP initilisation status
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* 0 : Reset (IP not initialized)
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* 1 : Init done (IP not initialized)
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* b4-b2 (not used)
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* xxx : Should be set to 000
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* b1 Rx state
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* 0 : Ready (no Rx operation ongoing)
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* 1 : Busy (Rx operation ongoing)
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* b0 (not used)
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* x : Should be set to 0.
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*/
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typedef enum
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{
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HAL_UART_STATE_RESET = 0x00U, /*!< Peripheral is not yet Initialized
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Value is allowed for gState and RxState */
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HAL_UART_STATE_READY = 0x20U, /*!< Peripheral Initialized and ready for use
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Value is allowed for gState and RxState */
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HAL_UART_STATE_BUSY = 0x24U, /*!< an internal process is ongoing
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Value is allowed for gState only */
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HAL_UART_STATE_BUSY_TX = 0x21U, /*!< Data Transmission process is ongoing
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Value is allowed for gState only */
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HAL_UART_STATE_BUSY_RX = 0x22U, /*!< Data Reception process is ongoing
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Value is allowed for RxState only */
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HAL_UART_STATE_BUSY_TX_RX = 0x23U, /*!< Data Transmission and Reception process is ongoing
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Not to be used for neither gState nor RxState.
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Value is result of combination (Or) between gState and RxState values */
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HAL_UART_STATE_TIMEOUT = 0xA0U, /*!< Timeout state
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Value is allowed for gState only */
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HAL_UART_STATE_ERROR = 0xE0U /*!< Error
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Value is allowed for gState only */
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}HAL_UART_StateTypeDef;
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/**
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* @brief UART handle Structure definition
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*/
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typedef struct
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{
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USART_TypeDef *Instance; /*!< UART registers base address */
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UART_InitTypeDef Init; /*!< UART communication parameters */
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uint8_t *pTxBuffPtr; /*!< Pointer to UART Tx transfer Buffer */
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uint16_t TxXferSize; /*!< UART Tx Transfer size */
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__IO uint16_t TxXferCount; /*!< UART Tx Transfer Counter */
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uint8_t *pRxBuffPtr; /*!< Pointer to UART Rx transfer Buffer */
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uint16_t RxXferSize; /*!< UART Rx Transfer size */
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__IO uint16_t RxXferCount; /*!< UART Rx Transfer Counter */
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DMA_HandleTypeDef *hdmatx; /*!< UART Tx DMA Handle parameters */
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DMA_HandleTypeDef *hdmarx; /*!< UART Rx DMA Handle parameters */
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HAL_LockTypeDef Lock; /*!< Locking object */
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__IO HAL_UART_StateTypeDef gState; /*!< UART state information related to global Handle management
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and also related to Tx operations.
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This parameter can be a value of @ref HAL_UART_StateTypeDef */
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__IO HAL_UART_StateTypeDef RxState; /*!< UART state information related to Rx operations.
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This parameter can be a value of @ref HAL_UART_StateTypeDef */
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__IO uint32_t ErrorCode; /*!< UART Error code */
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}UART_HandleTypeDef;
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/**
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* @}
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*/
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/* Exported constants --------------------------------------------------------*/
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/** @defgroup UART_Exported_Constants UART Exported constants
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* @{
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*/
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/** @defgroup UART_Error_Code UART Error Code
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* @brief UART Error Code
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* @{
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*/
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#define HAL_UART_ERROR_NONE ((uint32_t)0x00000000U) /*!< No error */
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#define HAL_UART_ERROR_PE ((uint32_t)0x00000001U) /*!< Parity error */
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#define HAL_UART_ERROR_NE ((uint32_t)0x00000002U) /*!< Noise error */
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#define HAL_UART_ERROR_FE ((uint32_t)0x00000004U) /*!< Frame error */
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#define HAL_UART_ERROR_ORE ((uint32_t)0x00000008U) /*!< Overrun error */
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#define HAL_UART_ERROR_DMA ((uint32_t)0x00000010U) /*!< DMA transfer error */
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/**
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* @}
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*/
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/** @defgroup UART_Word_Length UART Word Length
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* @{
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*/
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#define UART_WORDLENGTH_8B ((uint32_t)0x00000000U)
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#define UART_WORDLENGTH_9B ((uint32_t)USART_CR1_M)
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/**
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* @}
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*/
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/** @defgroup UART_Stop_Bits UART Number of Stop Bits
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* @{
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*/
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#define UART_STOPBITS_1 ((uint32_t)0x00000000U)
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#define UART_STOPBITS_2 ((uint32_t)USART_CR2_STOP_1)
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/**
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* @}
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*/
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/** @defgroup UART_Parity UART Parity
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* @{
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*/
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#define UART_PARITY_NONE ((uint32_t)0x00000000U)
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#define UART_PARITY_EVEN ((uint32_t)USART_CR1_PCE)
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#define UART_PARITY_ODD ((uint32_t)(USART_CR1_PCE | USART_CR1_PS))
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/**
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* @}
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*/
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/** @defgroup UART_Hardware_Flow_Control UART Hardware Flow Control
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* @{
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*/
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#define UART_HWCONTROL_NONE ((uint32_t)0x00000000U)
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#define UART_HWCONTROL_RTS ((uint32_t)USART_CR3_RTSE)
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#define UART_HWCONTROL_CTS ((uint32_t)USART_CR3_CTSE)
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#define UART_HWCONTROL_RTS_CTS ((uint32_t)(USART_CR3_RTSE | USART_CR3_CTSE))
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/**
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* @}
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*/
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/** @defgroup UART_Mode UART Transfer Mode
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* @{
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*/
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#define UART_MODE_RX ((uint32_t)USART_CR1_RE)
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#define UART_MODE_TX ((uint32_t)USART_CR1_TE)
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#define UART_MODE_TX_RX ((uint32_t)(USART_CR1_TE |USART_CR1_RE))
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/**
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* @}
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*/
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/** @defgroup UART_State UART State
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* @{
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*/
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#define UART_STATE_DISABLE ((uint32_t)0x00000000U)
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#define UART_STATE_ENABLE ((uint32_t)USART_CR1_UE)
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/**
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* @}
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*/
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/** @defgroup UART_Over_Sampling UART Over Sampling
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* @{
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*/
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#define UART_OVERSAMPLING_16 ((uint32_t)0x00000000U)
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#define UART_OVERSAMPLING_8 ((uint32_t)USART_CR1_OVER8)
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/**
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* @}
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*/
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/** @defgroup UART_LIN_Break_Detection_Length UART LIN Break Detection Length
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* @{
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*/
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#define UART_LINBREAKDETECTLENGTH_10B ((uint32_t)0x00000000U)
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#define UART_LINBREAKDETECTLENGTH_11B ((uint32_t)0x00000020U)
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/**
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* @}
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*/
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/** @defgroup UART_WakeUp_functions UART Wakeup Functions
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* @{
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*/
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#define UART_WAKEUPMETHOD_IDLELINE ((uint32_t)0x00000000U)
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#define UART_WAKEUPMETHOD_ADDRESSMARK ((uint32_t)0x00000800U)
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/**
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* @}
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*/
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/** @defgroup UART_Flags UART FLags
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* Elements values convention: 0xXXXX
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* - 0xXXXX : Flag mask in the SR register
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* @{
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*/
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#define UART_FLAG_CTS ((uint32_t)USART_SR_CTS)
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#define UART_FLAG_LBD ((uint32_t)USART_SR_LBD)
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#define UART_FLAG_TXE ((uint32_t)USART_SR_TXE)
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#define UART_FLAG_TC ((uint32_t)USART_SR_TC)
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#define UART_FLAG_RXNE ((uint32_t)USART_SR_RXNE)
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#define UART_FLAG_IDLE ((uint32_t)USART_SR_IDLE)
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#define UART_FLAG_ORE ((uint32_t)USART_SR_ORE)
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#define UART_FLAG_NE ((uint32_t)USART_SR_NE)
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#define UART_FLAG_FE ((uint32_t)USART_SR_FE)
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#define UART_FLAG_PE ((uint32_t)USART_SR_PE)
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/**
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* @}
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*/
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/** @defgroup UART_Interrupt_definition UART Interrupt Definitions
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* Elements values convention: 0xY000XXXX
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* - XXXX : Interrupt mask (16 bits) in the Y register
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* - Y : Interrupt source register (2bits)
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* - 0001: CR1 register
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* - 0010: CR2 register
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* - 0011: CR3 register
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*
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* @{
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*/
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#define UART_IT_PE ((uint32_t)(UART_CR1_REG_INDEX << 28U | USART_CR1_PEIE))
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#define UART_IT_TXE ((uint32_t)(UART_CR1_REG_INDEX << 28U | USART_CR1_TXEIE))
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#define UART_IT_TC ((uint32_t)(UART_CR1_REG_INDEX << 28U | USART_CR1_TCIE))
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#define UART_IT_RXNE ((uint32_t)(UART_CR1_REG_INDEX << 28U | USART_CR1_RXNEIE))
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#define UART_IT_IDLE ((uint32_t)(UART_CR1_REG_INDEX << 28U | USART_CR1_IDLEIE))
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#define UART_IT_LBD ((uint32_t)(UART_CR2_REG_INDEX << 28U | USART_CR2_LBDIE))
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#define UART_IT_CTS ((uint32_t)(UART_CR3_REG_INDEX << 28U | USART_CR3_CTSIE))
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#define UART_IT_ERR ((uint32_t)(UART_CR3_REG_INDEX << 28U | USART_CR3_EIE))
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/**
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* @}
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*/
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/**
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* @}
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*/
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/* Exported macro ------------------------------------------------------------*/
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/** @defgroup UART_Exported_Macros UART Exported Macros
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* @{
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*/
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/** @brief Reset UART handle gstate & RxState
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* @param __HANDLE__: specifies the UART Handle.
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* This parameter can be UARTx where x: 1, 2, 3, 4, 5, 6, 7 or 8 to select the USART or
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* UART peripheral.
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* @retval None
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*/
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#define __HAL_UART_RESET_HANDLE_STATE(__HANDLE__) do{ \
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(__HANDLE__)->gState = HAL_UART_STATE_RESET; \
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(__HANDLE__)->RxState = HAL_UART_STATE_RESET; \
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} while(0)
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/** @brief Flushes the UART DR register
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* @param __HANDLE__: specifies the UART Handle.
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*/
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#define __HAL_UART_FLUSH_DRREGISTER(__HANDLE__) ((__HANDLE__)->Instance->DR)
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/** @brief Checks whether the specified UART flag is set or not.
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* @param __HANDLE__: specifies the UART Handle.
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* This parameter can be UARTx where x: 1, 2, 3, 4, 5, 6, 7 or 8 to select the USART or
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* UART peripheral.
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* @param __FLAG__: specifies the flag to check.
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* This parameter can be one of the following values:
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* @arg UART_FLAG_CTS: CTS Change flag (not available for UART4 and UART5)
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* @arg UART_FLAG_LBD: LIN Break detection flag
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* @arg UART_FLAG_TXE: Transmit data register empty flag
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* @arg UART_FLAG_TC: Transmission Complete flag
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* @arg UART_FLAG_RXNE: Receive data register not empty flag
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* @arg UART_FLAG_IDLE: Idle Line detection flag
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* @arg UART_FLAG_ORE: Overrun Error flag
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* @arg UART_FLAG_NE: Noise Error flag
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* @arg UART_FLAG_FE: Framing Error flag
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* @arg UART_FLAG_PE: Parity Error flag
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* @retval The new state of __FLAG__ (TRUE or FALSE).
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*/
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#define __HAL_UART_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->SR & (__FLAG__)) == (__FLAG__))
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/** @brief Clears the specified UART pending flag.
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* @param __HANDLE__: specifies the UART Handle.
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* This parameter can be UARTx where x: 1, 2, 3, 4, 5, 6, 7 or 8 to select the USART or
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* UART peripheral.
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* @param __FLAG__: specifies the flag to check.
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* This parameter can be any combination of the following values:
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* @arg UART_FLAG_CTS: CTS Change flag (not available for UART4 and UART5).
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* @arg UART_FLAG_LBD: LIN Break detection flag.
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* @arg UART_FLAG_TC: Transmission Complete flag.
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* @arg UART_FLAG_RXNE: Receive data register not empty flag.
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*
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* @note PE (Parity error), FE (Framing error), NE (Noise error), ORE (Overrun
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* error) and IDLE (Idle line detected) flags are cleared by software
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* sequence: a read operation to USART_SR register followed by a read
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* operation to USART_DR register.
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* @note RXNE flag can be also cleared by a read to the USART_DR register.
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* @note TC flag can be also cleared by software sequence: a read operation to
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* USART_SR register followed by a write operation to USART_DR register.
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* @note TXE flag is cleared only by a write to the USART_DR register.
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*
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* @retval None
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*/
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#define __HAL_UART_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->SR = ~(__FLAG__))
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/** @brief Clear the UART PE pending flag.
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* @param __HANDLE__: specifies the UART Handle.
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* This parameter can be UARTx where x: 1, 2, 3, 4, 5, 6, 7 or 8 to select the USART or
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* UART peripheral.
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* @retval None
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*/
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#define __HAL_UART_CLEAR_PEFLAG(__HANDLE__) \
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do{ \
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__IO uint32_t tmpreg = 0x00U; \
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tmpreg = (__HANDLE__)->Instance->SR; \
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tmpreg = (__HANDLE__)->Instance->DR; \
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UNUSED(tmpreg); \
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} while(0)
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/** @brief Clear the UART FE pending flag.
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* @param __HANDLE__: specifies the UART Handle.
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* This parameter can be UARTx where x: 1, 2, 3, 4, 5, 6, 7 or 8 to select the USART or
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* UART peripheral.
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* @retval None
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*/
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#define __HAL_UART_CLEAR_FEFLAG(__HANDLE__) __HAL_UART_CLEAR_PEFLAG(__HANDLE__)
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/** @brief Clear the UART NE pending flag.
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* @param __HANDLE__: specifies the UART Handle.
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* This parameter can be UARTx where x: 1, 2, 3, 4, 5, 6, 7 or 8 to select the USART or
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* UART peripheral.
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* @retval None
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*/
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#define __HAL_UART_CLEAR_NEFLAG(__HANDLE__) __HAL_UART_CLEAR_PEFLAG(__HANDLE__)
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/** @brief Clear the UART ORE pending flag.
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* @param __HANDLE__: specifies the UART Handle.
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* This parameter can be UARTx where x: 1, 2, 3, 4, 5, 6, 7 or 8 to select the USART or
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* UART peripheral.
|
|
* @retval None
|
|
*/
|
|
#define __HAL_UART_CLEAR_OREFLAG(__HANDLE__) __HAL_UART_CLEAR_PEFLAG(__HANDLE__)
|
|
|
|
/** @brief Clear the UART IDLE pending flag.
|
|
* @param __HANDLE__: specifies the UART Handle.
|
|
* This parameter can be UARTx where x: 1, 2, 3, 4, 5, 6, 7 or 8 to select the USART or
|
|
* UART peripheral.
|
|
* @retval None
|
|
*/
|
|
#define __HAL_UART_CLEAR_IDLEFLAG(__HANDLE__) __HAL_UART_CLEAR_PEFLAG(__HANDLE__)
|
|
|
|
/** @brief Enable the specified UART interrupt.
|
|
* @param __HANDLE__: specifies the UART Handle.
|
|
* This parameter can be UARTx where x: 1, 2, 3, 4, 5, 6, 7 or 8 to select the USART or
|
|
* UART peripheral.
|
|
* @param __INTERRUPT__: specifies the UART interrupt source to enable.
|
|
* This parameter can be one of the following values:
|
|
* @arg UART_IT_CTS: CTS change interrupt
|
|
* @arg UART_IT_LBD: LIN Break detection interrupt
|
|
* @arg UART_IT_TXE: Transmit Data Register empty interrupt
|
|
* @arg UART_IT_TC: Transmission complete interrupt
|
|
* @arg UART_IT_RXNE: Receive Data register not empty interrupt
|
|
* @arg UART_IT_IDLE: Idle line detection interrupt
|
|
* @arg UART_IT_PE: Parity Error interrupt
|
|
* @arg UART_IT_ERR: Error interrupt(Frame error, noise error, overrun error)
|
|
* @retval None
|
|
*/
|
|
#define UART_IT_MASK ((uint32_t)0x0000FFFFU)
|
|
#define __HAL_UART_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((((__INTERRUPT__) >> 28U) == 1U)? ((__HANDLE__)->Instance->CR1 |= ((__INTERRUPT__) & UART_IT_MASK)): \
|
|
(((__INTERRUPT__) >> 28U) == 2U)? ((__HANDLE__)->Instance->CR2 |= ((__INTERRUPT__) & UART_IT_MASK)): \
|
|
((__HANDLE__)->Instance->CR3 |= ((__INTERRUPT__) & UART_IT_MASK)))
|
|
/** @brief Disable the specified UART interrupt.
|
|
* @param __HANDLE__: specifies the UART Handle.
|
|
* This parameter can be UARTx where x: 1, 2, 3, 4, 5, 6, 7 or 8 to select the USART or
|
|
* UART peripheral.
|
|
* @param __INTERRUPT__: specifies the UART interrupt source to disable.
|
|
* This parameter can be one of the following values:
|
|
* @arg UART_IT_CTS: CTS change interrupt
|
|
* @arg UART_IT_LBD: LIN Break detection interrupt
|
|
* @arg UART_IT_TXE: Transmit Data Register empty interrupt
|
|
* @arg UART_IT_TC: Transmission complete interrupt
|
|
* @arg UART_IT_RXNE: Receive Data register not empty interrupt
|
|
* @arg UART_IT_IDLE: Idle line detection interrupt
|
|
* @arg UART_IT_PE: Parity Error interrupt
|
|
* @arg UART_IT_ERR: Error interrupt(Frame error, noise error, overrun error)
|
|
* @retval None
|
|
*/
|
|
#define __HAL_UART_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((((__INTERRUPT__) >> 28U) == 1U)? ((__HANDLE__)->Instance->CR1 &= ~((__INTERRUPT__) & UART_IT_MASK)): \
|
|
(((__INTERRUPT__) >> 28U) == 2U)? ((__HANDLE__)->Instance->CR2 &= ~((__INTERRUPT__) & UART_IT_MASK)): \
|
|
((__HANDLE__)->Instance->CR3 &= ~ ((__INTERRUPT__) & UART_IT_MASK)))
|
|
|
|
/** @brief Checks whether the specified UART interrupt has occurred or not.
|
|
* @param __HANDLE__: specifies the UART Handle.
|
|
* This parameter can be UARTx where x: 1, 2, 3, 4, 5, 6, 7 or 8 to select the USART or
|
|
* UART peripheral.
|
|
* @param __IT__: specifies the UART interrupt source to check.
|
|
* This parameter can be one of the following values:
|
|
* @arg UART_IT_CTS: CTS change interrupt (not available for UART4 and UART5)
|
|
* @arg UART_IT_LBD: LIN Break detection interrupt
|
|
* @arg UART_IT_TXE: Transmit Data Register empty interrupt
|
|
* @arg UART_IT_TC: Transmission complete interrupt
|
|
* @arg UART_IT_RXNE: Receive Data register not empty interrupt
|
|
* @arg UART_IT_IDLE: Idle line detection interrupt
|
|
* @arg USART_IT_ERR: Error interrupt
|
|
* @retval The new state of __IT__ (TRUE or FALSE).
|
|
*/
|
|
#define __HAL_UART_GET_IT_SOURCE(__HANDLE__, __IT__) (((((__IT__) >> 28U) == 1U)? (__HANDLE__)->Instance->CR1:(((((uint32_t)(__IT__)) >> 28U) == 2U)? \
|
|
(__HANDLE__)->Instance->CR2 : (__HANDLE__)->Instance->CR3)) & (((uint32_t)(__IT__)) & UART_IT_MASK))
|
|
|
|
/** @brief Enable CTS flow control
|
|
* This macro allows to enable CTS hardware flow control for a given UART instance,
|
|
* without need to call HAL_UART_Init() function.
|
|
* As involving direct access to UART registers, usage of this macro should be fully endorsed by user.
|
|
* @note As macro is expected to be used for modifying CTS Hw flow control feature activation, without need
|
|
* for USART instance Deinit/Init, following conditions for macro call should be fulfilled :
|
|
* - UART instance should have already been initialised (through call of HAL_UART_Init() )
|
|
* - macro could only be called when corresponding UART instance is disabled (i.e __HAL_UART_DISABLE(__HANDLE__))
|
|
* and should be followed by an Enable macro (i.e __HAL_UART_ENABLE(__HANDLE__)).
|
|
* @param __HANDLE__: specifies the UART Handle.
|
|
* The Handle Instance can be USART1, USART2 or LPUART.
|
|
* @retval None
|
|
*/
|
|
#define __HAL_UART_HWCONTROL_CTS_ENABLE(__HANDLE__) \
|
|
do{ \
|
|
SET_BIT((__HANDLE__)->Instance->CR3, USART_CR3_CTSE); \
|
|
(__HANDLE__)->Init.HwFlowCtl |= USART_CR3_CTSE; \
|
|
} while(0)
|
|
|
|
/** @brief Disable CTS flow control
|
|
* This macro allows to disable CTS hardware flow control for a given UART instance,
|
|
* without need to call HAL_UART_Init() function.
|
|
* As involving direct access to UART registers, usage of this macro should be fully endorsed by user.
|
|
* @note As macro is expected to be used for modifying CTS Hw flow control feature activation, without need
|
|
* for USART instance Deinit/Init, following conditions for macro call should be fulfilled :
|
|
* - UART instance should have already been initialised (through call of HAL_UART_Init() )
|
|
* - macro could only be called when corresponding UART instance is disabled (i.e __HAL_UART_DISABLE(__HANDLE__))
|
|
* and should be followed by an Enable macro (i.e __HAL_UART_ENABLE(__HANDLE__)).
|
|
* @param __HANDLE__: specifies the UART Handle.
|
|
* The Handle Instance can be USART1, USART2 or LPUART.
|
|
* @retval None
|
|
*/
|
|
#define __HAL_UART_HWCONTROL_CTS_DISABLE(__HANDLE__) \
|
|
do{ \
|
|
CLEAR_BIT((__HANDLE__)->Instance->CR3, USART_CR3_CTSE); \
|
|
(__HANDLE__)->Init.HwFlowCtl &= ~(USART_CR3_CTSE); \
|
|
} while(0)
|
|
|
|
/** @brief Enable RTS flow control
|
|
* This macro allows to enable RTS hardware flow control for a given UART instance,
|
|
* without need to call HAL_UART_Init() function.
|
|
* As involving direct access to UART registers, usage of this macro should be fully endorsed by user.
|
|
* @note As macro is expected to be used for modifying RTS Hw flow control feature activation, without need
|
|
* for USART instance Deinit/Init, following conditions for macro call should be fulfilled :
|
|
* - UART instance should have already been initialised (through call of HAL_UART_Init() )
|
|
* - macro could only be called when corresponding UART instance is disabled (i.e __HAL_UART_DISABLE(__HANDLE__))
|
|
* and should be followed by an Enable macro (i.e __HAL_UART_ENABLE(__HANDLE__)).
|
|
* @param __HANDLE__: specifies the UART Handle.
|
|
* The Handle Instance can be USART1, USART2 or LPUART.
|
|
* @retval None
|
|
*/
|
|
#define __HAL_UART_HWCONTROL_RTS_ENABLE(__HANDLE__) \
|
|
do{ \
|
|
SET_BIT((__HANDLE__)->Instance->CR3, USART_CR3_RTSE); \
|
|
(__HANDLE__)->Init.HwFlowCtl |= USART_CR3_RTSE; \
|
|
} while(0)
|
|
|
|
/** @brief Disable RTS flow control
|
|
* This macro allows to disable RTS hardware flow control for a given UART instance,
|
|
* without need to call HAL_UART_Init() function.
|
|
* As involving direct access to UART registers, usage of this macro should be fully endorsed by user.
|
|
* @note As macro is expected to be used for modifying RTS Hw flow control feature activation, without need
|
|
* for USART instance Deinit/Init, following conditions for macro call should be fulfilled :
|
|
* - UART instance should have already been initialised (through call of HAL_UART_Init() )
|
|
* - macro could only be called when corresponding UART instance is disabled (i.e __HAL_UART_DISABLE(__HANDLE__))
|
|
* and should be followed by an Enable macro (i.e __HAL_UART_ENABLE(__HANDLE__)).
|
|
* @param __HANDLE__: specifies the UART Handle.
|
|
* The Handle Instance can be USART1, USART2 or LPUART.
|
|
* @retval None
|
|
*/
|
|
#define __HAL_UART_HWCONTROL_RTS_DISABLE(__HANDLE__) \
|
|
do{ \
|
|
CLEAR_BIT((__HANDLE__)->Instance->CR3, USART_CR3_RTSE);\
|
|
(__HANDLE__)->Init.HwFlowCtl &= ~(USART_CR3_RTSE); \
|
|
} while(0)
|
|
|
|
/** @brief macros to enables the UART's one bit sample method
|
|
* @param __HANDLE__: specifies the UART Handle.
|
|
* @retval None
|
|
*/
|
|
#define __HAL_UART_ONE_BIT_SAMPLE_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3|= USART_CR3_ONEBIT)
|
|
|
|
/** @brief macros to disables the UART's one bit sample method
|
|
* @param __HANDLE__: specifies the UART Handle.
|
|
* @retval None
|
|
*/
|
|
#define __HAL_UART_ONE_BIT_SAMPLE_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3 &= (uint16_t)~((uint16_t)USART_CR3_ONEBIT))
|
|
|
|
/** @brief Enable UART
|
|
* @param __HANDLE__: specifies the UART Handle.
|
|
* @retval None
|
|
*/
|
|
#define __HAL_UART_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 |= USART_CR1_UE)
|
|
|
|
/** @brief Disable UART
|
|
* @param __HANDLE__: specifies the UART Handle.
|
|
* @retval None
|
|
*/
|
|
#define __HAL_UART_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= ~USART_CR1_UE)
|
|
/**
|
|
* @}
|
|
*/
|
|
|
|
/* Exported functions --------------------------------------------------------*/
|
|
/** @addtogroup UART_Exported_Functions
|
|
* @{
|
|
*/
|
|
|
|
/** @addtogroup UART_Exported_Functions_Group1
|
|
* @{
|
|
*/
|
|
/* Initialization/de-initialization functions **********************************/
|
|
HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart);
|
|
HAL_StatusTypeDef HAL_HalfDuplex_Init(UART_HandleTypeDef *huart);
|
|
HAL_StatusTypeDef HAL_LIN_Init(UART_HandleTypeDef *huart, uint32_t BreakDetectLength);
|
|
HAL_StatusTypeDef HAL_MultiProcessor_Init(UART_HandleTypeDef *huart, uint8_t Address, uint32_t WakeUpMethod);
|
|
HAL_StatusTypeDef HAL_UART_DeInit (UART_HandleTypeDef *huart);
|
|
void HAL_UART_MspInit(UART_HandleTypeDef *huart);
|
|
void HAL_UART_MspDeInit(UART_HandleTypeDef *huart);
|
|
/**
|
|
* @}
|
|
*/
|
|
|
|
/** @addtogroup UART_Exported_Functions_Group2
|
|
* @{
|
|
*/
|
|
/* IO operation functions *******************************************************/
|
|
HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout);
|
|
HAL_StatusTypeDef HAL_UART_Receive(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout);
|
|
HAL_StatusTypeDef HAL_UART_Transmit_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size);
|
|
HAL_StatusTypeDef HAL_UART_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size);
|
|
HAL_StatusTypeDef HAL_UART_Transmit_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size);
|
|
HAL_StatusTypeDef HAL_UART_Receive_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size);
|
|
HAL_StatusTypeDef HAL_UART_DMAPause(UART_HandleTypeDef *huart);
|
|
HAL_StatusTypeDef HAL_UART_DMAResume(UART_HandleTypeDef *huart);
|
|
HAL_StatusTypeDef HAL_UART_DMAStop(UART_HandleTypeDef *huart);
|
|
|
|
void HAL_UART_IRQHandler(UART_HandleTypeDef *huart);
|
|
void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart);
|
|
void HAL_UART_TxHalfCpltCallback(UART_HandleTypeDef *huart);
|
|
void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart);
|
|
void HAL_UART_RxHalfCpltCallback(UART_HandleTypeDef *huart);
|
|
void HAL_UART_ErrorCallback(UART_HandleTypeDef *huart);
|
|
/**
|
|
* @}
|
|
*/
|
|
|
|
/** @addtogroup UART_Exported_Functions_Group3
|
|
* @{
|
|
*/
|
|
/* Peripheral Control functions ************************************************/
|
|
HAL_StatusTypeDef HAL_LIN_SendBreak(UART_HandleTypeDef *huart);
|
|
HAL_StatusTypeDef HAL_MultiProcessor_EnterMuteMode(UART_HandleTypeDef *huart);
|
|
HAL_StatusTypeDef HAL_MultiProcessor_ExitMuteMode(UART_HandleTypeDef *huart);
|
|
HAL_StatusTypeDef HAL_HalfDuplex_EnableTransmitter(UART_HandleTypeDef *huart);
|
|
HAL_StatusTypeDef HAL_HalfDuplex_EnableReceiver(UART_HandleTypeDef *huart);
|
|
/**
|
|
* @}
|
|
*/
|
|
|
|
/** @addtogroup UART_Exported_Functions_Group4
|
|
* @{
|
|
*/
|
|
/* Peripheral State functions **************************************************/
|
|
HAL_UART_StateTypeDef HAL_UART_GetState(UART_HandleTypeDef *huart);
|
|
uint32_t HAL_UART_GetError(UART_HandleTypeDef *huart);
|
|
/**
|
|
* @}
|
|
*/
|
|
|
|
/**
|
|
* @}
|
|
*/
|
|
/* Private types -------------------------------------------------------------*/
|
|
/* Private variables ---------------------------------------------------------*/
|
|
/* Private constants ---------------------------------------------------------*/
|
|
/** @defgroup UART_Private_Constants UART Private Constants
|
|
* @{
|
|
*/
|
|
/** @brief UART interruptions flag mask
|
|
*
|
|
*/
|
|
#define UART_CR1_REG_INDEX 1U
|
|
#define UART_CR2_REG_INDEX 2U
|
|
#define UART_CR3_REG_INDEX 3U
|
|
/**
|
|
* @}
|
|
*/
|
|
|
|
/* Private macros ------------------------------------------------------------*/
|
|
/** @defgroup UART_Private_Macros UART Private Macros
|
|
* @{
|
|
*/
|
|
#define IS_UART_WORD_LENGTH(LENGTH) (((LENGTH) == UART_WORDLENGTH_8B) || \
|
|
((LENGTH) == UART_WORDLENGTH_9B))
|
|
#define IS_UART_LIN_WORD_LENGTH(LENGTH) (((LENGTH) == UART_WORDLENGTH_8B))
|
|
#define IS_UART_STOPBITS(STOPBITS) (((STOPBITS) == UART_STOPBITS_1) || \
|
|
((STOPBITS) == UART_STOPBITS_2))
|
|
#define IS_UART_PARITY(PARITY) (((PARITY) == UART_PARITY_NONE) || \
|
|
((PARITY) == UART_PARITY_EVEN) || \
|
|
((PARITY) == UART_PARITY_ODD))
|
|
#define IS_UART_HARDWARE_FLOW_CONTROL(CONTROL)\
|
|
(((CONTROL) == UART_HWCONTROL_NONE) || \
|
|
((CONTROL) == UART_HWCONTROL_RTS) || \
|
|
((CONTROL) == UART_HWCONTROL_CTS) || \
|
|
((CONTROL) == UART_HWCONTROL_RTS_CTS))
|
|
#define IS_UART_MODE(MODE) ((((MODE) & (uint32_t)0x0000FFF3U) == 0x00U) && ((MODE) != (uint32_t)0x00U))
|
|
#define IS_UART_STATE(STATE) (((STATE) == UART_STATE_DISABLE) || \
|
|
((STATE) == UART_STATE_ENABLE))
|
|
#define IS_UART_OVERSAMPLING(SAMPLING) (((SAMPLING) == UART_OVERSAMPLING_16) || \
|
|
((SAMPLING) == UART_OVERSAMPLING_8))
|
|
#define IS_UART_LIN_OVERSAMPLING(SAMPLING) (((SAMPLING) == UART_OVERSAMPLING_16))
|
|
#define IS_UART_LIN_BREAK_DETECT_LENGTH(LENGTH) (((LENGTH) == UART_LINBREAKDETECTLENGTH_10B) || \
|
|
((LENGTH) == UART_LINBREAKDETECTLENGTH_11B))
|
|
#define IS_UART_WAKEUPMETHOD(WAKEUP) (((WAKEUP) == UART_WAKEUPMETHOD_IDLELINE) || \
|
|
((WAKEUP) == UART_WAKEUPMETHOD_ADDRESSMARK))
|
|
#define IS_UART_BAUDRATE(BAUDRATE) ((BAUDRATE) < 10500001U)
|
|
#define IS_UART_ADDRESS(ADDRESS) ((ADDRESS) <= 0x0FU)
|
|
|
|
#define UART_DIV_SAMPLING16(_PCLK_, _BAUD_) (((_PCLK_)*25U)/(4U*(_BAUD_)))
|
|
#define UART_DIVMANT_SAMPLING16(_PCLK_, _BAUD_) (UART_DIV_SAMPLING16((_PCLK_), (_BAUD_))/100U)
|
|
#define UART_DIVFRAQ_SAMPLING16(_PCLK_, _BAUD_) (((UART_DIV_SAMPLING16((_PCLK_), (_BAUD_)) - (UART_DIVMANT_SAMPLING16((_PCLK_), (_BAUD_)) * 100U)) * 16U + 50U) / 100U)
|
|
/* UART BRR = mantissa + overflow + fraction
|
|
= (UART DIVMANT << 4) + (UART DIVFRAQ & 0xF0) + (UART DIVFRAQ & 0x0FU) */
|
|
#define UART_BRR_SAMPLING16(_PCLK_, _BAUD_) (((UART_DIVMANT_SAMPLING16((_PCLK_), (_BAUD_)) << 4U) + \
|
|
(UART_DIVFRAQ_SAMPLING16((_PCLK_), (_BAUD_)) & 0xF0U)) + \
|
|
(UART_DIVFRAQ_SAMPLING16((_PCLK_), (_BAUD_)) & 0x0FU))
|
|
|
|
#define UART_DIV_SAMPLING8(_PCLK_, _BAUD_) (((_PCLK_)*25U)/(2U*(_BAUD_)))
|
|
#define UART_DIVMANT_SAMPLING8(_PCLK_, _BAUD_) (UART_DIV_SAMPLING8((_PCLK_), (_BAUD_))/100U)
|
|
#define UART_DIVFRAQ_SAMPLING8(_PCLK_, _BAUD_) (((UART_DIV_SAMPLING8((_PCLK_), (_BAUD_)) - (UART_DIVMANT_SAMPLING8((_PCLK_), (_BAUD_)) * 100U)) * 8U + 50U) / 100U)
|
|
/* UART BRR = mantissa + overflow + fraction
|
|
= (UART DIVMANT << 4) + ((UART DIVFRAQ & 0xF8) << 1) + (UART DIVFRAQ & 0x07U) */
|
|
#define UART_BRR_SAMPLING8(_PCLK_, _BAUD_) (((UART_DIVMANT_SAMPLING8((_PCLK_), (_BAUD_)) << 4U) + \
|
|
((UART_DIVFRAQ_SAMPLING8((_PCLK_), (_BAUD_)) & 0xF8U) << 1U)) + \
|
|
(UART_DIVFRAQ_SAMPLING8((_PCLK_), (_BAUD_)) & 0x07U))
|
|
|
|
/**
|
|
* @}
|
|
*/
|
|
|
|
/* Private functions ---------------------------------------------------------*/
|
|
/** @defgroup UART_Private_Functions UART Private Functions
|
|
* @{
|
|
*/
|
|
|
|
/**
|
|
* @}
|
|
*/
|
|
|
|
/**
|
|
* @}
|
|
*/
|
|
|
|
/**
|
|
* @}
|
|
*/
|
|
|
|
#ifdef __cplusplus
|
|
}
|
|
#endif
|
|
|
|
#endif /* __STM32F4xx_HAL_UART_H */
|
|
|
|
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|