8785645a95
The port currently implements support for GPIO, RTC, ExtInt and the WiFi subsystem. A small file system is available in the serial flash. A bootloader which makes OTA updates possible, is also part of this initial implementation.
218 lines
9.5 KiB
C
218 lines
9.5 KiB
C
//*****************************************************************************
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//
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// aes.h
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//
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// Defines and Macros for the AES module.
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//
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// Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
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//
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//
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// Redistribution and use in source and binary forms, with or without
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// modification, are permitted provided that the following conditions
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// are met:
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//
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// Redistributions of source code must retain the above copyright
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// notice, this list of conditions and the following disclaimer.
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//
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// Redistributions in binary form must reproduce the above copyright
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// notice, this list of conditions and the following disclaimer in the
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// documentation and/or other materials provided with the
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// distribution.
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//
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// Neither the name of Texas Instruments Incorporated nor the names of
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// its contributors may be used to endorse or promote products derived
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// from this software without specific prior written permission.
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//
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// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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//
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//*****************************************************************************
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#ifndef __DRIVERLIB_AES_H__
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#define __DRIVERLIB_AES_H__
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//*****************************************************************************
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//
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// If building with a C++ compiler, make all of the definitions in this header
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// have a C binding.
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//
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//*****************************************************************************
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#ifdef __cplusplus
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extern "C"
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{
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#endif
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//*****************************************************************************
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//
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// The following defines are used to specify the operation direction in the
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// ui32Config argument in the AESConfig function. Only one is permitted.
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//
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//*****************************************************************************
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#define AES_CFG_DIR_ENCRYPT 0x00000004
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#define AES_CFG_DIR_DECRYPT 0x00000000
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//*****************************************************************************
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//
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// The following defines are used to specify the key size in the ui32Config
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// argument in the AESConfig function. Only one is permitted.
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//
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//*****************************************************************************
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#define AES_CFG_KEY_SIZE_128BIT 0x00000008
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#define AES_CFG_KEY_SIZE_192BIT 0x00000010
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#define AES_CFG_KEY_SIZE_256BIT 0x00000018
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//*****************************************************************************
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//
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// The following defines are used to specify the mode of operation in the
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// ui32Config argument in the AESConfig function. Only one is permitted.
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//
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//*****************************************************************************
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#define AES_CFG_MODE_M 0x2007fe60
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#define AES_CFG_MODE_ECB 0x00000000
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#define AES_CFG_MODE_CBC 0x00000020
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#define AES_CFG_MODE_CTR 0x00000040
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#define AES_CFG_MODE_ICM 0x00000200
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#define AES_CFG_MODE_CFB 0x00000400
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#define AES_CFG_MODE_XTS_TWEAKJL \
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0x00000800
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#define AES_CFG_MODE_XTS_K2IJL \
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0x00001000
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#define AES_CFG_MODE_XTS_K2ILJ0 \
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0x00001800
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#define AES_CFG_MODE_F8 0x00002000
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#define AES_CFG_MODE_F9 0x20004000
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#define AES_CFG_MODE_CBCMAC 0x20008000
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#define AES_CFG_MODE_GCM_HLY0ZERO \
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0x20010040
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#define AES_CFG_MODE_GCM_HLY0CALC \
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0x20020040
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#define AES_CFG_MODE_GCM_HY0CALC \
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0x20030040
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#define AES_CFG_MODE_CCM 0x20040040
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//*****************************************************************************
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//
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// The following defines are used to specify the counter width in the
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// ui32Config argument in the AESConfig function. It is only required to
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// be defined when using CTR, CCM, or GCM modes. Only one length is permitted.
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//
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//*****************************************************************************
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#define AES_CFG_CTR_WIDTH_32 0x00000000
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#define AES_CFG_CTR_WIDTH_64 0x00000080
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#define AES_CFG_CTR_WIDTH_96 0x00000100
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#define AES_CFG_CTR_WIDTH_128 0x00000180
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//*****************************************************************************
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//
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// The following defines are used to define the width of the length field for
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// CCM operation through the ui32Config argument in the AESConfig function.
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// This value is also known as L. Only one is permitted.
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//
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//*****************************************************************************
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#define AES_CFG_CCM_L_2 0x00080000
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#define AES_CFG_CCM_L_4 0x00180000
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#define AES_CFG_CCM_L_8 0x00380000
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//*****************************************************************************
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//
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// The following defines are used to define the length of the authentication
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// field for CCM operations through the ui32Config argument in the AESConfig
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// function. This value is also known as M. Only one is permitted.
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//
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//*****************************************************************************
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#define AES_CFG_CCM_M_4 0x00400000
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#define AES_CFG_CCM_M_6 0x00800000
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#define AES_CFG_CCM_M_8 0x00c00000
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#define AES_CFG_CCM_M_10 0x01000000
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#define AES_CFG_CCM_M_12 0x01400000
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#define AES_CFG_CCM_M_14 0x01800000
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#define AES_CFG_CCM_M_16 0x01c00000
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//*****************************************************************************
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//
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// Interrupt flags for use with the AESIntEnable, AESIntDisable, and
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// AESIntStatus functions.
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//
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//*****************************************************************************
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#define AES_INT_CONTEXT_IN 0x00000001
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#define AES_INT_CONTEXT_OUT 0x00000008
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#define AES_INT_DATA_IN 0x00000002
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#define AES_INT_DATA_OUT 0x00000004
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#define AES_INT_DMA_CONTEXT_IN 0x00010000
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#define AES_INT_DMA_CONTEXT_OUT 0x00020000
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#define AES_INT_DMA_DATA_IN 0x00040000
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#define AES_INT_DMA_DATA_OUT 0x00080000
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//*****************************************************************************
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//
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// Defines used when enabling and disabling DMA requests in the
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// AESEnableDMA and AESDisableDMA functions.
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//
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//*****************************************************************************
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#define AES_DMA_DATA_IN 0x00000040
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#define AES_DMA_DATA_OUT 0x00000020
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#define AES_DMA_CONTEXT_IN 0x00000080
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#define AES_DMA_CONTEXT_OUT 0x00000100
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//*****************************************************************************
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//
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// Function prototypes.
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//
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//*****************************************************************************
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extern void AESConfigSet(uint32_t ui32Base, uint32_t ui32Config);
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extern void AESKey1Set(uint32_t ui32Base, uint8_t *pui8Key,
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uint32_t ui32Keysize);
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extern void AESKey2Set(uint32_t ui32Base, uint8_t *pui8Key,
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uint32_t ui32Keysize);
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extern void AESKey3Set(uint32_t ui32Base, uint8_t *pui8Key);
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extern void AESIVSet(uint32_t ui32Base, uint8_t *pui8IVdata);
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extern void AESTagRead(uint32_t ui32Base, uint8_t *pui8TagData);
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extern void AESDataLengthSet(uint32_t ui32Base, uint64_t ui64Length);
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extern void AESAuthDataLengthSet(uint32_t ui32Base, uint32_t ui32Length);
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extern bool AESDataReadNonBlocking(uint32_t ui32Base, uint8_t *pui8Dest,
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uint8_t ui8Length);
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extern void AESDataRead(uint32_t ui32Base, uint8_t *pui8Dest,
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uint8_t ui8Length);
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extern bool AESDataWriteNonBlocking(uint32_t ui32Base, uint8_t *pui8Src,
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uint8_t ui8Length);
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extern void AESDataWrite(uint32_t ui32Base, uint8_t *pui8Src,
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uint8_t ui8Length);
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extern bool AESDataProcess(uint32_t ui32Base, uint8_t *pui8Src,
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uint8_t *pui8Dest,
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uint32_t ui32Length);
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extern bool AESDataMAC(uint32_t ui32Base, uint8_t *pui8Src,
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uint32_t ui32Length,
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uint8_t *pui8Tag);
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extern bool AESDataProcessAE(uint32_t ui32Base, uint8_t *pui8Src,
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uint8_t *pui8Dest, uint32_t ui32Length,
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uint8_t *pui8AuthSrc, uint32_t ui32AuthLength,
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uint8_t *pui8Tag);
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extern uint32_t AESIntStatus(uint32_t ui32Base, bool bMasked);
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extern void AESIntEnable(uint32_t ui32Base, uint32_t ui32IntFlags);
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extern void AESIntDisable(uint32_t ui32Base, uint32_t ui32IntFlags);
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extern void AESIntClear(uint32_t ui32Base, uint32_t ui32IntFlags);
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extern void AESIntRegister(uint32_t ui32Base, void(*pfnHandler)(void));
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extern void AESIntUnregister(uint32_t ui32Base);
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extern void AESDMAEnable(uint32_t ui32Base, uint32_t ui32Flags);
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extern void AESDMADisable(uint32_t ui32Base, uint32_t ui32Flags);
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//*****************************************************************************
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//
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// Mark the end of the C bindings section for C++ compilers.
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//
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//*****************************************************************************
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#ifdef __cplusplus
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}
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#endif
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#endif // __DRIVERLIB_AES_H__
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