1dc366f901
The Pin config setting by IOMUXC_SetPinConfig() is supplied by a bit pattern. That pattern is specific for a MCU family. In preparation for supporting the MIMXRT117x family, the constant bit pattern is replaced by a function call, such that the bit pattern is created at a single place. The code for this functions was taken from machine_pin.c. Note: A working port for the MIMXRT1176 exists already.
619 lines
21 KiB
C
619 lines
21 KiB
C
/*
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* This file is part of the MicroPython project, http://micropython.org/
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*
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* The MIT License (MIT)
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*
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* Copyright (c) 2020-2021 Damien P. George
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* Copyright (c) 2021 Robert Hammelrath
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#include "py/runtime.h"
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#include "py/mphal.h"
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#include "modmachine.h"
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#include "pin.h"
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#include "fsl_clock.h"
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#include "fsl_iomuxc.h"
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#include "hal/pwm_backport.h"
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#define PWM_MIDDLE (0)
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#define PWM_BEGIN (1)
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#define PWM_END (2)
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#define PWM_CHANNEL1 (1)
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#define PWM_CHANNEL2 (2)
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typedef struct _machine_pwm_obj_t {
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mp_obj_base_t base;
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PWM_Type *instance;
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bool is_flexpwm;
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uint8_t complementary;
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uint8_t module;
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uint8_t submodule;
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uint8_t channel1;
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uint8_t channel2;
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uint8_t invert;
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bool sync;
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uint32_t freq;
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int16_t prescale;
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uint16_t duty_u16;
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uint32_t duty_ns;
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uint16_t center;
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uint32_t deadtime;
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bool output_enable_1;
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bool output_enable_2;
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uint8_t xor;
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bool is_init;
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} machine_pwm_obj_t;
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static char channel_char[] = {'B', 'A', 'X' };
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static char *ERRMSG_FREQ = "PWM frequency too low";
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static char *ERRMSG_INIT = "PWM set-up failed";
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static char *ERRMSG_VALUE = "value larger than period";
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STATIC void machine_pwm_start(machine_pwm_obj_t *self);
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STATIC void mp_machine_pwm_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) {
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machine_pwm_obj_t *self = MP_OBJ_TO_PTR(self_in);
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if (self->is_flexpwm) {
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mp_printf(print, "<FLEXPWM module=%u submodule=%u ", self->module, self->submodule);
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if (self->complementary) {
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mp_printf(print, "channel=%c/%c", channel_char[self->channel1], channel_char[self->channel2]);
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} else {
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mp_printf(print, "channel=%c", channel_char[self->channel1]);
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}
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if (self->duty_ns != 0) {
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mp_printf(print, " duty_ns=%u", self->duty_ns);
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} else {
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mp_printf(print, " duty_u16=%u", self->duty_u16);
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}
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mp_printf(print, " freq=%u center=%u, deadtime=%u, sync=%u>",
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self->freq, self->center, self->deadtime, self->sync);
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#ifdef FSL_FEATURE_SOC_TMR_COUNT
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} else {
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mp_printf(print, "<QTMR_PWM module=%u channel=%u freq1=%u ",
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self->module, self->channel1, self->freq);
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if (self->duty_ns != 0) {
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mp_printf(print, "duty_ns=%u>", self->duty_ns);
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} else {
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mp_printf(print, "duty_u16=%u>", self->duty_u16);
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}
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#endif
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}
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}
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// Utility functions for decoding and convertings
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//
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STATIC uint32_t duty_ns_to_duty_u16(uint32_t freq, uint32_t duty_ns) {
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uint64_t duty = (uint64_t)duty_ns * freq * PWM_FULL_SCALE / 1000000000ULL;
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if (duty >= PWM_FULL_SCALE) {
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mp_raise_ValueError(MP_ERROR_TEXT(ERRMSG_VALUE));
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}
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return (uint32_t)duty;
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}
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STATIC uint8_t module_decode(char channel) {
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switch (channel) {
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case '0':
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return kPWM_Module_0;
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case '1':
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return kPWM_Module_1;
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case '2':
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return kPWM_Module_2;
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case '3':
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return kPWM_Module_3;
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default:
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return kPWM_Module_1;
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}
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}
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STATIC uint8_t channel_decode(char channel) {
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switch (channel) {
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case 'A':
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return kPWM_PwmA;
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case 'B':
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return kPWM_PwmB;
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case 'X':
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return kPWM_PwmX;
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default:
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return kPWM_PwmA;
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}
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}
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// decode the AF objects module and Port numer. Returns NULL if it is not a FLEXPWM object
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STATIC const machine_pin_af_obj_t *af_name_decode_flexpwm(const machine_pin_af_obj_t *af_obj,
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uint8_t *module, uint8_t *submodule, uint8_t *channel) {
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const char *str;
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size_t len;
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str = (char *)qstr_data(af_obj->name, &len);
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// test for the name starting with FLEXPWM
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if (len < 15 || strncmp(str, "FLEXPWM", 7) != 0) {
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return NULL;
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}
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// Get module, submodule and channel from the name, e.g. FLEXPWM1_PWM0_A
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*module = str[7] - '0';
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*submodule = module_decode(str[12]);
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*channel = channel_decode(str[14]);
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return af_obj;
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}
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#ifdef FSL_FEATURE_SOC_TMR_COUNT
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STATIC uint8_t qtmr_decode(char channel) {
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switch (channel) {
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case '0':
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return kQTMR_Channel_0;
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case '1':
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return kQTMR_Channel_1;
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case '2':
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return kQTMR_Channel_2;
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case '3':
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return kQTMR_Channel_3;
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default:
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return kPWM_Module_1;
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}
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}
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// decode the AF objects module and Port numer. Returns NULL if it is not a QTMR object
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STATIC const machine_pin_af_obj_t *af_name_decode_qtmr(const machine_pin_af_obj_t *af_obj, uint8_t *module, uint8_t *channel) {
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const char *str;
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size_t len;
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str = (char *)qstr_data(af_obj->name, &len);
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// test for the name starting with TMR
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if (len < 11 || strncmp(str, "TMR", 3) != 0) {
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return NULL;
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}
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// Get module, submodule and channel from the name, e.g. FLEXPWM1_PWM0_A
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*module = str[3] - '0';
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*channel = qtmr_decode(str[10]);
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return af_obj;
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}
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#endif
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STATIC bool is_board_pin(const machine_pin_obj_t *pin) {
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for (int i = 0; i < num_board_pins; i++) {
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if (pin == machine_pin_board_pins[i]) {
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return true;
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}
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}
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return false;
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}
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// Functions for configuring the PWM Device
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//
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STATIC int calc_prescaler(uint32_t clock, uint32_t freq) {
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float temp = (float)clock / (float)PWM_FULL_SCALE / (float)freq;
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for (int prescale = 0; prescale < 8; prescale++, temp /= 2) {
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if (temp <= 1) {
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return prescale;
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}
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}
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// Frequency too low, cannot scale down.
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return -1;
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}
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STATIC void configure_flexpwm(machine_pwm_obj_t *self) {
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pwm_signal_param_u16_t pwmSignal;
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// Initialize PWM module.
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uint32_t pwmSourceClockInHz = CLOCK_GetFreq(kCLOCK_IpgClk);
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int prescale = calc_prescaler(pwmSourceClockInHz, self->freq);
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if (prescale < 0) {
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mp_raise_ValueError(MP_ERROR_TEXT(ERRMSG_FREQ));
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}
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if (self->prescale != prescale || self->is_init == false) {
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pwm_config_t pwmConfig;
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PWM_GetDefaultConfig(&pwmConfig);
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self->prescale = prescale;
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pwmConfig.prescale = prescale;
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pwmConfig.reloadLogic = kPWM_ReloadPwmFullCycle;
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if (self->complementary) {
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pwmConfig.pairOperation = self->channel1 == kPWM_PwmA ? kPWM_ComplementaryPwmA : kPWM_ComplementaryPwmB;
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} else {
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pwmConfig.pairOperation = kPWM_Independent;
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}
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pwmConfig.clockSource = kPWM_BusClock;
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pwmConfig.enableWait = false;
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pwmConfig.initializationControl = self->sync ? kPWM_Initialize_MasterSync : kPWM_Initialize_LocalSync;
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if (PWM_Init(self->instance, self->submodule, &pwmConfig) == kStatus_Fail) {
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mp_raise_ValueError(MP_ERROR_TEXT(ERRMSG_INIT));
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}
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}
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// Disable the fault detect function to avoid using the xbara
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PWM_SetupFaultDisableMap(self->instance, self->submodule, self->channel1, kPWM_faultchannel_0, 0);
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PWM_SetupFaultDisableMap(self->instance, self->submodule, self->channel1, kPWM_faultchannel_1, 0);
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if (self->complementary) {
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PWM_SetupFaultDisableMap(self->instance, self->submodule, self->channel2, kPWM_faultchannel_0, 0);
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PWM_SetupFaultDisableMap(self->instance, self->submodule, self->channel2, kPWM_faultchannel_1, 0);
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}
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if (self->channel1 != kPWM_PwmX) { // Only for A/B channels
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// Initialize the channel parameters
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pwmSignal.pwmChannel = self->channel1;
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pwmSignal.level = (self->invert & PWM_CHANNEL1) ? kPWM_LowTrue : kPWM_HighTrue;
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pwmSignal.dutyCycle_u16 = self->duty_u16;
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pwmSignal.Center_u16 = self->center;
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pwmSignal.deadtimeValue = ((uint64_t)pwmSourceClockInHz * self->deadtime) / 1000000000ULL;
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PWM_SetupPwm_u16(self->instance, self->submodule, &pwmSignal, self->freq,
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pwmSourceClockInHz, self->output_enable_1);
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if (self->complementary) {
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// Initialize the second channel of the pair.
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pwmSignal.pwmChannel = self->channel2;
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pwmSignal.level = (self->invert & PWM_CHANNEL2) ? kPWM_LowTrue : kPWM_HighTrue;
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PWM_SetupPwm_u16(self->instance, self->submodule, &pwmSignal, self->freq,
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pwmSourceClockInHz, self->output_enable_2);
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}
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if (self->xor == 1) {
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// Set the DBLEN bit for A, B = A ^ B
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self->instance->SM[self->submodule].CTRL &= ~PWM_CTRL_SPLIT_MASK;
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self->instance->SM[self->submodule].CTRL |= PWM_CTRL_DBLEN_MASK;
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} else if (self->xor == 2) {
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// Set the DBLEN and SPLIT bits for A, B = A ^ B
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self->instance->SM[self->submodule].CTRL |= PWM_CTRL_DBLEN_MASK | PWM_CTRL_SPLIT_MASK;
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} else {
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self->instance->SM[self->submodule].CTRL &= ~(PWM_CTRL_DBLEN_MASK | PWM_CTRL_SPLIT_MASK);
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}
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} else {
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PWM_SetupPwmx_u16(self->instance, self->submodule, self->freq, self->duty_u16,
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self->invert, pwmSourceClockInHz);
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if (self->xor) {
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// Set the DBLX bit for X = A ^ B
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self->instance->SM[self->submodule].CTRL |= PWM_CTRL_DBLX_MASK;
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} else {
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self->instance->SM[self->submodule].CTRL &= ~PWM_CTRL_DBLX_MASK;
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}
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}
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// Set the load okay bit for the submodules
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PWM_SetPwmLdok(self->instance, 1 << self->submodule, true);
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// Start the PWM generation from the Submodules
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PWM_StartTimer(self->instance, 1 << self->submodule);
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}
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#ifdef FSL_FEATURE_SOC_TMR_COUNT
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STATIC void configure_qtmr(machine_pwm_obj_t *self) {
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qtmr_config_t qtmrConfig;
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int prescale;
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TMR_Type *instance = (TMR_Type *)self->instance;
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prescale = calc_prescaler(CLOCK_GetFreq(kCLOCK_IpgClk), self->freq);
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if (prescale < 0) {
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mp_raise_ValueError(MP_ERROR_TEXT(ERRMSG_FREQ));
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}
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if (prescale != self->prescale) {
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QTMR_GetDefaultConfig(&qtmrConfig);
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qtmrConfig.primarySource = prescale + kQTMR_ClockDivide_1;
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QTMR_Init(instance, self->channel1, &qtmrConfig);
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self->prescale = prescale;
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}
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// Set up the PWM channel
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if (QTMR_SetupPwm_u16(instance, self->channel1, self->freq, self->duty_u16,
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self->invert, CLOCK_GetFreq(kCLOCK_IpgClk) / (1 << prescale), self->is_init) == kStatus_Fail) {
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mp_raise_ValueError(MP_ERROR_TEXT(ERRMSG_INIT));
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}
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// Start the output
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QTMR_StartTimer(instance, self->channel1, kQTMR_PriSrcRiseEdge);
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}
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#endif // FSL_FEATURE_SOC_TMR_COUNT
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STATIC void configure_pwm(machine_pwm_obj_t *self) {
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// Set the clock frequencies
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// Freq range is 15Hz to ~ 3 MHz.
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static bool set_frequency = true;
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// set the frequency only once
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if (set_frequency) {
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CLOCK_SetDiv(kCLOCK_IpgDiv, 0x3); // Set IPG PODF to 3, divide by 4
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set_frequency = false;
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}
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if (self->duty_ns != 0) {
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self->duty_u16 = duty_ns_to_duty_u16(self->freq, self->duty_ns);
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}
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if (self->is_flexpwm) {
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configure_flexpwm(self);
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#ifdef FSL_FEATURE_SOC_TMR_COUNT
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} else {
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configure_qtmr(self);
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#endif
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}
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}
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// Micropython API functions
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//
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STATIC void mp_machine_pwm_init_helper(machine_pwm_obj_t *self,
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size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) {
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enum { ARG_freq, ARG_duty_u16, ARG_duty_ns, ARG_center, ARG_align,
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ARG_invert, ARG_sync, ARG_xor, ARG_deadtime };
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static const mp_arg_t allowed_args[] = {
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{ MP_QSTR_freq, MP_ARG_INT, {.u_int = 0} },
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{ MP_QSTR_duty_u16, MP_ARG_INT, {.u_int = 0} },
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{ MP_QSTR_duty_ns, MP_ARG_INT, {.u_int = 0} },
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{ MP_QSTR_center, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = -1} },
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{ MP_QSTR_align, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = -1}},
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{ MP_QSTR_invert, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = -1}},
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{ MP_QSTR_sync, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = -1}},
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{ MP_QSTR_xor, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = -1}},
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{ MP_QSTR_deadtime, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = -1}},
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};
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mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)];
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mp_arg_parse_all(n_args, pos_args, kw_args,
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MP_ARRAY_SIZE(allowed_args), allowed_args, args);
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if ((n_args + kw_args->used) > 0 || self->is_init == false) {
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// Maybe change PWM timer
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if (args[ARG_freq].u_int > 0) {
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self->freq = args[ARG_freq].u_int;
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}
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// Set duty_u16 cycle?
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uint32_t duty = args[ARG_duty_u16].u_int;
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if (duty != 0) {
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if (duty >= PWM_FULL_SCALE) {
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mp_raise_ValueError(MP_ERROR_TEXT(ERRMSG_VALUE));
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}
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self->duty_u16 = duty;
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self->duty_ns = 0;
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}
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// Set duty_ns value?
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duty = args[ARG_duty_ns].u_int;
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if (duty != 0) {
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self->duty_ns = duty;
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self->duty_u16 = duty_ns_to_duty_u16(self->freq, self->duty_ns);
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}
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// Set center value?
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int32_t center = args[ARG_center].u_int;
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if (center >= 0) {
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if (center >= PWM_FULL_SCALE) {
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mp_raise_ValueError(MP_ERROR_TEXT(ERRMSG_VALUE));
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}
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self->center = center;
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} else { // Use alignment setting shortcut
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if (args[ARG_align].u_int >= 0) {
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uint8_t align = args[ARG_align].u_int & 3; // limit to 0..3
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if (align == PWM_BEGIN) {
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self->center = self->duty_u16 / 2;
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} else if (align == PWM_END) {
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self->center = PWM_FULL_SCALE - self->duty_u16 / 2;
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} else {
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self->center = 32768; // Default value: mid.
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}
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}
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}
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if (args[ARG_invert].u_int >= 0) {
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self->invert = args[ARG_invert].u_int & (PWM_CHANNEL1 | PWM_CHANNEL2);
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}
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if (args[ARG_sync].u_int >= 0) {
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self->sync = args[ARG_sync].u_int != false && self->submodule != 0;
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}
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if (args[ARG_xor].u_int >= 0) {
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self->xor = args[ARG_xor].u_int & 0x03;
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}
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if (args[ARG_deadtime].u_int >= 0) {
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self->deadtime = args[ARG_deadtime].u_int;
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}
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configure_pwm(self);
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self->is_init = true;
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} else {
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machine_pwm_start(self);
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}
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}
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// PWM(pin | pin-tuple, freq, [args])
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STATIC mp_obj_t mp_machine_pwm_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *args) {
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// Check number of arguments
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mp_arg_check_num(n_args, n_kw, 1, MP_OBJ_FUN_ARGS_MAX, true);
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mp_obj_t *pins;
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const machine_pin_obj_t *pin1;
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const machine_pin_obj_t *pin2;
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// Get referred Pin object(s)
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if (mp_obj_is_type(args[0], &mp_type_tuple)) {
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mp_obj_get_array_fixed_n(args[0], 2, &pins);
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pin1 = pin_find(pins[0]);
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pin2 = pin_find(pins[1]);
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} else {
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pin1 = pin_find(args[0]);
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pin2 = NULL;
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}
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// Check whether it supports PWM and decode submodule & channel
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const machine_pin_af_obj_t *af_obj1 = NULL;
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uint8_t submodule1;
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uint8_t channel1;
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const machine_pin_af_obj_t *af_obj2 = NULL;
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uint8_t submodule2;
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uint8_t channel2;
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uint8_t module;
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bool is_flexpwm = false;
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for (int i = 0; i < pin1->af_list_len; ++i) {
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af_obj1 = af_name_decode_flexpwm(&(pin1->af_list[i]), &module, &submodule1, &channel1);
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if (af_obj1 != NULL) {
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break;
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}
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}
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if (pin2 != NULL) {
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for (int i = 0; i < pin1->af_list_len; ++i) {
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af_obj2 = af_name_decode_flexpwm(&(pin2->af_list[i]), &module, &submodule2, &channel2);
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if (af_obj2 != NULL) {
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break;
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}
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}
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}
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if (af_obj1 == NULL) {
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submodule1 = 0;
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#ifdef FSL_FEATURE_SOC_TMR_COUNT
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// Check for QTimer support
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if (is_board_pin(pin1)) {
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for (int i = 0; i < pin1->af_list_len; ++i) {
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af_obj1 = af_name_decode_qtmr(&(pin1->af_list[i]), &module, &channel1);
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if (af_obj1 != NULL) {
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break;
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}
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}
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}
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#endif
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if (af_obj1 == NULL) {
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mp_raise_ValueError(MP_ERROR_TEXT("the requested Pin(s) does not support PWM"));
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}
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} else {
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// is flexpwm, check for instance match
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is_flexpwm = true;
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if (pin2 != NULL && af_obj1->instance != af_obj2->instance && submodule1 != submodule2) {
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mp_raise_ValueError(MP_ERROR_TEXT("the pins must be a A/B pair of a submodule"));
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}
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}
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// Create and populate the PWM object.
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machine_pwm_obj_t *self = m_new_obj(machine_pwm_obj_t);
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self->base.type = &machine_pwm_type;
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self->is_flexpwm = is_flexpwm;
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self->instance = af_obj1->instance;
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self->module = module;
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self->submodule = submodule1;
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self->channel1 = channel1;
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self->invert = 0;
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self->freq = 1000;
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self->prescale = -1;
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self->duty_u16 = 32768;
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self->duty_ns = 0;
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self->center = 32768;
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self->output_enable_1 = is_board_pin(pin1);
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self->sync = false;
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self->deadtime = 0;
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self->xor = 0;
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self->is_init = false;
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// Initialize the Pin(s).
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CLOCK_EnableClock(kCLOCK_Iomuxc); // just in case it was not set yet
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IOMUXC_SetPinMux(pin1->muxRegister, af_obj1->af_mode, af_obj1->input_register, af_obj1->input_daisy,
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pin1->configRegister, 0U);
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IOMUXC_SetPinConfig(pin1->muxRegister, af_obj1->af_mode, af_obj1->input_register, af_obj1->input_daisy,
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pin1->configRegister, pin_generate_config(PIN_PULL_DISABLED, PIN_MODE_OUT, PIN_DRIVE_POWER_5, pin1->configRegister));
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// Settings for the second pin, if given.
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if (pin2 != NULL && pin2 != pin1) {
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self->complementary = 1;
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self->channel2 = channel2;
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self->output_enable_2 = is_board_pin(pin2);
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// Initialize the Pin(s)
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IOMUXC_SetPinMux(pin2->muxRegister, af_obj2->af_mode, af_obj2->input_register, af_obj2->input_daisy,
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pin2->configRegister, 0U);
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IOMUXC_SetPinConfig(pin2->muxRegister, af_obj2->af_mode, af_obj2->input_register, af_obj2->input_daisy,
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pin2->configRegister, pin_generate_config(PIN_PULL_DISABLED, PIN_MODE_OUT, PIN_DRIVE_POWER_5, pin2->configRegister));
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} else {
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self->complementary = 0;
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}
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// Process the remaining parameters.
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mp_map_t kw_args;
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mp_map_init_fixed_table(&kw_args, n_kw, args + n_args);
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mp_machine_pwm_init_helper(self, n_args - 1, args + 1, &kw_args);
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return MP_OBJ_FROM_PTR(self);
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}
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// Disable all PWM devices. Called on soft reset
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void machine_pwm_deinit_all(void) {
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static PWM_Type *const pwm_bases[] = PWM_BASE_PTRS;
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for (int i = 1; i < ARRAY_SIZE(pwm_bases); i++) {
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PWM_StopTimer(pwm_bases[i], 0x0f); // Stop all submodules
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pwm_bases[i]->OUTEN = 0; // Disable ouput on all submodules, all channels
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}
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#ifdef FSL_FEATURE_SOC_TMR_COUNT
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static TMR_Type *const tmr_bases[] = TMR_BASE_PTRS;
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for (int i = 1; i < ARRAY_SIZE(tmr_bases); i++) {
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for (int j = 0; j < 4; j++) {
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QTMR_StopTimer(tmr_bases[i], j); // Stop all timers
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}
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}
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#endif
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}
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STATIC void machine_pwm_start(machine_pwm_obj_t *self) {
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if (self->is_flexpwm) {
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PWM_StartTimer(self->instance, 1 << self->submodule);
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#ifdef FSL_FEATURE_SOC_TMR_COUNT
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} else {
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QTMR_StartTimer((TMR_Type *)self->instance, self->channel1, kQTMR_PriSrcRiseEdge);
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#endif
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}
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}
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STATIC void mp_machine_pwm_deinit(machine_pwm_obj_t *self) {
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if (self->is_flexpwm) {
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PWM_StopTimer(self->instance, 1 << self->submodule);
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#ifdef FSL_FEATURE_SOC_TMR_COUNT
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} else {
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QTMR_StopTimer((TMR_Type *)self->instance, self->channel1);
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#endif
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}
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}
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mp_obj_t mp_machine_pwm_freq_get(machine_pwm_obj_t *self) {
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return MP_OBJ_NEW_SMALL_INT(self->freq);
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}
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void mp_machine_pwm_freq_set(machine_pwm_obj_t *self, mp_int_t freq) {
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self->freq = freq;
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configure_pwm(self);
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}
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mp_obj_t mp_machine_pwm_duty_get_u16(machine_pwm_obj_t *self) {
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return MP_OBJ_NEW_SMALL_INT(self->duty_u16);
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}
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void mp_machine_pwm_duty_set_u16(machine_pwm_obj_t *self, mp_int_t duty) {
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if (duty >= 0) {
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if (duty >= PWM_FULL_SCALE) {
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mp_raise_ValueError(MP_ERROR_TEXT(ERRMSG_VALUE));
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}
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self->duty_u16 = duty;
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self->duty_ns = 0;
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configure_pwm(self);
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}
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}
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mp_obj_t mp_machine_pwm_duty_get_ns(machine_pwm_obj_t *self) {
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return MP_OBJ_NEW_SMALL_INT(1000000000ULL / self->freq * self->duty_u16 / PWM_FULL_SCALE);
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}
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void mp_machine_pwm_duty_set_ns(machine_pwm_obj_t *self, mp_int_t duty) {
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if (duty >= 0) {
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self->duty_ns = duty;
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self->duty_u16 = duty_ns_to_duty_u16(self->freq, self->duty_ns);
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configure_pwm(self);
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}
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}
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