006671056d
All architectures now have a dedicated register to hold the pointer to the native function table mp_fun_table, and so they all need to load this register at the start of the native function. This commit makes the loading of this register uniform across architectures by passing the pointer in the constant table for the native function, and then loading the register from the constant table. Doing it this way means that the pointer is not stored in the assembly code, helping to make the code more portable.
224 lines
8.2 KiB
C
224 lines
8.2 KiB
C
/*
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* This file is part of the MicroPython project, http://micropython.org/
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*
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* The MIT License (MIT)
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*
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* Copyright (c) 2016 Damien P. George
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#include <stdio.h>
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#include <assert.h>
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#include "py/mpconfig.h"
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// wrapper around everything in this file
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#if MICROPY_EMIT_XTENSA || MICROPY_EMIT_INLINE_XTENSA
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#include "py/asmxtensa.h"
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#define WORD_SIZE (4)
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#define SIGNED_FIT8(x) ((((x) & 0xffffff80) == 0) || (((x) & 0xffffff80) == 0xffffff80))
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#define SIGNED_FIT12(x) ((((x) & 0xfffff800) == 0) || (((x) & 0xfffff800) == 0xfffff800))
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#define NUM_REGS_SAVED (5)
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void asm_xtensa_end_pass(asm_xtensa_t *as) {
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as->num_const = as->cur_const;
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as->cur_const = 0;
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#if 0
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// make a hex dump of the machine code
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if (as->base.pass == MP_ASM_PASS_EMIT) {
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uint8_t *d = as->base.code_base;
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printf("XTENSA ASM:");
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for (int i = 0; i < ((as->base.code_size + 15) & ~15); ++i) {
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if (i % 16 == 0) {
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printf("\n%08x:", (uint32_t)&d[i]);
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}
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if (i % 2 == 0) {
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printf(" ");
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}
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printf("%02x", d[i]);
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}
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printf("\n");
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}
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#endif
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}
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void asm_xtensa_entry(asm_xtensa_t *as, int num_locals) {
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// jump over the constants
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asm_xtensa_op_j(as, as->num_const * WORD_SIZE + 4 - 4);
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mp_asm_base_get_cur_to_write_bytes(&as->base, 1); // padding/alignment byte
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as->const_table = (uint32_t*)mp_asm_base_get_cur_to_write_bytes(&as->base, as->num_const * 4);
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// adjust the stack-pointer to store a0, a12, a13, a14, a15 and locals, 16-byte aligned
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as->stack_adjust = (((NUM_REGS_SAVED + num_locals) * WORD_SIZE) + 15) & ~15;
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if (SIGNED_FIT8(-as->stack_adjust)) {
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asm_xtensa_op_addi(as, ASM_XTENSA_REG_A1, ASM_XTENSA_REG_A1, -as->stack_adjust);
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} else {
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asm_xtensa_op_movi(as, ASM_XTENSA_REG_A9, as->stack_adjust);
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asm_xtensa_op_sub(as, ASM_XTENSA_REG_A1, ASM_XTENSA_REG_A1, ASM_XTENSA_REG_A9);
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}
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// save return value (a0) and callee-save registers (a12, a13, a14, a15)
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asm_xtensa_op_s32i_n(as, ASM_XTENSA_REG_A0, ASM_XTENSA_REG_A1, 0);
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for (int i = 1; i < NUM_REGS_SAVED; ++i) {
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asm_xtensa_op_s32i_n(as, ASM_XTENSA_REG_A11 + i, ASM_XTENSA_REG_A1, i);
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}
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}
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void asm_xtensa_exit(asm_xtensa_t *as) {
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// restore registers
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for (int i = NUM_REGS_SAVED - 1; i >= 1; --i) {
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asm_xtensa_op_l32i_n(as, ASM_XTENSA_REG_A11 + i, ASM_XTENSA_REG_A1, i);
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}
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asm_xtensa_op_l32i_n(as, ASM_XTENSA_REG_A0, ASM_XTENSA_REG_A1, 0);
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// restore stack-pointer and return
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if (SIGNED_FIT8(as->stack_adjust)) {
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asm_xtensa_op_addi(as, ASM_XTENSA_REG_A1, ASM_XTENSA_REG_A1, as->stack_adjust);
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} else {
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asm_xtensa_op_movi(as, ASM_XTENSA_REG_A9, as->stack_adjust);
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asm_xtensa_op_add_n(as, ASM_XTENSA_REG_A1, ASM_XTENSA_REG_A1, ASM_XTENSA_REG_A9);
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}
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asm_xtensa_op_ret_n(as);
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}
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STATIC uint32_t get_label_dest(asm_xtensa_t *as, uint label) {
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assert(label < as->base.max_num_labels);
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return as->base.label_offsets[label];
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}
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void asm_xtensa_op16(asm_xtensa_t *as, uint16_t op) {
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uint8_t *c = mp_asm_base_get_cur_to_write_bytes(&as->base, 2);
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if (c != NULL) {
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c[0] = op;
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c[1] = op >> 8;
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}
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}
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void asm_xtensa_op24(asm_xtensa_t *as, uint32_t op) {
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uint8_t *c = mp_asm_base_get_cur_to_write_bytes(&as->base, 3);
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if (c != NULL) {
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c[0] = op;
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c[1] = op >> 8;
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c[2] = op >> 16;
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}
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}
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void asm_xtensa_j_label(asm_xtensa_t *as, uint label) {
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uint32_t dest = get_label_dest(as, label);
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int32_t rel = dest - as->base.code_offset - 4;
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// we assume rel, as a signed int, fits in 18-bits
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asm_xtensa_op_j(as, rel);
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}
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void asm_xtensa_bccz_reg_label(asm_xtensa_t *as, uint cond, uint reg, uint label) {
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uint32_t dest = get_label_dest(as, label);
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int32_t rel = dest - as->base.code_offset - 4;
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if (as->base.pass == MP_ASM_PASS_EMIT && !SIGNED_FIT12(rel)) {
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printf("ERROR: xtensa bccz out of range\n");
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}
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asm_xtensa_op_bccz(as, cond, reg, rel);
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}
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void asm_xtensa_bcc_reg_reg_label(asm_xtensa_t *as, uint cond, uint reg1, uint reg2, uint label) {
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uint32_t dest = get_label_dest(as, label);
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int32_t rel = dest - as->base.code_offset - 4;
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if (as->base.pass == MP_ASM_PASS_EMIT && !SIGNED_FIT8(rel)) {
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printf("ERROR: xtensa bcc out of range\n");
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}
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asm_xtensa_op_bcc(as, cond, reg1, reg2, rel);
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}
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// convenience function; reg_dest must be different from reg_src[12]
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void asm_xtensa_setcc_reg_reg_reg(asm_xtensa_t *as, uint cond, uint reg_dest, uint reg_src1, uint reg_src2) {
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asm_xtensa_op_movi_n(as, reg_dest, 1);
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asm_xtensa_op_bcc(as, cond, reg_src1, reg_src2, 1);
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asm_xtensa_op_movi_n(as, reg_dest, 0);
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}
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void asm_xtensa_mov_reg_i32(asm_xtensa_t *as, uint reg_dest, uint32_t i32) {
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if (SIGNED_FIT12(i32)) {
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asm_xtensa_op_movi(as, reg_dest, i32);
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} else {
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// load the constant
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uint32_t const_table_offset = (uint8_t*)as->const_table - as->base.code_base;
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asm_xtensa_op_l32r(as, reg_dest, as->base.code_offset, const_table_offset + as->cur_const * WORD_SIZE);
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// store the constant in the table
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if (as->const_table != NULL) {
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as->const_table[as->cur_const] = i32;
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}
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++as->cur_const;
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}
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}
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void asm_xtensa_mov_local_reg(asm_xtensa_t *as, int local_num, uint reg_src) {
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asm_xtensa_op_s32i(as, reg_src, ASM_XTENSA_REG_A1, NUM_REGS_SAVED + local_num);
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}
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void asm_xtensa_mov_reg_local(asm_xtensa_t *as, uint reg_dest, int local_num) {
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asm_xtensa_op_l32i(as, reg_dest, ASM_XTENSA_REG_A1, NUM_REGS_SAVED + local_num);
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}
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void asm_xtensa_mov_reg_local_addr(asm_xtensa_t *as, uint reg_dest, int local_num) {
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uint off = (NUM_REGS_SAVED + local_num) * WORD_SIZE;
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if (SIGNED_FIT8(off)) {
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asm_xtensa_op_addi(as, reg_dest, ASM_XTENSA_REG_A1, off);
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} else {
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asm_xtensa_op_movi(as, reg_dest, off);
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asm_xtensa_op_add_n(as, reg_dest, reg_dest, ASM_XTENSA_REG_A1);
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}
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}
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void asm_xtensa_mov_reg_pcrel(asm_xtensa_t *as, uint reg_dest, uint label) {
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// Get relative offset from PC
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uint32_t dest = get_label_dest(as, label);
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int32_t rel = dest - as->base.code_offset;
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rel -= 3 + 3; // account for 3 bytes of movi instruction, 3 bytes call0 adjustment
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asm_xtensa_op_movi(as, reg_dest, rel); // imm has 12-bit range
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// Use call0 to get PC+3 into a0
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// call0 destination must be aligned on 4 bytes:
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// - code_offset&3=0: off=0, pad=1
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// - code_offset&3=1: off=0, pad=0
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// - code_offset&3=2: off=1, pad=3
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// - code_offset&3=3: off=1, pad=2
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uint32_t off = as->base.code_offset >> 1 & 1;
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uint32_t pad = (5 - as->base.code_offset) & 3;
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asm_xtensa_op_call0(as, off);
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mp_asm_base_get_cur_to_write_bytes(&as->base, pad);
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// Add PC to relative offset
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asm_xtensa_op_add_n(as, reg_dest, reg_dest, ASM_XTENSA_REG_A0);
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}
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void asm_xtensa_call_ind(asm_xtensa_t *as, uint idx) {
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if (idx < 16) {
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asm_xtensa_op_l32i_n(as, ASM_XTENSA_REG_A0, ASM_XTENSA_REG_FUN_TABLE, idx);
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} else {
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asm_xtensa_op_l32i(as, ASM_XTENSA_REG_A0, ASM_XTENSA_REG_FUN_TABLE, idx);
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}
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asm_xtensa_op_callx0(as, ASM_XTENSA_REG_A0);
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}
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#endif // MICROPY_EMIT_XTENSA || MICROPY_EMIT_INLINE_XTENSA
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