351 lines
8.9 KiB
C
351 lines
8.9 KiB
C
/*
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* FreeTouch, a QTouch-compatible library - tested on ATSAMD21 only!
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* The MIT License (MIT)
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*
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* Copyright (c) 2017 Limor 'ladyada' Fried for Adafruit Industries
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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// This is similar to the component definitions found in
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// sam0/utils/cmsis/samd21/include/component but for the PTC.
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#ifndef ADAFRUIT_FREETOUCH_PTC_COMPONENT_H
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#define ADAFRUIT_FREETOUCH_PTC_COMPONENT_H
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#include "compiler.h"
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#undef ENABLE
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/*************** CONTROL A register ***************/
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#define PTC_REG_CONTROLA 0x42004C00
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#define PTC_BIT_ENABLE 0x02
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#define PTC_BIT_RUNINSTBY 0x04
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typedef union {
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struct {
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uint8_t SWRESET:1;
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uint8_t ENABLE:1;
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uint8_t RUNINSTANDBY:1;
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uint8_t __pad0__:5;
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} bit;
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uint8_t reg;
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} PTC_REG_CONTROLA_Type;
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/*************** CONTROL B register ***************/
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#define PTC_REG_CONTROLB 0x42004C01
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#define PTC_BIT_SYNCFLAG 0x80
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typedef union {
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struct {
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uint8_t __pad0__:7;
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uint8_t SYNCFLAG:1;
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} bit;
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uint8_t reg;
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} PTC_REG_CONTROLB_Type;
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/*************** UNK4C04 register ***************/
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#define PTC_REG_UNK4C04 0x42004C04
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typedef union {
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uint8_t reg;
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} PTC_REG_UNK4C04_Type;
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/*************** CONTROL C register ***************/
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#define PTC_REG_CONTROLC 0x42004C05
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#define PTC_BIT_INIT 0x01
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typedef union {
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struct {
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uint8_t INIT:1;
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uint8_t __pad0__:7;
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} bit;
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uint8_t reg;
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} PTC_REG_CONTROLC_Type;
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/*************** INT registers ***************/
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typedef union {
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struct {
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uint8_t EOC:1;
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uint8_t WCO:1;
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uint8_t __pad0__:6;
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} bit;
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uint8_t reg;
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} PTC_REG_INT_Type;
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#define PTC_REG_INTDISABLE 0x42004C08
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#define PTC_REG_INTENABLE 0x42004C09
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#define PTC_BIT_EOCINTEN 0x01
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#define PTC_BIT_WCOINTEN 0x02
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#define PTC_REG_INTFLAGS 0x42004C0A
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#define PTC_BIT_EOCINTFLAG 0x01
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#define PTC_BIT_WCOINTFLAG 0x02
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/*************** FREQ CONTROL reg ***************/
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typedef union {
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struct {
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uint8_t SAMPLEDELAY:4;
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uint8_t FREQSPREADEN:1;
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uint8_t __pad0__:3;
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} bit;
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uint8_t reg;
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} PTC_REG_FREQCONTROL_Type;
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#define PTC_REG_FREQCONTROL 0x42004C0C
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#define PTC_BIT_FREQSPREADEN 0x10
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#define PTC_REG_SAMPLEDELAY_MASK 0x0F
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/*************** CONVERT CONTROL reg ***************/
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typedef union {
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struct {
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uint8_t ADCACCUM:3;
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uint8_t __pad0__:4;
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uint8_t CONVERT:1;
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} bit;
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uint8_t reg;
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} __attribute__ ((packed)) PTC_REG_CONVCONTROL_Type;
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#define PTC_REG_CONVCONTROL 0x42004C0D
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#define PTC_BIT_CONVSTARTED 0x80
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#define PTC_REG_ADCACC_MASK 0x07
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/*************** Y SELECT L+H reg ***************/
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typedef union {
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struct {
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uint8_t Y0:1;
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uint8_t Y1:1;
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uint8_t Y2:1;
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uint8_t Y3:1;
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uint8_t Y4:1;
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uint8_t Y5:1;
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uint8_t Y6:1;
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uint8_t Y7:1;
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} bit;
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uint8_t reg;
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} __attribute__ ((packed)) PTC_REG_YSELECTL_Type;
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typedef union {
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struct {
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uint8_t Y8:1;
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uint8_t Y9:1;
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uint8_t Y10:1;
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uint8_t Y11:1;
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uint8_t Y12:1;
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uint8_t Y13:1;
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uint8_t Y14:1;
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uint8_t Y15:1;
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} bit;
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uint8_t reg;
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} __attribute__ ((packed)) PTC_REG_YSELECTH_Type;
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#define PTC_REG_YSELECT_L 0x42004C10
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#define PTC_REG_YSELECT_H 0x42004C11
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#define PTC_REG_YENABLE_L 0x42004C14
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#define PTC_REG_YENABLE_H 0x42004C15
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/*************** X SELECT L+H reg ***************/
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typedef union {
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struct {
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uint8_t X0:1;
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uint8_t X1:1;
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uint8_t X2:1;
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uint8_t X3:1;
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uint8_t X4:1;
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uint8_t X5:1;
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uint8_t X6:1;
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uint8_t X7:1;
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} bit;
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uint8_t reg;
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} __attribute__ ((packed)) PTC_REG_XSELECTL_Type;
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typedef union {
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struct {
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uint8_t X8:1;
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uint8_t X9:1;
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uint8_t X10:1;
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uint8_t X11:1;
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uint8_t X12:1;
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uint8_t X13:1;
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uint8_t X14:1;
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uint8_t X15:1;
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} bit;
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uint8_t reg;
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} __attribute__ ((packed)) PTC_REG_XSELECTH_Type;
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#define PTC_REG_XSELECT_L 0x42004C12
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#define PTC_REG_XSELECT_H 0x42004C13
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#define PTC_REG_XENABLE_L 0x42004C16
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#define PTC_REG_XENABLE_H 0x42004C17
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/*************** Compensation Cap reg ***************/
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typedef union {
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struct {
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uint8_t VALUE:8;
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} bit;
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uint8_t reg;
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} __attribute__ ((packed)) PTC_REG_COMPCAPL_Type;
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typedef union {
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struct {
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uint8_t VALUE:6;
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uint8_t __pad0__:2;
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} bit;
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uint8_t reg;
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} __attribute__ ((packed)) PTC_REG_COMPCAPH_Type;
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#define PTC_REG_COMPCAPL 0x42004C18
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#define PTC_REG_COMPCAPH 0x42004C19
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/*************** Int Cap reg ***************/
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typedef union {
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struct {
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uint8_t VALUE:6;
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uint8_t __pad0__:2;
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} bit;
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uint8_t reg;
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} __attribute__ ((packed)) PTC_REG_INTCAP_Type;
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#define PTC_REG_INTCAP 0x42004C1A
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/*************** Series resistor reg ***************/
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typedef union {
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struct {
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uint8_t RESISTOR:2;
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uint8_t __pad0__:6;
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} bit;
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uint8_t reg;
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} __attribute__ ((packed)) PTC_REG_SERRES_Type;
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#define PTC_REG_SERIESRES 0x42004C1B
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/*************** conversion result reg ***************/
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typedef union {
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struct {
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uint8_t LOWBYTE;
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uint8_t HIGHBYTE;
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} byte;
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uint16_t reg;
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} __attribute__ ((packed)) PTC_REG_CONVRESULT_Type;
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#define PTC_REG_CONVRESULT_L 0x42004C1C
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#define PTC_REG_CONVRESULT_H 0x42004C1D
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/*************** burst mode reg ***************/
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typedef union {
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struct {
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uint8_t __pad0__:2;
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uint8_t CTSLOWPOWER:1;
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uint8_t __pad1__:1;
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uint8_t BURSTMODE:4;
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} bit;
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uint8_t reg;
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} __attribute__ ((packed)) PTC_REG_BURSTMODE_Type;
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#define PTC_REG_BURSTMODE 0x42004C20
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#define PTC_REG_BURSTMODE_MASK 0xF0
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#define PTC_BIT_CTSLOWPOWER 0x04
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/*************** etc unused reg ***************/
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#define PTC_REG_XYENABLE 0x42004C16
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#define PTC_BIT_XYENABLE 0x02
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#define PTC_REG_WCO_MODE 0x42004C21
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#define PTC_REG_WCO_MODE_MASK 0x07
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#define PTC_SET_WCO_THRESHHOLD_A_L 0x42004C24
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#define PTC_SET_WCO_THRESHHOLD_A_H 0x42004C25
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#define PTC_SET_WCO_THRESHHOLD_B_L 0x42004C26
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#define PTC_SET_WCO_THRESHHOLD_B_H 0x42004C27
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typedef struct {
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__IO PTC_REG_CONTROLA_Type CONTROLA; // 0x42004C00
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__IO PTC_REG_CONTROLB_Type CONTROLB; // 0x42004C01
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uint8_t __pad4c02__; // 0x42004C02 unknown
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uint8_t __pad4c03__; // 0x42004C03 unknown
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__IO PTC_REG_UNK4C04_Type UNK4C04; // 0x42004C04 unknown
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__IO PTC_REG_CONTROLC_Type CONTROLC; // 0x42004C05
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uint8_t __pad4c06__; // 0x42004C06 unknown
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uint8_t __pad4c07__; // 0x42004C07 unknown
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__IO PTC_REG_INT_Type INTDISABLE; // 0x42004C08
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__IO PTC_REG_INT_Type INTENABLE; // 0x42004C09
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__IO PTC_REG_INT_Type INTFLAGS; // 0x42004C0A
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uint8_t __pad4c0b__; // 0x42004C0B unknown
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__IO PTC_REG_FREQCONTROL_Type FREQCONTROL; //0x42004C0C
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__IO PTC_REG_CONVCONTROL_Type CONVCONTROL; // 0x42004C0D
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uint8_t __pad4c0e__; // 0x42004C0E unknown
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uint8_t __pad4c0f__; // 0x42004C0F unknown
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__IO PTC_REG_YSELECTL_Type YSELECTL; // 0x42004C10
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__IO PTC_REG_YSELECTL_Type YSELECTH; // 0x42004C11
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__IO PTC_REG_XSELECTL_Type XSELECTL; // 0x42004C12
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__IO PTC_REG_XSELECTL_Type XSELECTH; // 0x42004C13
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__IO PTC_REG_YSELECTL_Type YENABLEL; // 0x42004C14
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__IO PTC_REG_YSELECTL_Type YENABLEH; // 0x42004C15
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__IO PTC_REG_XSELECTL_Type XENABLEL; // 0x42004C16
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__IO PTC_REG_XSELECTL_Type XENABLEH; // 0x42004C17
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__IO PTC_REG_COMPCAPL_Type COMPCAPL; // 0x42004C18
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__IO PTC_REG_COMPCAPH_Type COMPCAPH; // 0x42004C19
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__IO PTC_REG_INTCAP_Type INTCAP; // 0x42004C1A
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__IO PTC_REG_SERRES_Type SERRES; // 0x42004C1B
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__IO PTC_REG_CONVRESULT_Type RESULT; // 0x42004C1C + 0x42004C1D
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uint8_t __pad4c1e__; // 0x42004C1E unknown
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uint8_t __pad4c1f__; // 0x42004C1F unknown
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__IO PTC_REG_BURSTMODE_Type BURSTMODE; // 0x42004C20
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} Ptc;
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#define PTC (( Ptc *)0x42004C00U)
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#define PTC_REG_INTDISABLE 0x42004C08
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#define PTC_REG_INTENABLE 0x42004C09
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#define PTC_BIT_EOCINTEN 0x01
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#define PTC_BIT_WCOINTEN 0x02
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#define PTC_REG_INTFLAGS 0x42004C0A
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#endif // ADAFRUIT_FREETOUCH_PTC_COMPONENT_H
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