699 lines
24 KiB
C
699 lines
24 KiB
C
/*
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* This file is part of the MicroPython project, http://micropython.org/
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*
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* The MIT License (MIT)
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*
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* Copyright (c) 2018 Scott Shawcroft for Adafruit Industries LLC
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#ifndef MICROPY_INCLUDED_ATMEL_SAMD_EXTERNAL_FLASH_DEVICES_H
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#define MICROPY_INCLUDED_ATMEL_SAMD_EXTERNAL_FLASH_DEVICES_H
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#include <stdbool.h>
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#include <stdint.h>
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typedef struct {
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uint32_t total_size;
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uint16_t start_up_time_us;
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// Three response bytes to 0x9f JEDEC ID command.
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uint8_t manufacturer_id;
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uint8_t memory_type;
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uint8_t capacity;
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// Max clock speed for all operations and the fastest read mode.
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uint8_t max_clock_speed_mhz;
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// Bitmask for Quad Enable bit if present. 0x00 otherwise. This is for the highest byte in the
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// status register.
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uint8_t quad_enable_bit_mask;
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bool has_sector_protection : 1;
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// Supports the 0x0b fast read command with 8 dummy cycles.
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bool supports_fast_read : 1;
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// Supports the fast read, quad output command 0x6b with 8 dummy cycles.
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bool supports_qspi : 1;
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// Supports the quad input page program command 0x32. This is known as 1-1-4 because it only
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// uses all four lines for data.
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bool supports_qspi_writes: 1;
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// Requires a separate command 0x31 to write to the second byte of the status register.
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// Otherwise two byte are written via 0x01.
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bool write_status_register_split: 1;
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// True when the status register is a single byte. This implies the Quad Enable bit is in the
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// first byte and the Read Status Register 2 command (0x35) is unsupported.
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bool single_status_byte: 1;
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// Does not support using a ready bit within the status register
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bool no_ready_bit: 1;
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// Does not support the erase command (0x20)
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bool no_erase_cmd: 1;
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// Device does not have a reset command
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bool no_reset_cmd: 1;
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} external_flash_device;
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// Settings for the Adesto Tech AT25DF081A 1MiB SPI flash. It's on the SAMD21
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// Xplained board.
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// Datasheet: https://www.adestotech.com/wp-content/uploads/doc8715.pdf
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#define AT25DF081A {\
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.total_size = (1 << 20), /* 1 MiB */ \
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.start_up_time_us = 10000, \
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.manufacturer_id = 0x1f, \
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.memory_type = 0x45, \
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.capacity = 0x01, \
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.max_clock_speed_mhz = 85, \
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.quad_enable_bit_mask = 0x00, \
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.has_sector_protection = true, \
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.supports_fast_read = true, \
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.supports_qspi = false, \
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.supports_qspi_writes = false, \
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.write_status_register_split = false, \
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.single_status_byte = false, \
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}
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// Settings for the Adesto Tech AT25DF641-SSHD-T 8MiB SPI flash
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// for the Oak Dev Tech Icy Tree M0 (SAMD21) feather board.
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// Source: https://www.digikey.com/product-detail/en/adesto-technologies/AT25SF641-SDHD-T/1265-1180-1-ND/
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// Datasheet: https://www.adestotech.com/wp-content/uploads/doc8693.pdf
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#define AT25DF641A {\
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.total_size = (1 << 23), /* 8 MiB */ \
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.start_up_time_us = 10000, \
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.manufacturer_id = 0x1f, \
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.memory_type = 0x48, \
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.capacity = 0x00, \
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.max_clock_speed_mhz = 85, \
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.quad_enable_bit_mask = 0x00, \
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.has_sector_protection = true, \
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.supports_fast_read = true, \
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.supports_qspi = false, \
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.supports_qspi_writes = false, \
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.write_status_register_split = false, \
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.single_status_byte = false, \
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}
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// Settings for the Adesto Tech AT25SF161-SSHD-T 2MiB SPI flash
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// for the StringCar M0 (SAMD21) Express board.
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// Source: https://www.digikey.com/product-detail/en/adesto-technologies/AT25SF161-SDHD-T/1265-1230-1-ND/
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// Datasheet: https://www.adestotech.com/wpo-content/uploads/jDS-AT25SF161_046.pdf
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#define AT25SF161 {\
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.total_size = (1 << 21), /* 2 MiB */ \
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.start_up_time_us = 10000, \
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.manufacturer_id = 0x1f, \
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.memory_type = 0x86, \
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.capacity = 0x01, \
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.max_clock_speed_mhz = 85, \
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.quad_enable_bit_mask = 0x00, \
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.has_sector_protection = true, \
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.supports_fast_read = true, \
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.supports_qspi = false, \
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.supports_qspi_writes = false, \
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.write_status_register_split = false, \
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.single_status_byte = false, \
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}
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// Settings for the Adesto Tech AT25SF041 1MiB SPI flash. It's on the SparkFun
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// SAMD51 Thing Plus board
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// Datasheet: https://www.adestotech.com/wp-content/uploads/DS-AT25SF041_044.pdf
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#define AT25SF041A {\
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.total_size = (1 << 19), /* 512 KiB */ \
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.start_up_time_us = 10000, \
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.manufacturer_id = 0x1f, \
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.memory_type = 0x84, \
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.capacity = 0x01, \
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.max_clock_speed_mhz = 85, \
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.quad_enable_bit_mask = 0x00, \
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.has_sector_protection = false, \
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.supports_fast_read = true, \
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.supports_qspi = false, \
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.supports_qspi_writes = false, \
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.write_status_register_split = false, \
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.single_status_byte = false, \
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}
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// Settings for the Gigadevice GD25Q16C 2MiB SPI flash.
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// Datasheet: http://www.gigadevice.com/datasheet/gd25q16c/
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#define GD25Q16C {\
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.total_size = (1 << 21), /* 2 MiB */ \
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.start_up_time_us = 5000, \
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.manufacturer_id = 0xc8, \
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.memory_type = 0x40, \
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.capacity = 0x15, \
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.max_clock_speed_mhz = 104, /* if we need 120 then we can turn on high performance mode */ \
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.quad_enable_bit_mask = 0x02, \
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.has_sector_protection = false, \
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.supports_fast_read = true, \
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.supports_qspi = true, \
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.supports_qspi_writes = true, \
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.write_status_register_split = false, \
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.single_status_byte = false, \
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}
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// Settings for the Gigadevice GD25Q32C 4MiB SPI flash.
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// Datasheet: http://www.elm-tech.com/en/products/spi-flash-memory/gd25q32/gd25q32.pdf
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#define GD25Q32C {\
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.total_size = (1 << 22), /* 4 MiB */ \
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.start_up_time_us = 5000, \
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.manufacturer_id = 0xc8, \
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.memory_type = 0x40, \
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.capacity = 0x16, \
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.max_clock_speed_mhz = 104, /* if we need 120 then we can turn on high performance mode */ \
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.quad_enable_bit_mask = 0x02, \
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.has_sector_protection = false, \
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.supports_fast_read = true, \
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.supports_qspi = true, \
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.supports_qspi_writes = true, \
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.write_status_register_split = true, \
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.single_status_byte = false, \
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}
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// Settings for the Gigadevice GD25Q64C 8MiB SPI flash.
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// Datasheet: http://www.elm-tech.com/en/products/spi-flash-memory/gd25q64/gd25q64.pdf
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#define GD25Q64C {\
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.total_size = (1 << 23), /* 8 MiB */ \
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.start_up_time_us = 5000, \
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.manufacturer_id = 0xc8, \
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.memory_type = 0x40, \
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.capacity = 0x17, \
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.max_clock_speed_mhz = 104, /* if we need 120 then we can turn on high performance mode */ \
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.quad_enable_bit_mask = 0x02, \
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.has_sector_protection = false, \
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.supports_fast_read = true, \
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.supports_qspi = true, \
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.supports_qspi_writes = true, \
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.write_status_register_split = true, \
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.single_status_byte = false, \
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}
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// Settings for the Gigadevice GD25S512MD 64MiB SPI flash.
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// Datasheet: http://www.gigadevice.com/datasheet/gd25s512md/
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#define GD25S512MD {\
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.total_size = (1 << 26), /* 64 MiB */ \
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.start_up_time_us = 5000, \
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.manufacturer_id = 0xc8, \
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.memory_type = 0x40, \
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.capacity = 0x19, \
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.max_clock_speed_mhz = 104, /* if we need 120 then we can turn on high performance mode */ \
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.quad_enable_bit_mask = 0x02, \
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.has_sector_protection = false, \
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.supports_fast_read = true, \
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.supports_qspi = true, \
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.supports_qspi_writes = true, \
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.write_status_register_split = true, \
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.single_status_byte = false, \
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}
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// Settings for the Cypress (was Spansion) S25FL064L 8MiB SPI flash.
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// Datasheet: http://www.cypress.com/file/316661/download
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#define S25FL064L {\
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.total_size = (1 << 23), /* 8 MiB */ \
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.start_up_time_us = 300, \
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.manufacturer_id = 0x01, \
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.memory_type = 0x60, \
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.capacity = 0x17, \
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.max_clock_speed_mhz = 108, \
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.quad_enable_bit_mask = 0x02, \
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.has_sector_protection = false, \
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.supports_fast_read = true, \
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.supports_qspi = true, \
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.supports_qspi_writes = true, \
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.write_status_register_split = false, \
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.single_status_byte = false, \
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}
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// Settings for the Cypress (was Spansion) S25FL116K 2MiB SPI flash.
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// Datasheet: http://www.cypress.com/file/196886/download
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#define S25FL116K {\
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.total_size = (1 << 21), /* 2 MiB */ \
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.start_up_time_us = 10000, \
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.manufacturer_id = 0x01, \
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.memory_type = 0x40, \
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.capacity = 0x15, \
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.max_clock_speed_mhz = 108, \
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.quad_enable_bit_mask = 0x02, \
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.has_sector_protection = false, \
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.supports_fast_read = true, \
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.supports_qspi = true, \
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.supports_qspi_writes = false, \
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.write_status_register_split = false, \
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.single_status_byte = false, \
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}
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// Settings for the Cypress (was Spansion) S25FL216K 2MiB SPI flash.
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// Datasheet: http://www.cypress.com/file/197346/download
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#define S25FL216K {\
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.total_size = (1 << 21), /* 2 MiB */ \
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.start_up_time_us = 10000, \
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.manufacturer_id = 0x01, \
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.memory_type = 0x40, \
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.capacity = 0x15, \
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.max_clock_speed_mhz = 65, \
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.quad_enable_bit_mask = 0x02, \
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.has_sector_protection = false, \
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.supports_fast_read = true, \
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.supports_qspi = false, \
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.supports_qspi_writes = false, \
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.write_status_register_split = false, \
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.single_status_byte = false, \
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}
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// Settings for the Winbond W25Q16FW 2MiB SPI flash.
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// Datasheet: https://www.winbond.com/resource-files/w25q16fw%20revj%2005182017%20sfdp.pdf
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#define W25Q16FW {\
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.total_size = (1 << 21), /* 2 MiB */ \
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.start_up_time_us = 5000, \
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.manufacturer_id = 0xef, \
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.memory_type = 0x60, \
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.capacity = 0x15, \
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.max_clock_speed_mhz = 133, \
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.quad_enable_bit_mask = 0x02, \
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.has_sector_protection = false, \
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.supports_fast_read = true, \
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.supports_qspi = true, \
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.supports_qspi_writes = true, \
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.write_status_register_split = false, \
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.single_status_byte = false, \
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}
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// Settings for the Winbond W25Q16JV-IQ 2MiB SPI flash. Note that JV-IM has a different .memory_type (0x70)
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// Datasheet: https://www.winbond.com/resource-files/w25q16jv%20spi%20revf%2005092017.pdf
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#define W25Q16JV_IQ {\
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.total_size = (1 << 21), /* 2 MiB */ \
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.start_up_time_us = 5000, \
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.manufacturer_id = 0xef, \
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.memory_type = 0x40, \
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.capacity = 0x15, \
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.max_clock_speed_mhz = 133, \
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.quad_enable_bit_mask = 0x02, \
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.has_sector_protection = false, \
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.supports_fast_read = true, \
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.supports_qspi = true, \
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.supports_qspi_writes = true, \
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.write_status_register_split = false, \
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.single_status_byte = false, \
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}
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// Settings for the Winbond W25Q16JV-IM 2MiB SPI flash. Note that JV-IQ has a different .memory_type (0x40)
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// Datasheet: https://www.winbond.com/resource-files/w25q16jv%20spi%20revf%2005092017.pdf
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#define W25Q16JV_IM {\
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.total_size = (1 << 21), /* 2 MiB */ \
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.start_up_time_us = 5000, \
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.manufacturer_id = 0xef, \
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.memory_type = 0x70, \
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.capacity = 0x15, \
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.max_clock_speed_mhz = 133, \
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.quad_enable_bit_mask = 0x02, \
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.has_sector_protection = false, \
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.supports_fast_read = true, \
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.supports_qspi = true, \
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.supports_qspi_writes = true, \
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.write_status_register_split = false, \
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}
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// Settings for the Winbond W25Q32BV 4MiB SPI flash.
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// Datasheet: https://www.winbond.com/resource-files/w25q32bv_revi_100413_wo_automotive.pdf
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#define W25Q32BV {\
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.total_size = (1 << 22), /* 4 MiB */ \
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.start_up_time_us = 10000, \
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.manufacturer_id = 0xef, \
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.memory_type = 0x60, \
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.capacity = 0x16, \
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.max_clock_speed_mhz = 104, \
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.quad_enable_bit_mask = 0x02, \
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.has_sector_protection = false, \
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.supports_fast_read = true, \
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.supports_qspi = true, \
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.supports_qspi_writes = false, \
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.write_status_register_split = false, \
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.single_status_byte = false, \
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}
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// Settings for the Winbond W25Q32JV-IM 4MiB SPI flash.
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// Datasheet: https://www.winbond.com/resource-files/w25q32jv%20revg%2003272018%20plus.pdf
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#define W25Q32JV_IM {\
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.total_size = (1 << 22), /* 4 MiB */ \
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.start_up_time_us = 5000, \
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.manufacturer_id = 0xef, \
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.memory_type = 0x70, \
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.capacity = 0x16, \
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.max_clock_speed_mhz = 133, \
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.quad_enable_bit_mask = 0x02, \
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.has_sector_protection = false, \
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.supports_fast_read = true, \
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.supports_qspi = true, \
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.supports_qspi_writes = true, \
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.write_status_register_split = false, \
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}
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// Settings for the Winbond W25Q32JV-IQ 4MiB SPI flash.
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// Datasheet: https://www.mouser.com/datasheet/2/949/w25q32jv_revg_03272018_plus-1489806.pdf
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#define W25Q32JV_IQ {\
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.total_size = (1 << 22), /* 4 MiB */ \
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.start_up_time_us = 5000, \
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.manufacturer_id = 0xef, \
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.memory_type = 0x40, \
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.capacity = 0x16, \
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.max_clock_speed_mhz = 133, \
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.quad_enable_bit_mask = 0x02, \
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.has_sector_protection = false, \
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.supports_fast_read = true, \
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.supports_qspi = true, \
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.supports_qspi_writes = true, \
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.write_status_register_split = false, \
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}
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// Settings for the Winbond W25Q64JV-IM 8MiB SPI flash. Note that JV-IQ has a different .memory_type (0x40)
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// Datasheet: http://www.winbond.com/resource-files/w25q64jv%20revj%2003272018%20plus.pdf
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#define W25Q64JV_IM {\
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.total_size = (1 << 23), /* 8 MiB */ \
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.start_up_time_us = 5000, \
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.manufacturer_id = 0xef, \
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.memory_type = 0x70, \
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.capacity = 0x17, \
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.max_clock_speed_mhz = 133, \
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.quad_enable_bit_mask = 0x02, \
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.has_sector_protection = false, \
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.supports_fast_read = true, \
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.supports_qspi = true, \
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.supports_qspi_writes = true, \
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.write_status_register_split = false, \
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.single_status_byte = false, \
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}
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// Settings for the Winbond W25Q64JV-IQ 8MiB SPI flash. Note that JV-IM has a different .memory_type (0x70)
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// Datasheet: http://www.winbond.com/resource-files/w25q64jv%20revj%2003272018%20plus.pdf
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#define W25Q64JV_IQ {\
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.total_size = (1 << 23), /* 8 MiB */ \
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.start_up_time_us = 5000, \
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.manufacturer_id = 0xef, \
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.memory_type = 0x40, \
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.capacity = 0x17, \
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.max_clock_speed_mhz = 133, \
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.quad_enable_bit_mask = 0x02, \
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|
.has_sector_protection = false, \
|
|
.supports_fast_read = true, \
|
|
.supports_qspi = true, \
|
|
.supports_qspi_writes = true, \
|
|
.write_status_register_split = false, \
|
|
.single_status_byte = false, \
|
|
}
|
|
|
|
// Settings for the Winbond W25Q80DL 1MiB SPI flash.
|
|
// Datasheet: https://www.winbond.com/resource-files/w25q80dv%20dl_revh_10022015.pdf
|
|
#define W25Q80DL {\
|
|
.total_size = (1 << 20), /* 1 MiB */ \
|
|
.start_up_time_us = 5000, \
|
|
.manufacturer_id = 0xef, \
|
|
.memory_type = 0x60, \
|
|
.capacity = 0x14, \
|
|
.max_clock_speed_mhz = 104, \
|
|
.quad_enable_bit_mask = 0x02, \
|
|
.has_sector_protection = false, \
|
|
.supports_fast_read = true, \
|
|
.supports_qspi = true, \
|
|
.supports_qspi_writes = false, \
|
|
.write_status_register_split = false, \
|
|
.single_status_byte = false, \
|
|
}
|
|
|
|
// Settings for the Winbond W25Q80DV 1MiB SPI flash.. Note that W25Q80DL has a different memory type (0x60)
|
|
// Datasheet: https://www.winbond.com/resource-files/w25q80dv%20dl_revh_10022015.pdf
|
|
#define W25Q80DV {\
|
|
.total_size = (1 << 20), /* 1 MiB */ \
|
|
.start_up_time_us = 5000, \
|
|
.manufacturer_id = 0xef, \
|
|
.memory_type = 0x40, \
|
|
.capacity = 0x14, \
|
|
.max_clock_speed_mhz = 104, \
|
|
.quad_enable_bit_mask = 0x02, \
|
|
.has_sector_protection = false, \
|
|
.supports_fast_read = true, \
|
|
.supports_qspi = true, \
|
|
.supports_qspi_writes = false, \
|
|
.write_status_register_split = false, \
|
|
.single_status_byte = false, \
|
|
}
|
|
|
|
// Settings for the Winbond W25Q128JV-SQ 16MiB SPI flash. Note that JV-IM has a different .memory_type (0x70)
|
|
// Datasheet: https://www.winbond.com/resource-files/w25q128jv%20revf%2003272018%20plus.pdf
|
|
#define W25Q128JV_SQ {\
|
|
.total_size = (1 << 24), /* 16 MiB */ \
|
|
.start_up_time_us = 5000, \
|
|
.manufacturer_id = 0xef, \
|
|
.memory_type = 0x40, \
|
|
.capacity = 0x18, \
|
|
.max_clock_speed_mhz = 133, \
|
|
.quad_enable_bit_mask = 0x02, \
|
|
.has_sector_protection = false, \
|
|
.supports_fast_read = true, \
|
|
.supports_qspi = true, \
|
|
.supports_qspi_writes = true, \
|
|
.write_status_register_split = false, \
|
|
.single_status_byte = false, \
|
|
}
|
|
|
|
// Settings for the Everspin MR20H40 / MR25H40 magnetic non-volatile RAM
|
|
// Datasheet: https://www.everspin.com/supportdocs/MR25H40CDFR
|
|
#define MR2xH40 {\
|
|
.total_size = (1 << 22), /* 4 MiB */ \
|
|
.start_up_time_us = 10000, \
|
|
.manufacturer_id = 0xef, /*no JDEC*/ \
|
|
.memory_type = 0x40, /*no JDEC*/ \
|
|
.capacity = 0x14, /*no JDEC*/ \
|
|
.max_clock_speed_mhz = 10, \
|
|
.quad_enable_bit_mask = 0x00, \
|
|
.has_sector_protection = false, \
|
|
.supports_fast_read = false, \
|
|
.supports_qspi = false, \
|
|
.supports_qspi_writes = false, \
|
|
.write_status_register_split = false, \
|
|
.single_status_byte = true, \
|
|
.no_ready_bit = true, \
|
|
.no_erase_cmd = true, \
|
|
.no_reset_cmd = true, \
|
|
}
|
|
|
|
// Settings for the Macronix MX25L1606 2MiB SPI flash.
|
|
// Datasheet:
|
|
#define MX25L1606 {\
|
|
.total_size = (1 << 21), /* 2 MiB */ \
|
|
.start_up_time_us = 5000, \
|
|
.manufacturer_id = 0xc2, \
|
|
.memory_type = 0x20, \
|
|
.capacity = 0x15, \
|
|
.max_clock_speed_mhz = 8, \
|
|
.quad_enable_bit_mask = 0x40, \
|
|
.has_sector_protection = false, \
|
|
.supports_fast_read = true, \
|
|
.supports_qspi = true, \
|
|
.supports_qspi_writes = true, \
|
|
.write_status_register_split = false, \
|
|
.single_status_byte = true, \
|
|
}
|
|
|
|
// Settings for the Macronix MX25L3233F 4MiB SPI flash.
|
|
// Datasheet: http://www.macronix.com/Lists/Datasheet/Attachments/7426/MX25L3233F,%203V,%2032Mb,%20v1.6.pdf
|
|
#define MX25L3233F {\
|
|
.total_size = (1 << 22), /* 4 MiB */ \
|
|
.start_up_time_us = 5000, \
|
|
.manufacturer_id = 0xc2, \
|
|
.memory_type = 0x20, \
|
|
.capacity = 0x16, \
|
|
.max_clock_speed_mhz = 133, \
|
|
.quad_enable_bit_mask = 0x40, \
|
|
.has_sector_protection = false, \
|
|
.supports_fast_read = true, \
|
|
.supports_qspi = true, \
|
|
.supports_qspi_writes = true, \
|
|
.write_status_register_split = false, \
|
|
.single_status_byte = true, \
|
|
}
|
|
|
|
// Settings for the Macronix MX25R6435F 8MiB SPI flash.
|
|
// Datasheet: http://www.macronix.com/Lists/Datasheet/Attachments/7428/MX25R6435F,%20Wide%20Range,%2064Mb,%20v1.4.pdf
|
|
// By default its in lower power mode which can only do 8mhz. In high power mode it can do 80mhz.
|
|
#define MX25R6435F {\
|
|
.total_size = (1 << 23), /* 8 MiB */ \
|
|
.start_up_time_us = 5000, \
|
|
.manufacturer_id = 0xc2, \
|
|
.memory_type = 0x28, \
|
|
.capacity = 0x17, \
|
|
.max_clock_speed_mhz = 8, \
|
|
.quad_enable_bit_mask = 0x40, \
|
|
.has_sector_protection = false, \
|
|
.supports_fast_read = true, \
|
|
.supports_qspi = true, \
|
|
.supports_qspi_writes = true, \
|
|
.write_status_register_split = false, \
|
|
.single_status_byte = true, \
|
|
}
|
|
|
|
// Settings for the Macronix MX25R1635F 8MiB SPI flash.
|
|
// Datasheet: https://www.macronix.com/Lists/Datasheet/Attachments/7595/MX25R1635F,%20Wide%20Range,%2016Mb,%20v1.6.pdf
|
|
// In low power mode, quad operations can only run at 8 MHz.
|
|
#define MX25R1635F {\
|
|
.total_size = (1 << 21), /* 2 MiB */ \
|
|
.start_up_time_us = 800, \
|
|
.manufacturer_id = 0xc2, \
|
|
.memory_type = 0x28, \
|
|
.capacity = 0x15, \
|
|
.max_clock_speed_mhz = 33, /* 8 mhz for dual/quad */ \
|
|
.quad_enable_bit_mask = 0x80, \
|
|
.has_sector_protection = false, \
|
|
.supports_fast_read = true, \
|
|
.supports_qspi = true, \
|
|
.supports_qspi_writes = true, \
|
|
.write_status_register_split = false, \
|
|
.single_status_byte = true, \
|
|
}
|
|
|
|
// Settings for the Macronix MX25L51245G 64MiB SPI flash.
|
|
// Datasheet: https://www.macronix.com/Lists/Datasheet/Attachments/7437/MX25L51245G,%203V,%20512Mb,%20v1.6.pdf
|
|
#define MX25L51245G {\
|
|
.total_size = (1 << 26), /* 64 MiB */ \
|
|
.start_up_time_us = 5000, \
|
|
.manufacturer_id = 0xc2, \
|
|
.memory_type = 0x20, \
|
|
.capacity = 0x1a, \
|
|
.max_clock_speed_mhz = 133, \
|
|
.quad_enable_bit_mask = 0x40, \
|
|
.has_sector_protection = false, \
|
|
.supports_fast_read = true, \
|
|
.supports_qspi = true, \
|
|
.supports_qspi_writes = true, \
|
|
.write_status_register_split = false, \
|
|
.single_status_byte = true, \
|
|
}
|
|
|
|
// Settings for the Macronix MX25L51245G 64MiB SPI flash.
|
|
// Datasheet: https://www.macronix.com/Lists/Datasheet/Attachments/7437/MX25L51245G,%203V,%20512Mb,%20v1.6.pdf
|
|
#define MX25L25645G {\
|
|
.total_size = (1 << 25), /* 32 MiB */ \
|
|
.start_up_time_us = 5000, \
|
|
.manufacturer_id = 0x9f, \
|
|
.memory_type = 0xab, \
|
|
.capacity = 0x90, \
|
|
.max_clock_speed_mhz = 133, \
|
|
.quad_enable_bit_mask = 0xaf, \
|
|
.has_sector_protection = false, \
|
|
.supports_fast_read = true, \
|
|
.supports_qspi = true, \
|
|
.supports_qspi_writes = true, \
|
|
.write_status_register_split = false, \
|
|
.single_status_byte = true, \
|
|
}
|
|
|
|
// Settings for the Macronix MX25L12833F 16MiB SPI flash
|
|
// Datasheet: https://www.macronix.com/Lists/Datasheet/Attachments/7447/MX25L12833F,%203V,%20128Mb,%20v1.0.pdf
|
|
|
|
#define MX25L12833F {\
|
|
.total_size = (1UL << 24), /* 16 MiB */ \
|
|
.start_up_time_us = 5000, \
|
|
.manufacturer_id = 0xc2, \
|
|
.memory_type = 0x20, \
|
|
.capacity = 0x18, \
|
|
.max_clock_speed_mhz = 133, \
|
|
.quad_enable_bit_mask = 0x40, \
|
|
.has_sector_protection = true, \
|
|
.supports_fast_read = true, \
|
|
.supports_qspi = true, \
|
|
.supports_qspi_writes = true, \
|
|
.write_status_register_split = false, \
|
|
.single_status_byte = true, \
|
|
}
|
|
|
|
// Settings for the Winbond W25Q128JV-PM 16MiB SPI flash. Note that JV-IM has a different .memory_type (0x70)
|
|
// Datasheet: https://www.winbond.com/resource-files/w25q128jv%20revf%2003272018%20plus.pdf
|
|
#define W25Q128JV_PM {\
|
|
.total_size = (1 << 24), /* 16 MiB */ \
|
|
.start_up_time_us = 5000, \
|
|
.manufacturer_id = 0xef, \
|
|
.memory_type = 0x70, \
|
|
.capacity = 0x18, \
|
|
.max_clock_speed_mhz = 133, \
|
|
.quad_enable_bit_mask = 0x02, \
|
|
.has_sector_protection = false, \
|
|
.supports_fast_read = true, \
|
|
.supports_qspi = true, \
|
|
.supports_qspi_writes = true, \
|
|
.write_status_register_split = false, \
|
|
}
|
|
|
|
// Settings for the Winbond W25Q32FV 4MiB SPI flash.
|
|
// Datasheet:http://www.winbond.com/resource-files/w25q32fv%20revj%2006032016.pdf?__locale=en
|
|
#define W25Q32FV {\
|
|
.total_size = (1 << 22), /* 4 MiB */ \
|
|
.start_up_time_us = 5000, \
|
|
.manufacturer_id = 0xef, \
|
|
.memory_type = 0x40, \
|
|
.capacity = 0x16, \
|
|
.max_clock_speed_mhz = 104, \
|
|
.quad_enable_bit_mask = 0x00, \
|
|
.has_sector_protection = false, \
|
|
.supports_fast_read = true, \
|
|
.supports_qspi = false, \
|
|
.supports_qspi_writes = false, \
|
|
.write_status_register_split = false, \
|
|
.single_status_byte = false, \
|
|
}
|
|
|
|
// Settings for the ISSI IS25LP128F 16MiB SPI flash.
|
|
// Datasheet: http://www.issi.com/WW/pdf/25LP-WP128F.pdf
|
|
#define IS25LP128F {\
|
|
.total_size = (1 << 24), /* 16 MiB */ \
|
|
.start_up_time_us = 10000, \
|
|
.manufacturer_id = 0x9d, \
|
|
.memory_type = 0x60, \
|
|
.capacity = 0x18, \
|
|
.max_clock_speed_mhz = 133, \
|
|
.quad_enable_bit_mask = 0x02, \
|
|
.has_sector_protection = true, \
|
|
.supports_fast_read = true, \
|
|
.supports_qspi = true, \
|
|
.supports_qspi_writes = true, \
|
|
.write_status_register_split = false, \
|
|
.single_status_byte = true, \
|
|
}
|
|
|
|
// Settings for the Micron N25Q256A 256Mb (32MiB) QSPI flash.
|
|
// Datasheet: https://www.micron.com/-/media/client/global/documents/products/data-sheet/nor-flash/serial-nor/n25q/n25q_256mb_3v.pdf
|
|
#define N25Q256A {\
|
|
/* .total_size = (1 << 25), 32 MiB does not work at this time, as assumptions about 3-byte addresses abound */ \
|
|
.total_size = (1 << 24), /* 16 MiB */ \
|
|
.start_up_time_us = 10000, \
|
|
.manufacturer_id = 0x20, \
|
|
.memory_type = 0xBA, \
|
|
.capacity = 0x19, \
|
|
.max_clock_speed_mhz = 108, \
|
|
.quad_enable_bit_mask = 0x02, \
|
|
.has_sector_protection = false, \
|
|
.supports_fast_read = true, \
|
|
.supports_qspi = true, \
|
|
.supports_qspi_writes = true, \
|
|
.write_status_register_split = false, \
|
|
.single_status_byte = true, \
|
|
}
|
|
#endif // MICROPY_INCLUDED_ATMEL_SAMD_EXTERNAL_FLASH_DEVICES_H
|