Jeff Epler 231cb1ffd9 mimxrt10xx: Use the proper "betweenTransferDelay" (et al) values
Set the betweenTransferDelay to the SCK low-time, to avoid long pauses
between bytes (transfers) while preventing the last SCK cycle in a byte
from being a runt pulse.

Compared to an earlier revision of this change, which just set the delays
all to zero, this doesn't break using an AirLift, which was sensitive
to the runt pulses (the simple loopback-wire test didn't detect the problem)
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CircuitPython Port To The NXP i.MX RT10xx Series

This is a port of CircuitPython to the i.MX RT10xx series of chips.