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circuitpython/ports/litex/common-hal
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Diego Elio Pettenò dd5d7c86d2 Fix up end of file and trailing whitespace. 
This can be enforced by pre-commit, but correct it separately to make it easier to review.
2020-06-03 10:56:35 +01:00
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digitalio
Update digitalio api for other ports
2020-05-20 09:23:42 -07:00
microcontroller
ports: litex: add port and fomu board
2020-03-31 09:40:38 +08:00
neopixel_write
ports: litex: add port and fomu board
2020-03-31 09:40:38 +08:00
os
Update copyright to bump the CI
2020-04-16 14:21:26 -07:00
supervisor
Fix up end of file and trailing whitespace.
2020-06-03 10:56:35 +01:00
time
ports: litex: add port and fomu board
2020-03-31 09:40:38 +08:00