20fd22edad
By specifying rts=pin(x) and/or cts=Pin(x) in the constructor. The pad numbers for the UART pins are fix in this case: TX must be at pad 0, RX at pad 1, RTS at pad 2 and CTS at pad 3. repr(uart) shows the pin names for rts and cts, if set. In case of a RX overflow, the rx interrupt will be disabled instead of just discarding the data. That allows RTS to act. If RTS is inactive, still 2 bytes can be buffered in the FIFO. Signed-off-by: robert-hh <robert@hammelrath.com>
77 lines
2.5 KiB
C
77 lines
2.5 KiB
C
// Deinitions common to all SAMD51 boards
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#include "samd51.h"
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#define MICROPY_CONFIG_ROM_LEVEL (MICROPY_CONFIG_ROM_LEVEL_FULL_FEATURES)
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// MicroPython emitters
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#define MICROPY_EMIT_THUMB (1)
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#define MICROPY_EMIT_INLINE_THUMB (1)
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// Python internal features
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#define MICROPY_ENABLE_EMERGENCY_EXCEPTION_BUF (1)
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#define MICROPY_FLOAT_IMPL (MICROPY_FLOAT_IMPL_FLOAT)
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#ifndef MICROPY_PY_BUILTINS_COMPLEX
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#define MICROPY_PY_BUILTINS_COMPLEX (0)
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#endif
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#ifndef MICROPY_PY_MATH
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#define MICROPY_PY_MATH (1)
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#define MP_NEED_LOG2 (1)
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#endif
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#ifndef MICROPY_PY_CMATH
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#define MICROPY_PY_CMATH (0)
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#endif
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#define MICROPY_PY_MACHINE_DHT_READINTO (1)
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#define MICROPY_PY_ONEWIRE (1)
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#define MICROPY_PY_UOS_URANDOM (1)
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#define MICROPY_PY_URANDOM_SEED_INIT_FUNC (trng_random_u32())
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unsigned long trng_random_u32(void);
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#ifndef MICROPY_PY_MACHINE_PIN_BOARD_CPU
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#define MICROPY_PY_MACHINE_PIN_BOARD_CPU (1)
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#endif
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// fatfs configuration used in ffconf.h
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#define MICROPY_FATFS_ENABLE_LFN (1)
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#define MICROPY_FATFS_RPATH (2)
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#define MICROPY_FATFS_MAX_SS (4096)
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#define MICROPY_FATFS_LFN_CODE_PAGE 437 /* 1=SFN/ANSI 437=LFN/U.S.(OEM) */
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#define VFS_BLOCK_SIZE_BYTES (1536) //
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#ifndef MICROPY_HW_UART_TXBUF
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#define MICROPY_HW_UART_TXBUF (1)
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#endif
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#ifndef MICROPY_HW_UART_RTSCTS
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#define MICROPY_HW_UART_RTSCTS (1)
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#endif
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#define CPU_FREQ (120000000)
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#define DFLL48M_FREQ (48000000)
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#define MAX_CPU_FREQ (200000000)
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#define DPLLx_REF_FREQ (32768)
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#define NVIC_PRIORITYGROUP_4 ((uint32_t)0x00000003)
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#define IRQ_PRI_PENDSV NVIC_EncodePriority(NVIC_PRIORITYGROUP_4, 7, 0)
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static inline uint32_t raise_irq_pri(uint32_t pri) {
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uint32_t basepri = __get_BASEPRI();
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// If non-zero, the processor does not process any exception with a
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// priority value greater than or equal to BASEPRI.
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// When writing to BASEPRI_MAX the write goes to BASEPRI only if either:
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// - Rn is non-zero and the current BASEPRI value is 0
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// - Rn is non-zero and less than the current BASEPRI value
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pri <<= (8 - __NVIC_PRIO_BITS);
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__ASM volatile ("msr basepri_max, %0" : : "r" (pri) : "memory");
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return basepri;
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}
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// "basepri" should be the value returned from raise_irq_pri
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static inline void restore_irq_pri(uint32_t basepri) {
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__set_BASEPRI(basepri);
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}
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