6839fff313
* atmel-samd: Remove ASF3. This will break builds. * atmel-samd: Add ASF4 for the SAMD21 and SAMD51. * Introduce the supervisor concept to facilitate porting. The supervisor is the code which runs individual MicroPython VMs. By splitting it out we make it more consistent and easier to find. This also adds very basic SAMD21 and SAMD51 support using the supervisor. Only the REPL currently works. This begins the work for #178.
182 lines
5.9 KiB
C
182 lines
5.9 KiB
C
/* Auto-generated config file hpl_tc_config.h */
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#ifndef HPL_TC_CONFIG_H
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#define HPL_TC_CONFIG_H
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// <<< Use Configuration Wizard in Context Menu >>>
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#include <peripheral_clk_config.h>
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#ifndef CONF_TC3_ENABLE
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#define CONF_TC3_ENABLE 1
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#endif
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// <h> Basic settings
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// <y> Prescaler
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// <TC_CTRLA_PRESCALER_DIV1_Val"> No division
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// <TC_CTRLA_PRESCALER_DIV2_Val"> Divide by 2
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// <TC_CTRLA_PRESCALER_DIV4_Val"> Divide by 4
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// <TC_CTRLA_PRESCALER_DIV8_Val"> Divide by 8
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// <TC_CTRLA_PRESCALER_DIV16_Val"> Divide by 16
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// <TC_CTRLA_PRESCALER_DIV64_Val"> Divide by 64
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// <TC_CTRLA_PRESCALER_DIV256_Val"> Divide by 256
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// <TC_CTRLA_PRESCALER_DIV1024_Val"> Divide by 1024
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// <i> This defines the prescaler value
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// <id> tc_prescaler
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#ifndef CONF_TC3_PRESCALER
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#define CONF_TC3_PRESCALER TC_CTRLA_PRESCALER_DIV8_Val
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#endif
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//<o> Period Value <0x00000000-0xFFFFFFFF>
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// <id> tc_per
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#ifndef CONF_TC3_PER
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#define CONF_TC3_PER 0x32
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#endif
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// </h>
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// <h> PWM Waveform Output settings
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// <o> Waveform Period Value (uS) <0x00-0xFFFFFFFF>
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// <i> The unit of this value is us.
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// <id> tc_arch_wave_per_val
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#ifndef CONF_TC3_WAVE_PER_VAL
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#define CONF_TC3_WAVE_PER_VAL 0x3e8
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#endif
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// <o> Waveform Duty Value (0.1%) <0x00-0x03E8>
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// <i> The unit of this value is 1/1000.
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// <id> tc_arch_wave_duty_val
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#ifndef CONF_TC3_WAVE_DUTY_VAL
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#define CONF_TC3_WAVE_DUTY_VAL 0x1f4
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#endif
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/* Caculate pwm ccx register value based on WAVE_PER_VAL and Waveform Duty Value */
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#if CONF_TC3_PRESCALER < TC_CTRLA_PRESCALER_DIV64_Val
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#define CONF_TC3_CC0 \
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((uint32_t)(((double)CONF_TC3_WAVE_PER_VAL * CONF_GCLK_TC3_FREQUENCY) / 1000000 / (1 << CONF_TC3_PRESCALER) - 1))
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#define CONF_TC3_CC1 ((CONF_TC3_CC0 * CONF_TC3_WAVE_DUTY_VAL) / 1000)
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#elif CONF_TC3_PRESCALER == TC_CTRLA_PRESCALER_DIV64_Val
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#define CONF_TC3_CC0 ((uint32_t)(((double)CONF_TC3_WAVE_PER_VAL * CONF_GCLK_TC3_FREQUENCY) / 64000000 - 1))
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#define CONF_TC3_CC1 ((CONF_TC3_CC0 * CONF_TC3_WAVE_DUTY_VAL) / 1000)
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#elif CONF_TC3_PRESCALER == TC_CTRLA_PRESCALER_DIV256_Val
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#define CONF_TC3_CC0 ((uint32_t)(((double)CONF_TC3_WAVE_PER_VAL * CONF_GCLK_TC3_FREQUENCY) / 256000000 - 1))
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#define CONF_TC3_CC1 ((CONF_TC3_CC0 * CONF_TC3_WAVE_DUTY_VAL) / 1000)
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#elif CONF_TC3_PRESCALER == TC_CTRLA_PRESCALER_DIV1024_Val
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#define CONF_TC3_CC0 ((uint32_t)(((double)CONF_TC3_WAVE_PER_VAL * CONF_GCLK_TC3_FREQUENCY) / 1024000000 - 1))
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#define CONF_TC3_CC1 ((CONF_TC3_CC0 * CONF_TC3_WAVE_DUTY_VAL) / 1000)
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#endif
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// </h>
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// <h> Advanced settings
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// <y> Mode
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// <TC_CTRLA_MODE_COUNT16_Val"> Counter in 16-bit mode
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// <TC_CTRLA_MODE_COUNT32_Val"> Counter in 32-bit mode
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// <i> These bits mode
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// <id> tc_arch_mode
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#ifndef CONF_TC3_MODE
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#define CONF_TC3_MODE TC_CTRLA_MODE_COUNT16_Val
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#endif
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// </h>
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// <h> Advanced settings
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/* Commented intentionally. Timer uses fixed value. May be used by other abstractions based on TC. */
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//#define CONF_TC3_WAVEGEN TC_CTRLA_WAVEGEN_MFRQ_Val
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// <q> Run in standby
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// <i> Indicates whether the will continue running in standby sleep mode or not
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// <id> tc_arch_runstdby
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#ifndef CONF_TC3_RUNSTDBY
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#define CONF_TC3_RUNSTDBY 0
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#endif
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// <y> Prescaler and Counter Synchronization Selection
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// <TC_CTRLA_PRESCSYNC_GCLK_Val"> Reload or reset counter on next GCLK
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// <TC_CTRLA_PRESCSYNC_PRESC_Val"> Reload or reset counter on next prescaler clock
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// <TC_CTRLA_PRESCSYNC_RESYNC_Val"> Reload or reset counter on next GCLK and reset prescaler counter
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// <i> These bits select if on retrigger event, the Counter should be cleared or reloaded on the next GCLK_TCx clock or on the next prescaled GCLK_TCx clock.
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// <id> tc_arch_presync
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#ifndef CONF_TC3_PRESCSYNC
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#define CONF_TC3_PRESCSYNC TC_CTRLA_PRESCSYNC_GCLK_Val
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#endif
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/* Commented intentionally. Timer uses fixed value. May be used by other abstractions based on TC. */
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//#define CONF_TC3_DIR 0
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//#define CONF_TC3_ONESHOT 0
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/* Commented intentionally. Timer uses fixed value. May be used by other abstractions based on TC. */
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//#define CONF_TC3_INVEN0 0
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//#define CONF_TC3_INVEN1 0
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//#define CONF_TC3_CPTEN0 0
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//#define CONF_TC3_CPTEN1 0
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// <q> Debug Running Mode
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// <i> Indicates whether the Debug Running Mode is enabled or not
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// <id> tc_arch_dbgrun
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#ifndef CONF_TC3_DBGRUN
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#define CONF_TC3_DBGRUN 0
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#endif
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// </h>
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// <e> Event control
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// <id> timer_event_control
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#ifndef CONF_TC3_EVENT_CONTROL_ENABLE
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#define CONF_TC3_EVENT_CONTROL_ENABLE 0
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#endif
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// <q> Overflow/Underflow Event Output
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// <i> Generates event for counter overflows/underflows
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// <id> tc_arch_ovfeo
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#ifndef CONF_TC3_OVFEO
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#define CONF_TC3_OVFEO 0
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#endif
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// <q> TC Event Asynchronous input
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// <i> Enables Asynchronous input events to the TC
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// <id> tc_arch_tcei
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#ifndef CONF_TC3_TCEI
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#define CONF_TC3_TCEI 0
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#endif
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// <q> TC Inverted Event Input Polarity
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// <i> Used to invert the asynchronous input event source
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// <id> tc_arch_tceinv
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#ifndef CONF_TC3_TCINV
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#define CONF_TC3_TCINV 0
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#endif
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// <y> Event Action
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// <i> Defines the event action the TC will perform on an event
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// <TC_EVCTRL_EVACT_OFF_Val"> Event action disabled
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// <TC_EVCTRL_EVACT_RETRIGGER_Val"> Start, restart or retrigger TC on event
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// <TC_EVCTRL_EVACT_COUNT_Val"> Count on event
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// <TC_EVCTRL_EVACT_START_Val"> Start TC on event
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// <TC_EVCTRL_EVACT_PPW_Val"> Period captured in CC0, pulse width in CC1
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// <TC_EVCTRL_EVACT_PWP_Val"> Period captured in CC1, pulse width in CC0
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// <id> tc_arch_evact
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#ifndef CONF_TC3_EVACT
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#define CONF_TC3_EVACT TC_EVCTRL_EVACT_OFF_Val
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#endif
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// <q> Match/Capture channel 0 Event
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// <i> Enables the generation of an event for every match or capture on channel 0
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// <id> tc_arch_mceo0
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#ifndef CONF_TC3_MCEO0
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#define CONF_TC3_MCEO0 0
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#endif
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// <q> Match/Capture channel 1 Event
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// <i> Enables the generation of an event for every match or capture on channel 1
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// <id> tc_arch_mceo1
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#ifndef CONF_TC3_MCEO1
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#define CONF_TC3_MCEO1 0
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#endif
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// </e>
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// <<< end of configuration section >>>
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#endif // HPL_TC_CONFIG_H
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