403 lines
14 KiB
C
403 lines
14 KiB
C
/*
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* This file is part of the MicroPython project, http://micropython.org/
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*
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* The MIT License (MIT)
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*
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* Copyright (c) 2017 Scott Shawcroft for Adafruit Industries
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* Copyright (c) 2016 Damien P. George
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#include <stdint.h>
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#include "py/runtime.h"
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#include "common-hal/pulseio/PWMOut.h"
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#include "shared-bindings/pulseio/PWMOut.h"
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#include "samd21_pins.h"
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#undef ENABLE
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# define _TCC_SIZE(n,unused) TPASTE3(TCC,n,_SIZE),
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# define TCC_SIZES { MREPEAT(TCC_INST_NUM, _TCC_SIZE, 0) }
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static uint32_t tcc_periods[TCC_INST_NUM];
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static uint32_t tc_periods[TC_INST_NUM];
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uint32_t target_tcc_frequencies[TCC_INST_NUM];
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uint8_t tcc_refcount[TCC_INST_NUM];
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const uint16_t prescaler[8] = {1, 2, 4, 8, 16, 64, 256, 1024};
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// This bitmask keeps track of which channels of a TCC are currently claimed.
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#ifdef SAMD21
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uint8_t tcc_channels[3] = {0xf0, 0xfc, 0xfc};
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uint8_t tcc_cc_num[3] = {4, 2, 2};
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#endif
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#ifdef SAMD51
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uint8_t tcc_channels[5] = {0xc0, 0xf0, 0xf8, 0xfc, 0xfc};
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uint8_t tcc_cc_num[5] = {6, 4, 3, 2, 2};
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Tcc* tcc_insts[TCC_INST_NUM] = TCC_INSTS;
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#endif
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void pwmout_reset(void) {
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// Reset all timers
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for (int i = 0; i < TCC_INST_NUM; i++) {
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target_timer_frequencies[i] = 0;
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timer_refcount[i] = 0;
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}
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Tcc *tccs[TCC_INST_NUM] = TCC_INSTS;
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for (int i = 0; i < TCC_INST_NUM; i++) {
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// Disable the module before resetting it.
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if (tccs[i]->CTRLA.bit.ENABLE == 1) {
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tccs[i]->CTRLA.bit.ENABLE = 0;
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while (tccs[i]->SYNCBUSY.bit.ENABLE == 1) {
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}
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}
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uint8_t mask = 0xff;
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for (uint8_t j = 0; j < tcc_cc_num[i]; j++) {
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mask <<= 1;
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}
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tcc_channels[i] = 0xf0;
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tccs[i]->CTRLA.bit.SWRST = 1;
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}
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Tc *tcs[TC_INST_NUM] = TC_INSTS;
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for (int i = 0; i < TC_INST_NUM; i++) {
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tcs[i]->COUNT16.CTRLA.bit.SWRST = 1;
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while (tcs[i]->COUNT16.CTRLA.bit.SWRST == 1) {
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}
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}
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}
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static uint8_t tcc_channel(uint8_t timer_index, uint8_t wave_output) {
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// For the SAMD51 this hardcodes the use of OTMX == 0x0, the output matrix mapping, which uses
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// SAMD21-style modulo mapping.
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return t->wave_output % tcc_cc_num[index];
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}
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bool channel_ok(const pin_timer_t* t, uint8_t index) {
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uint8_t channel_bit = 1 << tcc_channel(index, t->wave_output);
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return (!t->is_tc && ((tcc_channels[index] & channel_bit) == 0)) ||
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t->is_tc;
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}
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static uint8_t timer_index(Tcc* base_timer_address) {
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#ifdef SAMD21
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return (base_timer_address - ((uint32_t) TCC0)) / 0x400;
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#endif
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// TCCs are scattered through the memory map of the SAMD51 so use a loop.
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#ifdef SAMD51
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for (uint8_t i = 0; i < TCC_INST_NUM; i++) {
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if (base_timer_address == tcc_insts[i]) {
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return i;
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}
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}
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#endif
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}
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void common_hal_pulseio_pwmout_construct(pulseio_pwmout_obj_t* self,
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const mcu_pin_obj_t* pin,
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uint16_t duty,
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uint32_t frequency,
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bool variable_frequency) {
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self->pin = pin;
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self->variable_frequency = variable_frequency;
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if (pin->primary_timer.tc == 0 && pin->secondary_timer.tc == 0) {
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mp_raise_ValueError("Invalid pin");
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}
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if (frequency == 0 || frequency > 6000000) {
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mp_raise_ValueError("Invalid PWM frequency");
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}
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uint16_t primary_timer_index = 0xff;
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uint16_t secondary_timer_index = 0xff;
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if (pin->primary_timer.tc != NULL) {
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primary_timer_index = timer_index((uint32_t) pin->primary_timer.tcc);
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}
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if (pin->secondary_timer.tc != NULL) {
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secondary_timer_index = timer_index((uint32_t) pin->secondary_timer.tcc);
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}
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// Figure out which timer we are using.
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// First see if a timer is already going with the frequency we want and our
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// channel is unused.
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// NOTE(shawcroft): The enable bit is in the same position for TC and TCC so
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// we treat them all as TCC for checking ENABLE.
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const pin_timer_t* t = NULL;
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uint8_t index = 0;
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if (!variable_frequency &&
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primary_timer_index != 0xff &&
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target_timer_frequencies[primary_timer_index] == frequency &&
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pin->primary_timer.tcc->CTRLA.bit.ENABLE == 1 &&
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channel_ok(&pin->primary_timer, primary_timer_index)) {
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t = &pin->primary_timer;
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index = primary_timer_index;
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self->tcc_instance.hw = t->tcc;
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self->tcc_instance.double_buffering_enabled = true;
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} else if (!variable_frequency &&
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secondary_timer_index != 0xff &&
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target_timer_frequencies[secondary_timer_index] == frequency &&
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pin->secondary_timer.tcc->CTRLA.bit.ENABLE == 1 &&
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channel_ok(&pin->secondary_timer, secondary_timer_index)) {
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t = &pin->secondary_timer;
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index = secondary_timer_index;
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self->tcc_instance.hw = t->tcc;
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self->tcc_instance.double_buffering_enabled = true;
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} else {
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// Pick an unused timer if available.
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// Check the secondary timer first since its always a nicer TCC (when it
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// exists)
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if (pin->secondary_timer.tc != 0 &&
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timer_refcount[secondary_timer_index] == 0 &&
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pin->secondary_timer.tcc->CTRLA.bit.ENABLE == 0) {
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t = &pin->secondary_timer;
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index = secondary_timer_index;
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} else if (pin->primary_timer.tc != 0 &&
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(!pin->primary_timer.is_tc || pin->primary_timer.channel == 1) &&
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timer_refcount[primary_timer_index] == 0) {
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t = &pin->primary_timer;
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index = primary_timer_index;
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}
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if (t == NULL) {
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mp_raise_RuntimeError("All timers in use");
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return;
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}
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uint8_t resolution = 0;
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if (t->is_tc) {
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resolution = 16;
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} else {
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// TCC resolution varies so look it up.
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const uint8_t _tcc_sizes[TCC_INST_NUM] = TCC_SIZES;
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resolution = _tcc_sizes[index];
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}
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// First determine the divisor that gets us the highest resolution.
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uint32_t system_clock = system_cpu_clock_get_hz();
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uint32_t top;
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uint8_t divisor;
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for (divisor = 0; divisor < 8; divisor++) {
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top = (system_clock / prescaler[divisor] / frequency) - 1;
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if (top < (1u << resolution)) {
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break;
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}
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}
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timer_periods[index] = top;
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if (t->is_tc) {
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// struct tc_config config_tc;
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// tc_get_config_defaults(&config_tc);
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//
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// config_tc.counter_size = TC_COUNTER_SIZE_16BIT;
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// config_tc.clock_prescaler = TC_CTRLA_PRESCALER(divisor);
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// config_tc.wave_generation = TC_WAVE_GENERATION_MATCH_PWM;
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// config_tc.counter_16_bit.compare_capture_channel[0] = top;
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// enum status_code status = tc_init(&self->tc_instance, t->tc, &config_tc);
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// if (status != STATUS_OK) {
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// mp_raise_RuntimeError("Failed to init timer");
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// }
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// tc_enable(&self->tc_instance);
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} else {
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// struct tcc_config config_tcc;
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// tcc_get_config_defaults(&config_tcc, t->tcc);
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//
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// config_tcc.counter.clock_prescaler = divisor;
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// config_tcc.counter.period = top;
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// config_tcc.compare.wave_generation = TCC_WAVE_GENERATION_SINGLE_SLOPE_PWM;
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//
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// enum status_code status = tcc_init(&self->tcc_instance, t->tcc, &config_tcc);
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// if (status != STATUS_OK) {
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// mp_raise_RuntimeError("Failed to init timer");
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// }
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// tcc_enable(&self->tcc_instance);
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}
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target_timer_frequencies[index] = frequency;
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timer_refcount[index]++;
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}
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if (!t->is_tc) {
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if (variable_frequency) {
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// We're changing frequency so claim all of the channels.
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tcc_channels[index] = 0xff;
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} else {
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tcc_channels[index] |= (1 << tcc_channel(index, t->channel));
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}
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}
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self->timer = t;
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// Connect the wave output to the outside world.
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//struct system_pinmux_config pin_config;
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//system_pinmux_get_config_defaults(&pin_config);
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//pin_config.mux_position = &self->pin->primary_timer == t ? MUX_E : MUX_F;
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//pin_config.direction = SYSTEM_PINMUX_PIN_DIR_OUTPUT;
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//system_pinmux_pin_set_config(pin->pin, &pin_config);
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common_hal_pulseio_pwmout_set_duty_cycle(self, duty);
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}
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bool common_hal_pulseio_pwmout_deinited(pulseio_pwmout_obj_t* self) {
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return self->pin == mp_const_none;
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}
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void common_hal_pulseio_pwmout_deinit(pulseio_pwmout_obj_t* self) {
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if (common_hal_pulseio_pwmout_deinited(self)) {
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return;
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}
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const pin_timer_t* t = self->timer;
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uint8_t index = (((uint32_t) t->tcc) - ((uint32_t) TCC0)) / 0x400;
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timer_refcount[index]--;
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if (!t->is_tc) {
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tcc_channels[index] &= ~(1 << tcc_channel(index, t->wave_output));
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}
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if (timer_refcount[index] == 0) {
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target_timer_frequencies[index] = 0;
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if (t->is_tc) {
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//tc_disable(&self->tc_instance);
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} else {
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if (t->tcc == TCC0) {
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tcc_channels[index] = 0xf0;
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} else {
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tcc_channels[index] = 0xfc;
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}
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//tcc_disable(&self->tcc_instance);
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//tcc_reset(&self->tcc_instance);
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}
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}
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reset_pin(self->pin->pin);
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self->pin = mp_const_none;
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}
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extern void common_hal_pulseio_pwmout_set_duty_cycle(pulseio_pwmout_obj_t* self, uint16_t duty) {
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const pin_timer_t* t = self->timer;
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uint8_t index;
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if (t->is_tc) {
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index = timer_index((uint32_t) self->timer->tc);
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uint16_t adjusted_duty = timer_periods[index] * duty / 0xffff;
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//tc_set_compare_value(&self->tc_instance, t->channel, adjusted_duty);
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} else {
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index = timer_index((uint32_t) self->timer->tcc);
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uint32_t adjusted_duty = ((uint64_t) timer_periods[index]) * duty / 0xffff;
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//tcc_set_compare_value(&self->tcc_instance, t->channel, adjusted_duty);
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}
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}
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uint16_t common_hal_pulseio_pwmout_get_duty_cycle(pulseio_pwmout_obj_t* self) {
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const pin_timer_t* t = self->timer;
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if (t->is_tc) {
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// while (tc_is_syncing(&self->tc_instance)) {
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// /* Wait for sync */
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// }
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uint16_t cv = t->tc->COUNT16.CC[t->wave_output].reg;
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return cv * 0xffff / timer_periods[timer_index((uint32_t) self->timer->tc)];
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} else {
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uint8_t channel = tcc_channel(timer_index(t->tcc), t->wave_output);
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uint32_t cv = 0;
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if ((t->tcc->STATUS.vec.CCBV & (1 << channel)) != 0) {
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cv = t->tcc->CCB[channel].reg;
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} else {
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cv = t->tcc->CC[channel].reg;
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}
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uint32_t duty_cycle = ((uint64_t) cv) * 0xffff / timer_periods[timer_index(t->tcc)];
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return duty_cycle;
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}
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}
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void common_hal_pulseio_pwmout_set_frequency(pulseio_pwmout_obj_t* self,
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uint32_t frequency) {
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if (frequency == 0 || frequency > 6000000) {
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mp_raise_ValueError("Invalid PWM frequency");
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}
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const pin_timer_t* t = self->timer;
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uint8_t resolution;
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if (t->is_tc) {
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resolution = 16;
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} else {
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resolution = 24;
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}
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uint32_t system_clock = system_cpu_clock_get_hz();
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uint32_t new_top;
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uint8_t new_divisor;
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for (new_divisor = 0; new_divisor < 8; new_divisor++) {
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new_top = (system_clock / prescaler[new_divisor] / frequency) - 1;
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if (new_top < (1u << resolution)) {
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break;
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}
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}
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uint16_t old_duty = common_hal_pulseio_pwmout_get_duty_cycle(self);
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uint8_t old_divisor;
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uint8_t index;
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if (t->is_tc) {
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index = timer_index(t->tc);
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old_divisor = t->tc->COUNT16.CTRLA.bit.PRESCALER;
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} else {
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index = timer_index(t->tcc);
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old_divisor = t->tcc->CTRLA.bit.PRESCALER;
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}
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if (new_divisor != old_divisor) {
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if (t->is_tc) {
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//tc_disable(&self->tc_instance);
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t->tc->COUNT16.CTRLA.bit.PRESCALER = new_divisor;
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//tc_enable(&self->tc_instance);
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} else {
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//tcc_disable(&self->tcc_instance);
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t->tcc->CTRLA.bit.PRESCALER = new_divisor;
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//tcc_enable(&self->tcc_instance);
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}
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}
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timer_periods[index] = new_top;
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if (t->is_tc) {
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// while (tc_is_syncing(&self->tc_instance)) {
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// /* Wait for sync */
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// }
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t->tc->COUNT16.CC[0].reg = new_top;
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} else {
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//tcc_set_top_value(&self->tcc_instance, new_top);
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}
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common_hal_pulseio_pwmout_set_duty_cycle(self, old_duty);
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}
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uint32_t common_hal_pulseio_pwmout_get_frequency(pulseio_pwmout_obj_t* self) {
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uint32_t system_clock = system_cpu_clock_get_hz();
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const pin_timer_t* t = self->timer;
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uint8_t index;
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uint8_t divisor;
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if (t->is_tc) {
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index = timer_index((uint32_t) self->timer->tc);
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divisor = t->tc->COUNT16.CTRLA.bit.PRESCALER;
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} else {
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index = timer_index((uint32_t) self->timer->tcc);
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divisor = t->tcc->CTRLA.bit.PRESCALER;
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}
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uint32_t top = timer_periods[index];
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return (system_clock / prescaler[divisor]) / (top + 1);
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}
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bool common_hal_pulseio_pwmout_get_variable_frequency(pulseio_pwmout_obj_t* self) {
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return self->variable_frequency;
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}
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